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sunxi: Linksprite_pcDuino_defconfig bugfixes

PATCH New Siarhei Siamashka 2 participants 4 messages Oct 8, 2015 – Oct 10, 2015

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cover sunxi: Linksprite_pcDuino_defconfig bugfixes

Fixes for DRAM reliability problems and unsafe use of the PH6 pin.

Siarhei Siamashka (2):
sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz
sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig

 configs/Linksprite_pcDuino_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Signature · 1 line
2.4.9
#1 lore raw

PATCH 1/2 sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz

Linksprite_pcDuino_defconfig is a generic config for pcDuino1 and pcDuino2 boards. The pcDuino2 board exists at least in two variants (with DDR3 chips from HYNIX or NANYA). At least one pcDuino2 board with HYNIX DDR3 fails the lima-memtester reliability test unless the DRAM clock speed is reduced to 360MHz.

A detailed analysis report, generated by the a10-tpr3-scan tool with the explanations why the DRAM is failing at 408MHz, is available at:

    http://linux-sunxi.org/index.php?title=User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test&oldid=15152
    http://web.archive.org/web/20151008190210/http://linux-sunxi.org/User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test
---
 configs/Linksprite_pcDuino_defconfig | 1 -
 1 file changed, 1 deletion(-)
configs/Linksprite_pcDuino_defconfig +0 -1
index de44890..68d9137 100644
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_MACH_SUN4I=y
-CONFIG_DRAM_CLK=408
 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
Signature · 1 line
2.4.9
#2 lore raw

PATCH 2/2 sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig

In reply to Siarhei Siamashka

The pcDuino1 board unconditionally provides 5V to USB host receptacles. The pcDuino2 board has a voltage regulator, controlled by the PD2 pin which is pulled-up by default (so that the USB power is also enabled by default).

Not specifying pins for enabling USB power in the defconfig means that the PH3 and PH6 pins are driven high by default. The PH6 pin is available on the Arduino-compatible expansion header and touching it is not nice (this may be even dangerous, depending on what kind of role is assigned to this particular pin by various Arduino shields).

This patch explicitly configures the USB VBUS pins to "", which means that no pins should be touched. The patch has been tested on a pcDuino2 board and USB still works.

---
 configs/Linksprite_pcDuino_defconfig | 2 ++
 1 file changed, 2 insertions(+)
configs/Linksprite_pcDuino_defconfig +2 -0
index 68d9137..13b7ed3 100644
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_MACH_SUN4I=y
+CONFIG_USB1_VBUS_PIN=""
+CONFIG_USB2_VBUS_PIN=""
 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
Signature · 1 line
2.4.9
#3 lore raw

cover sunxi: Linksprite_pcDuino_defconfig bugfixes

In reply to Siarhei Siamashka

Hi,

Quoted 1 line · Siarhei Siamashka

Fixes for DRAM reliability problems and unsafe use of the PH6 pin.

Thanks, I've applied this to the u-boot-sunxi tree, and I've send out a pull-req so that we can hoepfully still get these fixes into v2015.10

Regards,

Hans