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arm: ls102xa: enable snooping for CAAM transactions

PATCH New Horia Geantă 2 participants 5 messages Sep 16, 2015 – Oct 30, 2015 Arm (32-bit)

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Horia Geantă

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#0 lore raw

PATCH 1/1 arm: ls102xa: enable snooping for CAAM transactions

Enable snooping for CAAM read & write transactions by programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP] SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by Horia Geant? <[email protected]>
Reviewed-by Zhengxiong Jin <[email protected]>
---
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
 board/freescale/ls1021aqds/ls1021aqds.c           | 2 ++
 board/freescale/ls1021atwr/ls1021atwr.c           | 2 ++
 3 files changed, 5 insertions(+)
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +1 -0
index 60aa0d3b6f43..fbd06bafce31 100644
@@ -144,6 +144,7 @@ struct ccsr_gur {
 };
 
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR	0xc0000000
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125	0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125	0x08000000
board/freescale/ls1021aqds/ls1021aqds.c +2 -0
index 655fc644fe90..e7c25a5012f0 100644
@@ -281,6 +281,8 @@ int board_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 #ifdef CONFIG_TSEC_ENET
 	/* clear BD & FR bits for BE BD's and frame data */
 	clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
board/freescale/ls1021atwr/ls1021atwr.c +2 -0
index 228dbf81bb25..e15999e42165 100644
@@ -482,6 +482,8 @@ int board_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 #ifdef CONFIG_TSEC_ENET
 	/* clear BD & FR bits for BE BD's and frame data */
 	clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
Signature · 1 line
2.4.4
#1 lore raw

PATCH 1/1 arm: ls102xa: enable snooping for CAAM transactions

Quoted 7 lines · Horia Geant?

Enable snooping for CAAM read & write transactions by programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP] SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by Horia Geant? <[email protected]>
Reviewed-by Zhengxiong Jin <[email protected]>

The Reviewed-by signature should be added by reviewer or maintainer.

Quoted 37 lines
---
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
 board/freescale/ls1021aqds/ls1021aqds.c           | 2 ++
 board/freescale/ls1021atwr/ls1021atwr.c           | 2 ++
 3 files changed, 5 insertions(+)
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +1 -0
index 60aa0d3b6f43..fbd06bafce31 100644
@@ -144,6 +144,7 @@ struct ccsr_gur {
 };
 
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR	0xc0000000
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125	0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125	0x08000000
board/freescale/ls1021aqds/ls1021aqds.c +2 -0
index 655fc644fe90..e7c25a5012f0 100644
@@ -281,6 +281,8 @@ int board_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 #ifdef CONFIG_TSEC_ENET
 	/* clear BD & FR bits for BE BD's and frame data */
 	clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
board/freescale/ls1021atwr/ls1021atwr.c +0 -0
index 228dbf81bb25..e15999e42165 100644

board/freescale/ls1021atwr/ls1021atwr.c int board_early_init_f(void) · line 489

Quoted 8 lines
board/freescale/ls1021atwr/ls1021atwr.c +2 -0
@@ -482,6 +482,8 @@ int board_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 #ifdef CONFIG_TSEC_ENET
 	/* clear BD & FR bits for BE BD's and frame data */
 	clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);

Why wasn't the change put into arch_cpu_init?

York

author
#2 lore raw

PATCH 1/1 arm: ls102xa: enable snooping for CAAM transactions

Quoted 8 lines · York Sun
Quoted 5 lines · Horia Geant?

Enable snooping for CAAM read & write transactions by programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP] SCFG_SNPCNFGCR[SECWRSNP]

Quoted 4 lines
Quoted 2 lines
Signed-off-by Horia Geant? <[email protected]>
Reviewed-by Zhengxiong Jin <[email protected]>

The Reviewed-by signature should be added by reviewer or maintainer.

It was added by Jason during an internal review.
Sorry for not adding him in Cc.

Quoted 39 lines
Quoted 39 lines
---
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
 board/freescale/ls1021aqds/ls1021aqds.c           | 2 ++
 board/freescale/ls1021atwr/ls1021atwr.c           | 2 ++
 3 files changed, 5 insertions(+)
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +1 -0
index 60aa0d3b6f43..fbd06bafce31 100644
@@ -144,6 +144,7 @@ struct ccsr_gur {
 };
 
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR	0xc0000000
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125	0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125	0x08000000
board/freescale/ls1021aqds/ls1021aqds.c +2 -0
index 655fc644fe90..e7c25a5012f0 100644
@@ -281,6 +281,8 @@ int board_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 #ifdef CONFIG_TSEC_ENET
 	/* clear BD & FR bits for BE BD's and frame data */
 	clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
board/freescale/ls1021atwr/ls1021atwr.c +0 -0
index 228dbf81bb25..e15999e42165 100644
@@ -482,6 +482,8 @@ int board_early_init_f(void)
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
 	unsigned int major;
Quoted 8 lines

board/freescale/ls1021atwr/ls1021atwr.c int board_early_init_f(void) · line 489

Quoted 6 lines
board/freescale/ls1021atwr/ls1021atwr.c +2 -0
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 #ifdef CONFIG_TSEC_ENET
 	/* clear BD & FR bits for BE BD's and frame data */
 	clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);

Why wasn't the change put into arch_cpu_init?

Good point.
I'll make the update in v2.

Thanks,
Horia

author
#3 lore raw

PATCH v2 1/1 arm: ls102xa: enable snooping for CAAM transactions

In reply to Horia Geantă

Enable snooping for CAAM read & write transactions by programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP] SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by Horia Geant? <[email protected]>
Reviewed-by Zhengxiong Jin <[email protected]>

---

v2 - moved initialization in arch_cpu_init (instead of board_early_init_f), as suggested by York.

 arch/arm/cpu/armv7/ls102xa/cpu.c                  | 3 +++
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
 2 files changed, 4 insertions(+)
arch/arm/cpu/armv7/ls102xa/cpu.c +3 -0
index 8dd95d98791d..0f10ed656af8 100644
@@ -299,6 +299,7 @@ int arch_cpu_init(void)
 	void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
 	void *rcpm2_base =
 		(void *)(CONFIG_SYS_DCSRBAR + DCSR_RCPM2_BLOCK_OFFSET);
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
 	u32 state;
 
 	/*

@@ -326,6 +327,8 @@ int arch_cpu_init(void)
 	 */
 	fsl_epu_clean(epu_base);
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 	return 0;
 }
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +1 -0
index 60aa0d3b6f43..fbd06bafce31 100644
@@ -144,6 +144,7 @@ struct ccsr_gur {
 };
 
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR	0xc0000000
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125	0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125	0x08000000
Signature · 1 line
2.4.4
#4 lore raw

PATCH v2 1/1 arm: ls102xa: enable snooping for CAAM transactions

Quoted 11 lines · Horia Geant?

Enable snooping for CAAM read & write transactions by programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP] SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by Horia Geant? <[email protected]>
Reviewed-by Zhengxiong Jin <[email protected]>

---

v2 - moved initialization in arch_cpu_init (instead of board_early_init_f), as suggested by York.

Applied to u-boot-fsl-qoriq. Awaiting upstream. Thanks.

York