Tegra: DT: add device tree binding doc for QSPI
Subsystems (3)
PATCH v4 1/1 Tegra: DT: add device tree binding doc for QSPI
This patch adds the device tree binding doc for the Tegra QSPI controller on Tegra210.
---
Changes in v2:
- based it more on kernel's nvidia,tegra114-spi.txt binding
- changes based on prelim review by swarren at nvidia.com Changes in v3:
- renamed to 'nvidia,tegra210-qspi.txt' to match kernel bindings
- more changes based on review from swarren at nvidia.com Changes in v4:
- move 'clock' up under 'clock-names' entry
Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt | 42 ++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt
Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt new file +42 -0
@@ -0,0 +1,42 @@ +NVIDIA Tegra QSPI controller. + +Required properties: +- compatible : for Tegra210, must contain "nvidia,tegra210-qspi". +- reg: Should contain QSPI registers location and length. +- interrupts: Should contain QSPI interrupt. +- clock-names : Must include the following entries: + - qspi +- clocks : Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names : Must include the following entries: + - qspi + +Optional properties: +- dmas : Must contain an entry for each entry in clock-names. + See ../dma/dma.txt for details. +- dma-names : Must include the following entries: + - rx + - tx + +Recommended properties: +- spi-max-frequency: Definition as per spi-bus.txt + +Example: + +spi at 70410000 { + compatible = "nvidia,tegra210-qspi"; + reg = <0x0 0x70410000 0x0 0x1000>; + interrupts = <0 10 0x04>; + spi-max-frequency = <24000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 211>; + clock-names = "qspi"; + resets = <&tegra_car 211>; + reset-names = "qspi"; + dmas = <&apbdma 16>, <&apbdma 16>; + dma-names = "rx", "tx"; + status = "disabled"; +};
Signature · 1 line
1.8.2.1.610.g562af5b
PATCH v4 1/1 Tegra: DT: add device tree binding doc for QSPI
Quoted 2 lines · Tom Warren
This patch adds the device tree binding doc for the Tegra QSPI controller on Tegra210.
(I assume if others approve the binding, Thierry will take it through the Tegra tree)
PATCH v4 1/1 Tegra: DT: add device tree binding doc for QSPI
Quoted 8 lines · Stephen Warren
Quoted 2 lines · Tom Warren
This patch adds the device tree binding doc for the Tegra QSPI controller on Tegra210.
Acked-by Stephen Warren <[email protected]>(I assume if others approve the binding, Thierry will take it through the Tegra tree)
Do we have a kernel driver and hardware where this can be tested? I'm slightly reluctant to merge a binding through the Tegra tree without a driver that implements it.
Thierry
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PATCH v4 1/1 Tegra: DT: add device tree binding doc for QSPI
Quoted 5 lines · Thierry Reding
Quoted 4 lines · Stephen Warren
Quoted 2 lines · Tom Warren
This patch adds the device tree binding doc for the Tegra QSPI controller on Tegra210.
Quoted 8 lines
Quoted 4 lines
Acked-by Stephen Warren <[email protected]>(I assume if others approve the binding, Thierry will take it through the Tegra tree)
Do we have a kernel driver and hardware where this can be tested? I'm slightly reluctant to merge a binding through the Tegra tree without a driver that implements it.
AFAIK, the only HW this can be tested on is a one-off modified version of p2571. The standard boards don't have this. I don't believe there's an (upstream at least) kernel driver for this. I'm sure downstream has a driver.
PATCH v4 1/1 Tegra: DT: add device tree binding doc for QSPI
In reply to Tom WarrenQuoted 4 lines · Tom Warren
This patch adds the device tree binding doc for the Tegra QSPI controller on Tegra210.
Signed-off-by Tom Warren <[email protected]>
Quoted 65 lines
---
Changes in v2:
- based it more on kernel's nvidia,tegra114-spi.txt binding
- changes based on prelim review by swarren at nvidia.com Changes in v3:
- renamed to 'nvidia,tegra210-qspi.txt' to match kernel bindings
- more changes based on review from swarren at nvidia.com Changes in v4:
- move 'clock' up under 'clock-names' entryDocumentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt | 42 ++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txtDocumentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt new file +42
-1@@ -0,0 +1,42 @@ +NVIDIA Tegra QSPI controller. + +Required properties: +- compatible : for Tegra210, must contain "nvidia,tegra210-qspi". +- reg: Should contain QSPI registers location and length. +- interrupts: Should contain QSPI interrupt. +- clock-names : Must include the following entries: + - qspi +- clocks : Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names : Must include the following entries: + - qspi + +Optional properties: +- dmas : Must contain an entry for each entry in clock-names. + See ../dma/dma.txt for details. +- dma-names : Must include the following entries: + - rx + - tx + +Recommended properties: +- spi-max-frequency: Definition as per spi-bus.txt + +Example: + +spi at 70410000 { + compatible = "nvidia,tegra210-qspi"; + reg = <0x0 0x70410000 0x0 0x1000>; + interrupts = <0 10 0x04>; + spi-max-frequency = <24000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car 211>; + clock-names = "qspi"; + resets = <&tegra_car 211>; + reset-names = "qspi"; + dmas = <&apbdma 16>, <&apbdma 16>; + dma-names = "rx", "tx"; + status = "disabled"; +}; --1.8.2.1.610.g562af5b