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regmap-mmio: Use native endianness for read/write

PATCH New Simon Arlott 1 participant 1 message Oct 29, 2015 2 messages not in the archive

Subsystems (5)
Device tree bindings MIPS Driver core Register map abstraction +1 more subsystems
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A message that is not in the archive (sent off-list or not yet received): [email protected]

A message that is not in the archive (sent off-list or not yet received): [email protected]

Simon Arlott

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PATCH 1/1 regmap-mmio: Use native endianness for read/write

The regmap API has an endianness setting for formatting reads and writes. This can be set by the usual DT "little-endian" and "big-endian" properties. To work properly the associated regmap_bus needs to read/write in native endian.

The "syscon" DT device binding creates an mmio-based regmap_bus which performs all reads/writes as little-endian. These values are then converted again by regmap, which means that all of the MIPS BCM boards (which are big-endian) have been declared as "little-endian" to get regmap to convert them back to big-endian.

Modify regmap-mmio to use the native-endian functions __raw_read*() and __raw_write*() instead of the little-endian functions read*() and write*().

Modify the big-endian MIPS BCM boards to use what will now be the correct endianness instead of pretending that the devices are little-endian.

Signed-off-by Simon Arlott <[email protected]>
---
 arch/mips/boot/dts/brcm/bcm6328.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7125.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7346.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7358.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7360.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7362.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7420.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7425.dtsi |  1 -
 arch/mips/boot/dts/brcm/bcm7435.dtsi |  1 -
 drivers/base/regmap/regmap-mmio.c    | 16 ++++++++--------
 10 files changed, 8 insertions(+), 17 deletions(-)
arch/mips/boot/dts/brcm/bcm6328.dtsi +0 -1
index 41891c1..d52ce3d 100644
@@ -73,7 +73,6 @@
 		timer: timer@10000040 {
 			compatible = "syscon";
 			reg = <0x10000040 0x2c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7125.dtsi +0 -1
index 1a7efa8..4fc7ece 100644
@@ -98,7 +98,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x60c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7346.dtsi +0 -1
index d817bb4..01592f1 100644
@@ -100,7 +100,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7358.dtsi +0 -1
index 277a90a..46be971 100644
@@ -94,7 +94,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7360.dtsi +0 -1
index 9e1e571..ed728e7 100644
@@ -94,7 +94,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7362.dtsi +0 -1
index 6e65db8..f0ca134 100644
@@ -100,7 +100,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7420.dtsi +0 -1
index 5f55d0a..bee221b 100644
@@ -99,7 +99,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x60c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7425.dtsi +0 -1
index 5b660b6..c8ab17a 100644
@@ -100,7 +100,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
-			little-endian;
 		};
 
 		reboot {
arch/mips/boot/dts/brcm/bcm7435.dtsi +0 -1
index 8b9432c..614ee21 100644
@@ -114,7 +114,6 @@
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
-			little-endian;
 		};
 
 		reboot {
drivers/base/regmap/regmap-mmio.c +8 -8
index 426a57e..8a77876 100644
@@ -106,17 +106,17 @@ static int regmap_mmio_gather_write(void *context,
 	while (val_size) {
 		switch (ctx->val_bytes) {
 		case 1:
-			writeb(*(u8 *)val, ctx->regs + offset);
+			__raw_writeb(*(u8 *)val, ctx->regs + offset);
 			break;
 		case 2:
-			writew(*(u16 *)val, ctx->regs + offset);
+			__raw_writew(*(u16 *)val, ctx->regs + offset);
 			break;
 		case 4:
-			writel(*(u32 *)val, ctx->regs + offset);
+			__raw_writel(*(u32 *)val, ctx->regs + offset);
 			break;
 #ifdef CONFIG_64BIT
 		case 8:
-			writeq(*(u64 *)val, ctx->regs + offset);
+			__raw_writeq(*(u64 *)val, ctx->regs + offset);
 			break;
 #endif
 		default:

@@ -166,17 +166,17 @@ static int regmap_mmio_read(void *context,
 	while (val_size) {
 		switch (ctx->val_bytes) {
 		case 1:
-			*(u8 *)val = readb(ctx->regs + offset);
+			*(u8 *)val = __raw_readb(ctx->regs + offset);
 			break;
 		case 2:
-			*(u16 *)val = readw(ctx->regs + offset);
+			*(u16 *)val = __raw_readw(ctx->regs + offset);
 			break;
 		case 4:
-			*(u32 *)val = readl(ctx->regs + offset);
+			*(u32 *)val = __raw_readl(ctx->regs + offset);
 			break;
 #ifdef CONFIG_64BIT
 		case 8:
-			*(u64 *)val = readq(ctx->regs + offset);
+			*(u64 *)val = __raw_readq(ctx->regs + offset);
 			break;
 #endif
 		default:
Signature · 7 lines
2.1.4

-- 
Simon Arlott

-- 
Simon Arlott