imx: mx6sabresd discard PHYS_SDRAM_SIZE
PATCH 1/1 imx: mx6sabresd discard PHYS_SDRAM_SIZE
This macro is not needed, since gd->ram_size is assigned value using function imx_ddr_size().
--- include/configs/mx6sabresd.h | 1 - 1 file changed, 1 deletion(-)
include/configs/mx6sabresd.h +0 -1
@@ -19,7 +19,6 @@#define CONFIG_MXC_UART_BASE UART1_BASE#define CONFIG_CONSOLE_DEV "ttymxc0"#define CONFIG_MMCROOT "/dev/mmcblk1p2" -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
Signature · 1 line
1.8.4
PATCH 1/1 imx: mx6sabresd: add i.MX6DQP Sabresd support
Add i.MX6DQP-Sabresd board support:
1. set fdt_file according to board_rev which is set at runtime.
2. Add mx6dqp_ddr_ioregs and calibration value for this board.
---
Before this patch needs to apply "pci: pcie_imx: Fix hang on mx6qp" from Fabio.
http://lists.denx.de/pipermail/u-boot/2015-October/230018.html.
board/freescale/mx6sabresd/mx6sabresd.c | 69 ++++++++++++++++++++++++++++++--- include/configs/mx6sabre_common.h | 2 + 2 files changed, 65 insertions(+), 6 deletions(-)
board/freescale/mx6sabresd/mx6sabresd.c +63 -6
@@ -684,7 +684,9 @@ int board_late_init(void)#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG setenv ("board_name" ,"SABRESD" ); -if (is_cpu_type (MXC_CPU_MX6Q ) ||is_cpu_type (MXC_CPU_MX6D )) +if (is_mx6dqp ()) +setenv ("board_rev" ,"MX6QP" ); +else if (is_cpu_type (MXC_CPU_MX6Q ) ||is_cpu_type (MXC_CPU_MX6D ))setenv ("board_rev" ,"MX6Q" );else if (is_cpu_type (MXC_CPU_MX6DL ) ||is_cpu_type (MXC_CPU_MX6SOLO ))setenv ("board_rev" ,"MX6DL" );
@@ -732,6 +734,35 @@ const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { .dram_dqm7 = 0x00020030, }; +const struct mx6dq_iomux_ddr_regs mx6dqp_ddr_ioregs = { + .dram_sdclk_0 =0x00000030 , + .dram_sdclk_1 =0x00000030 , + .dram_cas =0x00000030 , + .dram_ras =0x00000030 , + .dram_reset =0x00000030 , + .dram_sdcke0 =0x00003000 , + .dram_sdcke1 =0x00003000 , + .dram_sdba2 =0x00000000 , + .dram_sdodt0 =0x00003030 , + .dram_sdodt1 =0x00003030 , + .dram_sdqs0 =0x00000030 , + .dram_sdqs1 =0x00000030 , + .dram_sdqs2 =0x00000030 , + .dram_sdqs3 =0x00000030 , + .dram_sdqs4 =0x00000030 , + .dram_sdqs5 =0x00000030 , + .dram_sdqs6 =0x00000030 , + .dram_sdqs7 =0x00000030 , + .dram_dqm0 =0x00000030 , + .dram_dqm1 =0x00000030 , + .dram_dqm2 =0x00000030 , + .dram_dqm3 =0x00000030 , + .dram_dqm4 =0x00000030 , + .dram_dqm5 =0x00000030 , + .dram_dqm6 =0x00000030 , + .dram_dqm7 =0x00000030 , +}; +const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = { .grp_ddr_type =0x000C0000 , .grp_ddrmode_ctl =0x00020000 ,
@@ -764,6 +795,21 @@ const struct mx6_mmdc_calibration mx6_mmcd_calib = { .p1_mpwrdlctl = 0x48254A36, }; +const struct mx6_mmdc_calibration mx6dqp_mmcd_calib = { + .p0_mpwldectrl0 =0x001B001E , + .p0_mpwldectrl1 =0x002E0029 , + .p1_mpwldectrl0 =0x001B002A , + .p1_mpwldectrl1 =0x0019002C , + .p0_mpdgctrl0 =0x43240334 , + .p0_mpdgctrl1 =0x0324031A , + .p1_mpdgctrl0 =0x43340344 , + .p1_mpdgctrl1 =0x03280276 , + .p0_mprddlctl =0x44383A3E , + .p1_mprddlctl =0x3C3C3846 , + .p0_mpwrdlctl =0x2E303230 , + .p1_mpwrdlctl =0x38283E34 , +}; +/* MT41K128M16JT-125 */ static struct mx6_ddr3_cfg mem_ddr = { .mem_speed =1600 ,
@@ -797,9 +843,15 @@ static void gpr_init(void)/* enable AXI cache for VDOA/VPU/IPU */ writel (0xF00000CF , &iomux->gpr[4 ]); -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -writel (0x007F007F , &iomux->gpr[6 ]); -writel (0x007F007F , &iomux->gpr[7 ]); +if (is_mx6dqp ()) { +/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ +writel (0x007F007F , &iomux->gpr[6 ]); +writel (0x007F007F , &iomux->gpr[7 ]); + }else { +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +writel (0x007F007F , &iomux->gpr[6 ]); +writel (0x007F007F , &iomux->gpr[7 ]); + } }/*
@@ -827,8 +879,13 @@ static void spl_dram_init(void) .ddr_type = DDR_TYPE_DDR3, }; -mx6dq_dram_iocfg (64 , &mx6_ddr_ioregs, &mx6_grp_ioregs); -mx6_dram_cfg (&sysinfo, &mx6_mmcd_calib, &mem_ddr); +if (is_mx6dqp ()) { +mx6dq_dram_iocfg (64 , &mx6dqp_ddr_ioregs, &mx6_grp_ioregs); +mx6_dram_cfg (&sysinfo, &mx6dqp_mmcd_calib, &mem_ddr); + }else { +mx6dq_dram_iocfg (64 , &mx6_ddr_ioregs, &mx6_grp_ioregs); +mx6_dram_cfg (&sysinfo, &mx6_mmcd_calib, &mem_ddr); + } }void board_init_f (ulong dummy)
include/configs/mx6sabre_common.h +2 -0
@@ -158,6 +158,8 @@"setenv fdt_file imx6q-sabreauto.dtb; fi; " \"if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \"setenv fdt_file imx6dl-sabreauto.dtb; fi; " \ +"if test $board_name = SABRESD && test $board_rev = MX6QP; then " \ +"setenv fdt_file imx6qp-sabresd.dtb; fi; " \"if test $board_name = SABRESD && test $board_rev = MX6Q; then " \"setenv fdt_file imx6q-sabresd.dtb; fi; " \"if test $board_name = SABRESD && test $board_rev = MX6DL; then " \
Signature · 1 line
1.8.4
PATCH 1/1 imx: mx6sabresd: add i.MX6DQP Sabresd support
Quoted 8 lines · Peng Fan
Add i.MX6DQP-Sabresd board support:
1. setfdt_fileaccording toboard_revwhich is set at runtime.
2. Addmx6dqp_ddr_ioregsand calibration value for this board.Signed-off-by Peng Fan <[email protected]>Cc Stefano Babic <[email protected]>Cc Fabio Estevam <[email protected]>---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 imx: ddr: drop duplicated debug info
In reply to Peng FanDrop duplicated debug info for tcl.
--- arch/arm/cpu/armv7/mx6/ddr.c | 1 - 1 file changed, 1 deletion(-)
arch/arm/cpu/armv7/mx6/ddr.c +0 -1
@@ -796,7 +796,6 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo,debug ("Rtt_wr=%d\n" , sysinfo->rtt_wr);debug ("Rtt_nom=%d\n" , sysinfo->rtt_nom);debug ("SRT=%d\n" , ddr3_cfg->SRT); -debug ("tcl=%d\n" , tcl);debug ("twr=%d\n" , twr);/*
Signature · 1 line
1.8.4
PATCH 1/1 imx: mx6sabresd discard PHYS_SDRAM_SIZE
In reply to Peng FanQuoted 6 lines · Peng Fan
This macro is not needed, since
gd->ram_sizeis assigned value using functionimx_ddr_size().Signed-off-by Peng Fan <[email protected]>Cc Stefano Babic <[email protected]>Cc Fabio Estevam <[email protected]>
PATCH 1/1 imx: mx6sabresd discard PHYS_SDRAM_SIZE
In reply to Peng FanQuoted 16 lines · Peng Fan
This macro is not needed, since
gd->ram_sizeis assigned value using functionimx_ddr_size().Signed-off-by Peng Fan <[email protected]>Cc Stefano Babic <[email protected]>Cc Fabio Estevam <[email protected]>--- include/configs/mx6sabresd.h | 1 - 1 file changed, 1 deletion(-)include/configs/mx6sabresd.h +0
-0
include/configs/mx6sabresd.h line 24
Quoted 7 lines
include/configs/mx6sabresd.h +0
-1@@ -19,7 +19,6 @@#define CONFIG_MXC_UART_BASE UART1_BASE#define CONFIG_CONSOLE_DEV "ttymxc0"#define CONFIG_MMCROOT "/dev/mmcblk1p2" -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================