arm: at91/spl: make matrix and saic redirect sharing with others

PATCH Superseded Wenyou Yang 3 participants 10 messages Nov 4, 2015 – Nov 5, 2015

Subsystems (3)

Arm (32-bit) Arm sub-architectures Arm/Microchip (AT91) SoC support

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Wenyou Yang

author

2015-11-04 06:28 UTC #0 lore raw

cover arm: at91/spl: make matrix and saic redirect sharing with others

This patches is to make matix initialization and saic redirect code sharing with other SoCs, move them to seperate files from SAMA5D4 particular file.

Wenyou Yang (3):
arm: at91/spl: matrix: move matrix init to separate file
arm: at91/spl: matrix: improve implementation of matrix
arm: at91: spl/atmel_sfr: move saic redirect to separate file

 arch/arm/mach-at91/Makefile                 |    2 +-
 arch/arm/mach-at91/armv7/sama5d4_devices.c  |   55 ---------------------------
 arch/arm/mach-at91/atmel_sfr.c              |   21 ++++++++++
 arch/arm/mach-at91/include/mach/sama5_sfr.h |    1 -
 arch/arm/mach-at91/include/mach/sama5d4.h   |   28 ++++++++++++++
 arch/arm/mach-at91/matrix.c                 |   34 +++++++++++++++++
 6 files changed, 84 insertions(+), 57 deletions(-)
 create mode 100644 arch/arm/mach-at91/atmel_sfr.c
 create mode 100644 arch/arm/mach-at91/matrix.c

Signature · 1 line

1.7.9.5

Wenyou Yang

author

2015-11-04 06:28 UTC #1 lore raw

PATCH 1/3 arm: at91/spl: matrix: move matrix init to separate file

To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c

Signed-off-by Wenyou Yang <[email protected]>

---

 arch/arm/mach-at91/Makefile                |    2 +-
 arch/arm/mach-at91/armv7/sama5d4_devices.c |   42 -----------------------
 arch/arm/mach-at91/matrix.c                |   51 ++++++++++++++++++++++++++++
 3 files changed, 52 insertions(+), 43 deletions(-)
 create mode 100644 arch/arm/mach-at91/matrix.c

arch/arm/mach-at91/Makefile +1 -1

index 313eb47..649aff2 100644
@@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
 obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
 obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
 obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
+obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
 obj-y += spl.o
 endif

arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-42~~

54 lines not on this page · raw message

arch/arm/mach-at91/matrix.c new file +51 -0

51 lines not on this page · raw message

Signature · 1 line

1.7.9.5

Josh Wu

2015-11-05 02:52 UTC #2 lore raw

PATCH 1/3 arm: at91/spl: matrix: move matrix init to separate file

Hi, Wenyou

Quoted 4 lines · Wenyou Yang

To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c

is it possible just move it to mach-at91/armv7/matrix.c, as it is only used by armv7 core?

Best Regards,
Josh Wu

Quoted 140 lines

Signed-off-by Wenyou Yang <[email protected]>

---

  arch/arm/mach-at91/Makefile                |    2 +-
  arch/arm/mach-at91/armv7/sama5d4_devices.c |   42 -----------------------
  arch/arm/mach-at91/matrix.c                |   51 ++++++++++++++++++++++++++++
  3 files changed, 52 insertions(+), 43 deletions(-)

create mode 100644 arch/arm/mach-at91/matrix.c

arch/arm/mach-at91/Makefile +1 -1

index 313eb47..649aff2 100644
@@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
  obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
  obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
  obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
+obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
  obj-y += spl.o
  endif

arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-42~~

index 76301d6..52f4862 100644
@@ -10,7 +10,6 @@
  #include <asm/arch/at91_common.h>
  #include <asm/arch/at91_pmc.h>
  #include <asm/arch/clk.h>
-#include <asm/arch/sama5_matrix.h>
  #include <asm/arch/sama5_sfr.h>
  #include <asm/arch/sama5d4.h>

@@ -48,47 +47,6 @@ void at91_udp_hw_init(void)
  #endif
 
  #ifdef CONFIG_SPL_BUILD
-void matrix_init(void)
-{
-	struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
-	struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
-	int i;
-
-	/* Disable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
-	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
-
-	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
-	for (i = 4; i <= 10; i++) {
-		writel(0x000f0f0f, &h64mx->ssr[i]);
-		writel(0x0000ffff, &h64mx->sassr[i]);
-		writel(0x0000000f, &h64mx->srtsr[i]);
-	}
-
-	/* CS3 */
-	writel(0x00c0c0c0, &h32mx->ssr[3]);
-	writel(0xff000000, &h32mx->sassr[3]);
-	writel(0xff000000, &h32mx->srtsr[3]);
-
-	/* NFC SRAM */
-	writel(0x00010101, &h32mx->ssr[4]);
-	writel(0x00000001, &h32mx->sassr[4]);
-	writel(0x00000001, &h32mx->srtsr[4]);
-
-	/* Configure Programmable Security peripherals on matrix 64 */
-	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
-	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
-	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
-
-	/* Configure Programmable Security peripherals on matrix 32 */
-	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
-	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
-
-	/* Enable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
-	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
-}
-
  void redirect_int_from_saic_to_aic(void)
  {
  	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;

arch/arm/mach-at91/matrix.c new file +51 -0

new file mode 100644
index 0000000..cf36386
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Wenyou Yang <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sama5_matrix.h>
+
+void matrix_init(void)
+{
+	struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
+	struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
+	int i;
+
+	/* Disable the write protect */
+	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
+	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+
+	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
+	for (i = 4; i <= 10; i++) {
+		writel(0x000f0f0f, &h64mx->ssr[i]);
+		writel(0x0000ffff, &h64mx->sassr[i]);
+		writel(0x0000000f, &h64mx->srtsr[i]);
+	}
+
+	/* CS3 */
+	writel(0x00c0c0c0, &h32mx->ssr[3]);
+	writel(0xff000000, &h32mx->sassr[3]);
+	writel(0xff000000, &h32mx->srtsr[3]);
+
+	/* NFC SRAM */
+	writel(0x00010101, &h32mx->ssr[4]);
+	writel(0x00000001, &h32mx->sassr[4]);
+	writel(0x00000001, &h32mx->srtsr[4]);
+
+	/* Configure Programmable Security peripherals on matrix 64 */
+	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
+	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
+	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
+
+	/* Configure Programmable Security peripherals on matrix 32 */
+	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
+	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
+
+	/* Enable the write protect */
+	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
+	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+}

Yang

2015-11-05 07:54 UTC #3 lore raw

PATCH 1/3 arm: at91/spl: matrix: move matrix init to separate file

Hi Josh,

Thank you for your review.

Quoted 7 lines

-----Original Message-----
From: Wu, Josh
Sent: 2015?11?5? 10:53
To: Yang, Wenyou; U-Boot Mailing List
Subject: Re: [U-Boot] [PATCH 1/3] arm: at91/spl: matrix: move matrix init to separate file

Quoted 8 lines

Hi, Wenyou
Quoted 3 lines · Wenyou Yang
To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c
is it possible just move it to mach-at91/armv7/matrix.c, as it is only used by armv7 core?

As you know, the at91 spl code is placed at the directory, mach-at91/, so place matrix.c here is acceptable. Yes, we should consider a separate directory to accommodate the at91 spl code in the future.

Quoted 155 lines

Best Regards,
Josh Wu
Quoted 7 lines
Signed-off-by Wenyou Yang <[email protected]>
---
  arch/arm/mach-at91/Makefile                |    2 +-
  arch/arm/mach-at91/armv7/sama5d4_devices.c |   42 -----------------------
  arch/arm/mach-at91/matrix.c                |   51
++++++++++++++++++++++++++++
arch/arm/mach-at91/Makefile obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
Quoted 8 lines
  3 files changed, 52 insertions(+), 43 deletions(-)
create mode 100644 arch/arm/mach-at91/matrix.c
arch/arm/mach-at91/Makefile +0 -0
index 313eb47..649aff2 100644
@@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
spl_at91.o
Quoted 22 lines
arch/arm/mach-at91/Makefile +1 -1
  obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
  obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
  obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
+obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
  obj-y += spl.o
  endif
 
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -1
index 76301d6..52f4862 100644
@@ -10,7 +10,6 @@
  #include <asm/arch/at91_common.h>
  #include <asm/arch/at91_pmc.h>
  #include <asm/arch/clk.h>
-#include <asm/arch/sama5_matrix.h>
  #include <asm/arch/sama5_sfr.h>
  #include <asm/arch/sama5d4.h>
 
arch/arm/mach-at91/armv7/sama5d4_devices.c void at91_udp_hw_init(void) · line 53
Quoted 6 lines
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -3
@@ -48,47 +47,6 @@ void at91_udp_hw_init(void)
  #endif
 
  #ifdef CONFIG_SPL_BUILD
-void matrix_init(void)
-{
-	struct atmel_matrix *h64mx = (struct atmel_matrix
*)ATMEL_BASE_MATRIX0;
arch/arm/mach-at91/armv7/sama5d4_devices.c void at91_udp_hw_init(void) · line 54
Quoted 1 line
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -1
-	struct atmel_matrix *h32mx = (struct atmel_matrix
*)ATMEL_BASE_MATRIX1;
arch/arm/mach-at91/armv7/sama5d4_devices.c void at91_udp_hw_init(void)
Quoted 4 lines
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -4
-	int i;
-
-	/* Disable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY &
~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
arch/arm/mach-at91/armv7/sama5d4_devices.c void at91_udp_hw_init(void) · line 59
Quoted 1 line
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -1
-	writel(ATMEL_MATRIX_WPMR_WPKEY &
~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
Quoted 19 lines
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-19~~
-
-	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
-	for (i = 4; i <= 10; i++) {
-		writel(0x000f0f0f, &h64mx->ssr[i]);
-		writel(0x0000ffff, &h64mx->sassr[i]);
-		writel(0x0000000f, &h64mx->srtsr[i]);
-	}
-
-	/* CS3 */
-	writel(0x00c0c0c0, &h32mx->ssr[3]);
-	writel(0xff000000, &h32mx->sassr[3]);
-	writel(0xff000000, &h32mx->srtsr[3]);
-
-	/* NFC SRAM */
-	writel(0x00010101, &h32mx->ssr[4]);
-	writel(0x00000001, &h32mx->sassr[4]);
-	writel(0x00000001, &h32mx->srtsr[4]);
-
-	/* Configure Programmable Security peripherals on matrix 64 */
arch/arm/mach-at91/armv7/sama5d4_devices.c void at91_udp_hw_init(void)
Quoted 10 lines
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-10~~
-	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
-	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
-	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
-
-	/* Configure Programmable Security peripherals on matrix 32 */
-	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
-	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
-
-	/* Enable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY |
ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
arch/arm/mach-at91/armv7/sama5d4_devices.c void at91_udp_hw_init(void) · line 89
Quoted 1 line
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -1
-	writel(ATMEL_MATRIX_WPMR_WPKEY |
ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
Quoted 14 lines
arch/arm/mach-at91/armv7/sama5d4_devices.c +0 -3
-}
-
  void redirect_int_from_saic_to_aic(void)
  {
  	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; diff
--git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c new
file mode 100644 index 0000000..cf36386
arch/arm/mach-at91/matrix.c new file +4 -0
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Wenyou Yang <[email protected]>
+ *
arch/arm/mach-at91/matrix.c line 14
Quoted 10 lines
arch/arm/mach-at91/matrix.c new file +10 -0
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sama5_matrix.h>
+
+void matrix_init(void)
+{
+	struct atmel_matrix *h64mx = (struct atmel_matrix
*)ATMEL_BASE_MATRIX0;
arch/arm/mach-at91/matrix.c line 15
Quoted 1 line
arch/arm/mach-at91/matrix.c new file +1 -0
+	struct atmel_matrix *h32mx = (struct atmel_matrix
*)ATMEL_BASE_MATRIX1;
arch/arm/mach-at91/matrix.c
Quoted 4 lines
arch/arm/mach-at91/matrix.c new file +4 -0
+	int i;
+
+	/* Disable the write protect */
+	writel(ATMEL_MATRIX_WPMR_WPKEY &
~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
arch/arm/mach-at91/matrix.c line 20
Quoted 1 line
arch/arm/mach-at91/matrix.c new file +1 -0
+	writel(ATMEL_MATRIX_WPMR_WPKEY &
~ATMEL_MATRIX_WPMR_WPEN,
Quoted 20 lines
arch/arm/mach-at91/matrix.c new file +20 -0
+&h32mx->wpmr);
+
+	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
+	for (i = 4; i <= 10; i++) {
+		writel(0x000f0f0f, &h64mx->ssr[i]);
+		writel(0x0000ffff, &h64mx->sassr[i]);
+		writel(0x0000000f, &h64mx->srtsr[i]);
+	}
+
+	/* CS3 */
+	writel(0x00c0c0c0, &h32mx->ssr[3]);
+	writel(0xff000000, &h32mx->sassr[3]);
+	writel(0xff000000, &h32mx->srtsr[3]);
+
+	/* NFC SRAM */
+	writel(0x00010101, &h32mx->ssr[4]);
+	writel(0x00000001, &h32mx->sassr[4]);
+	writel(0x00000001, &h32mx->srtsr[4]);
+
+	/* Configure Programmable Security peripherals on matrix 64 */
arch/arm/mach-at91/matrix.c
Quoted 10 lines
arch/arm/mach-at91/matrix.c new file +10 -0
+	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
+	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
+	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
+
+	/* Configure Programmable Security peripherals on matrix 32 */
+	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
+	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
+
+	/* Enable the write protect */
+	writel(ATMEL_MATRIX_WPMR_WPKEY |
ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);

Quoted 3 lines

arch/arm/mach-at91/matrix.c line 51
Quoted 1 line
arch/arm/mach-at91/matrix.c new file +1 -0
+	writel(ATMEL_MATRIX_WPMR_WPKEY |
ATMEL_MATRIX_WPMR_WPEN,
Quoted 1 line
+&h32mx->wpmr); }

Best Regards,
Wenyou Yang

Wenyou Yang

author

2015-11-04 06:28 UTC #4 lore raw

PATCH 2/3 arm: at91/spl: matrix: improve implementation of matrix

In reply to Wenyou Yang

To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding.

Remove the write protection mode code, it is unneeded for writing registers.

Remove the security peripheral selecting code, it is unneeded for SPL use-case.

Signed-off-by Wenyou Yang <[email protected]>

---

 arch/arm/mach-at91/include/mach/sama5d4.h |   25 +++++++++++++++++++++
 arch/arm/mach-at91/matrix.c               |   35 ++++++++---------------------
 2 files changed, 34 insertions(+), 26 deletions(-)

arch/arm/mach-at91/include/mach/sama5d4.h +25 -0

index 3da8aff..449cf0e 100644
@@ -179,6 +179,31 @@
 #define CPU_HAS_PCR
 #define CPU_HAS_H32MXDIV
 
+/* MATRIX0(H64MX) slave id definitions */
+#define H64MX_SLAVE_AXIMX_BRIDGE	0	/* Bridge from H64MX to AXIMX */
+#define H64MX_SLAVE_PERIPH_BRIDGE	1	/* H64MX Peripheral Bridge */
+#define H64MX_SLAVE_VDEC		2	/* Video Decoder */
+#define H64MX_SLAVE_DDRC_PORT0		3	/* DDR2 Port0-AESOTF */
+#define H64MX_SLAVE_DDRC_PORT1		4	/* DDR2 Port1 */
+#define H64MX_SLAVE_DDRC_PORT2		5	/* DDR2 Port2 */
+#define H64MX_SLAVE_DDRC_PORT3		6	/* DDR2 Port3 */
+#define H64MX_SLAVE_DDRC_PORT4		7	/* DDR2 Port4 */
+#define H64MX_SLAVE_DDRC_PORT5		8	/* DDR2 Port5 */
+#define H64MX_SLAVE_DDRC_PORT6		9	/* DDR2 Port6 */
+#define H64MX_SLAVE_DDRC_PORT7		10	/* DDR2 Port7 */
+#define H64MX_SLAVE_SRAM		11	/* Internal SRAM 128K */
+#define H64MX_SLAVE_H32MX_BRIDGE	12	/* Bridge from H64MX to H32MX */
+
+/* MATRIX1(H32MX) slave id definitions */
+#define H32MX_SLAVE_H64MX_BRIDGE	0	/* Bridge from H32MX to H64MX */
+#define H32MX_SLAVE_PERIPH_BRIDGE0	1	/* H32MX Peripheral Bridge 0 */
+#define H32MX_SLAVE_PERIPH_BRIDGE1	2	/* H32MX Peripheral Bridge 1 */
+#define H32MX_SLAVE_EBI			3	/* External Bus Interface */
+#define H32MX_SLAVE_NFC_CMD		3	/* NFC command Register */
+#define H32MX_SLAVE_NFC_SRAM		4	/* NFC SRAM */
+#define H32MX_SLAVE_USB			5	/* USB Device & Host */
+#define H32MX_SLAVE_SMD			6	/* Soft Modem (SMD) */
+
 /* sama5d4 series chip id definitions */
 #define ARCH_ID_SAMA5D4		0x8a5c07c0
 #define ARCH_EXID_SAMA5D41	0x00000001

arch/arm/mach-at91/matrix.c +9 ~~-26~~

index cf36386..57d7270 100644
@@ -15,37 +15,20 @@ void matrix_init(void)
 	struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
 	int i;
 
-	/* Disable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
-	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
-
-	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
-	for (i = 4; i <= 10; i++) {
+	/* DDR port 1 ~ port 7 */
+	for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) {
 		writel(0x000f0f0f, &h64mx->ssr[i]);
 		writel(0x0000ffff, &h64mx->sassr[i]);
 		writel(0x0000000f, &h64mx->srtsr[i]);
 	}
 
-	/* CS3 */
-	writel(0x00c0c0c0, &h32mx->ssr[3]);
-	writel(0xff000000, &h32mx->sassr[3]);
-	writel(0xff000000, &h32mx->srtsr[3]);
+	/* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */
+	writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]);
+	writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]);
+	writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
 
 	/* NFC SRAM */
-	writel(0x00010101, &h32mx->ssr[4]);
-	writel(0x00000001, &h32mx->sassr[4]);
-	writel(0x00000001, &h32mx->srtsr[4]);
-
-	/* Configure Programmable Security peripherals on matrix 64 */
-	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
-	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
-	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
-
-	/* Configure Programmable Security peripherals on matrix 32 */
-	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
-	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
-
-	/* Enable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
-	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+	writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]);
+	writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]);
+	writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]);
 }

Signature · 1 line

1.7.9.5

Josh Wu

2015-11-05 02:54 UTC #5 lore raw

PATCH 2/3 arm: at91/spl: matrix: improve implementation of matrix

Hi, Wenyou

Quoted 2 lines · Wenyou Yang

To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding.

it is better if you split the following 'removing code' as another patch.

Best Regards,
Josh Wu

Quoted 100 lines

Remove the write protection mode code, it is unneeded for writing registers.

Remove the security peripheral selecting code, it is unneeded for SPL use-case.

Signed-off-by Wenyou Yang <[email protected]>

---

  arch/arm/mach-at91/include/mach/sama5d4.h |   25 +++++++++++++++++++++
  arch/arm/mach-at91/matrix.c               |   35 ++++++++---------------------
  2 files changed, 34 insertions(+), 26 deletions(-)

arch/arm/mach-at91/include/mach/sama5d4.h +25 -0

index 3da8aff..449cf0e 100644
@@ -179,6 +179,31 @@
  #define CPU_HAS_PCR
  #define CPU_HAS_H32MXDIV
 
+/* MATRIX0(H64MX) slave id definitions */
+#define H64MX_SLAVE_AXIMX_BRIDGE	0	/* Bridge from H64MX to AXIMX */
+#define H64MX_SLAVE_PERIPH_BRIDGE	1	/* H64MX Peripheral Bridge */
+#define H64MX_SLAVE_VDEC		2	/* Video Decoder */
+#define H64MX_SLAVE_DDRC_PORT0		3	/* DDR2 Port0-AESOTF */
+#define H64MX_SLAVE_DDRC_PORT1		4	/* DDR2 Port1 */
+#define H64MX_SLAVE_DDRC_PORT2		5	/* DDR2 Port2 */
+#define H64MX_SLAVE_DDRC_PORT3		6	/* DDR2 Port3 */
+#define H64MX_SLAVE_DDRC_PORT4		7	/* DDR2 Port4 */
+#define H64MX_SLAVE_DDRC_PORT5		8	/* DDR2 Port5 */
+#define H64MX_SLAVE_DDRC_PORT6		9	/* DDR2 Port6 */
+#define H64MX_SLAVE_DDRC_PORT7		10	/* DDR2 Port7 */
+#define H64MX_SLAVE_SRAM		11	/* Internal SRAM 128K */
+#define H64MX_SLAVE_H32MX_BRIDGE	12	/* Bridge from H64MX to H32MX */
+
+/* MATRIX1(H32MX) slave id definitions */
+#define H32MX_SLAVE_H64MX_BRIDGE	0	/* Bridge from H32MX to H64MX */
+#define H32MX_SLAVE_PERIPH_BRIDGE0	1	/* H32MX Peripheral Bridge 0 */
+#define H32MX_SLAVE_PERIPH_BRIDGE1	2	/* H32MX Peripheral Bridge 1 */
+#define H32MX_SLAVE_EBI			3	/* External Bus Interface */
+#define H32MX_SLAVE_NFC_CMD		3	/* NFC command Register */
+#define H32MX_SLAVE_NFC_SRAM		4	/* NFC SRAM */
+#define H32MX_SLAVE_USB			5	/* USB Device & Host */
+#define H32MX_SLAVE_SMD			6	/* Soft Modem (SMD) */
+
  /* sama5d4 series chip id definitions */
  #define ARCH_ID_SAMA5D4		0x8a5c07c0
  #define ARCH_EXID_SAMA5D41	0x00000001

arch/arm/mach-at91/matrix.c +9 ~~-26~~

index cf36386..57d7270 100644
@@ -15,37 +15,20 @@ void matrix_init(void)
  	struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
  	int i;
 
-	/* Disable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
-	writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
-
-	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
-	for (i = 4; i <= 10; i++) {
+	/* DDR port 1 ~ port 7 */
+	for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) {
  		writel(0x000f0f0f, &h64mx->ssr[i]);
  		writel(0x0000ffff, &h64mx->sassr[i]);
  		writel(0x0000000f, &h64mx->srtsr[i]);
  	}
 
-	/* CS3 */
-	writel(0x00c0c0c0, &h32mx->ssr[3]);
-	writel(0xff000000, &h32mx->sassr[3]);
-	writel(0xff000000, &h32mx->srtsr[3]);
+	/* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */
+	writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]);
+	writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]);
+	writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
 
  	/* NFC SRAM */
-	writel(0x00010101, &h32mx->ssr[4]);
-	writel(0x00000001, &h32mx->sassr[4]);
-	writel(0x00000001, &h32mx->srtsr[4]);
-
-	/* Configure Programmable Security peripherals on matrix 64 */
-	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
-	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
-	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
-
-	/* Configure Programmable Security peripherals on matrix 32 */
-	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
-	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
-
-	/* Enable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
-	writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+	writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]);
+	writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]);
+	writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]);
  }

Yang

2015-11-05 07:57 UTC #6 lore raw

PATCH 2/3 arm: at91/spl: matrix: improve implementation of matrix

Hi Josh,

Thank you for your review.

Quoted 7 lines

-----Original Message-----
From: Wu, Josh
Sent: 2015?11?5? 10:54
To: Yang, Wenyou; U-Boot Mailing List
Subject: Re: [U-Boot] [PATCH 2/3] arm: at91/spl: matrix: improve implementation of matrix

Quoted 6 lines

Hi, Wenyou
Quoted 2 lines · Wenyou Yang
To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding.
it is better if you split the following 'removing code' as another patch.

Thank you for your advice, next version I will handle it.

Quoted 116 lines

Best Regards,
Josh Wu
Quoted 10 lines
Remove the write protection mode code, it is unneeded for writing registers.
Remove the security peripheral selecting code, it is unneeded for SPL use-case.
Signed-off-by Wenyou Yang <[email protected]>
---
  arch/arm/mach-at91/include/mach/sama5d4.h |   25
+++++++++++++++++++++
Quoted 9 lines
  arch/arm/mach-at91/matrix.c               |   35 ++++++++---------------------
  2 files changed, 34 insertions(+), 26 deletions(-)
arch/arm/mach-at91/include/mach/sama5d4.h +0 -0
index 3da8aff..449cf0e 100644
arch/arm/mach-at91/include/mach/sama5d4.h line 183
Quoted 5 lines
arch/arm/mach-at91/include/mach/sama5d4.h +2 -0
@@ -179,6 +179,31 @@
  #define CPU_HAS_PCR
  #define CPU_HAS_H32MXDIV
 
+/* MATRIX0(H64MX) slave id definitions */
+#define H64MX_SLAVE_AXIMX_BRIDGE	0	/* Bridge from H64MX to
AXIMX */
arch/arm/mach-at91/include/mach/sama5d4.h line 184
Quoted 1 line
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+#define H64MX_SLAVE_PERIPH_BRIDGE	1	/* H64MX Peripheral
Bridge */
arch/arm/mach-at91/include/mach/sama5d4.h line 186
Quoted 2 lines
arch/arm/mach-at91/include/mach/sama5d4.h +2 -0
+#define H64MX_SLAVE_VDEC		2	/* Video Decoder */
+#define H64MX_SLAVE_DDRC_PORT0		3	/* DDR2 Port0-
AESOTF */
arch/arm/mach-at91/include/mach/sama5d4.h
Quoted 9 lines
arch/arm/mach-at91/include/mach/sama5d4.h +9 -0
+#define H64MX_SLAVE_DDRC_PORT1		4	/* DDR2 Port1 */
+#define H64MX_SLAVE_DDRC_PORT2		5	/* DDR2 Port2 */
+#define H64MX_SLAVE_DDRC_PORT3		6	/* DDR2 Port3 */
+#define H64MX_SLAVE_DDRC_PORT4		7	/* DDR2 Port4 */
+#define H64MX_SLAVE_DDRC_PORT5		8	/* DDR2 Port5 */
+#define H64MX_SLAVE_DDRC_PORT6		9	/* DDR2 Port6 */
+#define H64MX_SLAVE_DDRC_PORT7		10	/* DDR2 Port7 */
+#define H64MX_SLAVE_SRAM		11	/* Internal SRAM 128K */
+#define H64MX_SLAVE_H32MX_BRIDGE	12	/* Bridge from H64MX to
H32MX */
arch/arm/mach-at91/include/mach/sama5d4.h
Quoted 3 lines
arch/arm/mach-at91/include/mach/sama5d4.h +3 -0
+
+/* MATRIX1(H32MX) slave id definitions */
+#define H32MX_SLAVE_H64MX_BRIDGE	0	/* Bridge from H32MX to
H64MX */
arch/arm/mach-at91/include/mach/sama5d4.h line 199
Quoted 1 line
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+#define H32MX_SLAVE_PERIPH_BRIDGE0	1	/* H32MX Peripheral
Bridge 0 */
arch/arm/mach-at91/include/mach/sama5d4.h line 200
Quoted 1 line
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+#define H32MX_SLAVE_PERIPH_BRIDGE1	2	/* H32MX Peripheral
Bridge 1 */
arch/arm/mach-at91/include/mach/sama5d4.h line 201
Quoted 1 line
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+#define H32MX_SLAVE_EBI			3	/* External Bus Interface
*/
arch/arm/mach-at91/include/mach/sama5d4.h line 202
Quoted 1 line
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+#define H32MX_SLAVE_NFC_CMD		3	/* NFC command
Register */
arch/arm/mach-at91/include/mach/sama5d4.h line 204
Quoted 2 lines
arch/arm/mach-at91/include/mach/sama5d4.h +2 -0
+#define H32MX_SLAVE_NFC_SRAM		4	/* NFC SRAM */
+#define H32MX_SLAVE_USB			5	/* USB Device &
Host */
arch/arm/mach-at91/include/mach/sama5d4.h line 205
Quoted 1 line
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+#define H32MX_SLAVE_SMD			6	/* Soft Modem
(SMD) */
arch/arm/mach-at91/matrix.c void matrix_init(void) · line 15
Quoted 10 lines
arch/arm/mach-at91/include/mach/sama5d4.h +1 -0
+
  /* sama5d4 series chip id definitions */
  #define ARCH_ID_SAMA5D4		0x8a5c07c0
  #define ARCH_EXID_SAMA5D41	0x00000001
arch/arm/mach-at91/matrix.c +0 -0
index cf36386..57d7270 100644
@@ -15,37 +15,20 @@ void matrix_init(void)
  	struct atmel_matrix *h32mx = (struct atmel_matrix
*)ATMEL_BASE_MATRIX1;
arch/arm/mach-at91/matrix.c void matrix_init(void)
Quoted 4 lines
arch/arm/mach-at91/matrix.c +0 -2
  	int i;
 
-	/* Disable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY &
~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
arch/arm/mach-at91/matrix.c void matrix_init(void) · line 20
Quoted 1 line
arch/arm/mach-at91/matrix.c +0 -1
-	writel(ATMEL_MATRIX_WPMR_WPKEY &
~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
arch/arm/mach-at91/matrix.c void matrix_init(void)
Quoted 5 lines
arch/arm/mach-at91/matrix.c +2 -3
-
-	/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
-	for (i = 4; i <= 10; i++) {
+	/* DDR port 1 ~ port 7 */
+	for (i = H64MX_SLAVE_DDRC_PORT1; i <=
H64MX_SLAVE_DDRC_PORT7; i++) {
Quoted 20 lines
arch/arm/mach-at91/matrix.c +4 -9
  		writel(0x000f0f0f, &h64mx->ssr[i]);
  		writel(0x0000ffff, &h64mx->sassr[i]);
  		writel(0x0000000f, &h64mx->srtsr[i]);
  	}
 
-	/* CS3 */
-	writel(0x00c0c0c0, &h32mx->ssr[3]);
-	writel(0xff000000, &h32mx->sassr[3]);
-	writel(0xff000000, &h32mx->srtsr[3]);
+	/* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */
+	writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]);
+	writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]);
+	writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
 
  	/* NFC SRAM */
-	writel(0x00010101, &h32mx->ssr[4]);
-	writel(0x00000001, &h32mx->sassr[4]);
-	writel(0x00000001, &h32mx->srtsr[4]);
-
-	/* Configure Programmable Security peripherals on matrix 64 */
arch/arm/mach-at91/matrix.c void matrix_init(void)
Quoted 10 lines
arch/arm/mach-at91/matrix.c +0 ~~-10~~
-	writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
-	writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
-	writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
-
-	/* Configure Programmable Security peripherals on matrix 32 */
-	writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
-	writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
-
-	/* Enable the write protect */
-	writel(ATMEL_MATRIX_WPMR_WPKEY |
ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);

Quoted 6 lines

arch/arm/mach-at91/matrix.c void matrix_init(void) · line 50
Quoted 1 line
arch/arm/mach-at91/matrix.c +0 -1
-	writel(ATMEL_MATRIX_WPMR_WPKEY |
ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
arch/arm/mach-at91/matrix.c void matrix_init(void) · line 34
Quoted 4 lines
arch/arm/mach-at91/matrix.c +3 -0
+	writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]);
+	writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]);
+	writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]);
  }

Best Regards,
Wenyou Yang

Wenyou Yang

author

2015-11-04 06:28 UTC #7 lore raw

PATCH 3/3 arm: at91: spl/atmel_sfr: move saic redirect to separate file

In reply to Wenyou Yang

To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c

Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value.

Signed-off-by Wenyou Yang <[email protected]>

---

 arch/arm/mach-at91/Makefile                 |    2 +-
 arch/arm/mach-at91/armv7/sama5d4_devices.c  |   13 -------------
 arch/arm/mach-at91/atmel_sfr.c              |   21 +++++++++++++++++++++
 arch/arm/mach-at91/include/mach/sama5_sfr.h |    1 -
 arch/arm/mach-at91/include/mach/sama5d4.h   |    3 +++
 5 files changed, 25 insertions(+), 15 deletions(-)
 create mode 100644 arch/arm/mach-at91/atmel_sfr.c

arch/arm/mach-at91/Makefile +1 -1

index 649aff2..ca60397 100644
@@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
 obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
 obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
 obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
+obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
 obj-y += spl.o
 endif

arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-13~~

index 52f4862..ce33cd4 100644
@@ -45,16 +45,3 @@ void at91_udp_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_UDPHS);
 }
 #endif
-
-#ifdef CONFIG_SPL_BUILD
-void redirect_int_from_saic_to_aic(void)
-{
-	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
-	u32 key32;
-
-	if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
-		key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
-		writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
-	}
-}
-#endif

arch/arm/mach-at91/atmel_sfr.c new file +21 -0

new file mode 100644
index 0000000..2bccb84
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Wenyou Yang <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sama5_sfr.h>
+
+void redirect_int_from_saic_to_aic(void)
+{
+	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
+	u32 key32;
+
+	if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
+		key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
+		writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
+	}
+}

arch/arm/mach-at91/include/mach/sama5_sfr.h +0 -1

index 3081d37..7b19a20 100644
@@ -32,7 +32,6 @@ struct atmel_sfr {
 #define ATMEL_SFR_DDRCFG_FDQSIEN	0x00020000
 
 /* Bit field in AICREDIR */
-#define ATMEL_SFR_AICREDIR_KEY		0x5F67B102
 #define ATMEL_SFR_AICREDIR_NSAIC	0x00000001
 
 #endif

arch/arm/mach-at91/include/mach/sama5d4.h +3 -0

index 449cf0e..90085da 100644
@@ -204,6 +204,9 @@
 #define H32MX_SLAVE_USB			5	/* USB Device & Host */
 #define H32MX_SLAVE_SMD			6	/* Soft Modem (SMD) */
 
+/* AICREDIR Unlock Key */
+#define ATMEL_SFR_AICREDIR_KEY		0x5F67B102
+
 /* sama5d4 series chip id definitions */
 #define ARCH_ID_SAMA5D4		0x8a5c07c0
 #define ARCH_EXID_SAMA5D41	0x00000001

Signature · 1 line

1.7.9.5

Josh Wu

2015-11-05 02:58 UTC #8 lore raw

PATCH 3/3 arm: at91: spl/atmel_sfr: move saic redirect to separate file

Hi, Wenyou

Quoted 4 lines · Wenyou Yang

To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c

maybe move it as mach-at91/armv7/atmel_sfr.c?

Best Regards,
Josh Wu

Quoted 102 lines

Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value.

Signed-off-by Wenyou Yang <[email protected]>

---

  arch/arm/mach-at91/Makefile                 |    2 +-
  arch/arm/mach-at91/armv7/sama5d4_devices.c  |   13 -------------
  arch/arm/mach-at91/atmel_sfr.c              |   21 +++++++++++++++++++++
  arch/arm/mach-at91/include/mach/sama5_sfr.h |    1 -
  arch/arm/mach-at91/include/mach/sama5d4.h   |    3 +++
  5 files changed, 25 insertions(+), 15 deletions(-)

create mode 100644 arch/arm/mach-at91/atmel_sfr.c

arch/arm/mach-at91/Makefile +1 -1

index 649aff2..ca60397 100644
@@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
  obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
  obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
  obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
+obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
  obj-y += spl.o
  endif

arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-13~~

index 52f4862..ce33cd4 100644
@@ -45,16 +45,3 @@ void at91_udp_hw_init(void)
  	at91_periph_clk_enable(ATMEL_ID_UDPHS);
  }
  #endif
-
-#ifdef CONFIG_SPL_BUILD
-void redirect_int_from_saic_to_aic(void)
-{
-	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
-	u32 key32;
-
-	if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
-		key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
-		writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
-	}
-}
-#endif

arch/arm/mach-at91/atmel_sfr.c new file +21 -0

new file mode 100644
index 0000000..2bccb84
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Wenyou Yang <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sama5_sfr.h>
+
+void redirect_int_from_saic_to_aic(void)
+{
+	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
+	u32 key32;
+
+	if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
+		key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
+		writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
+	}
+}

arch/arm/mach-at91/include/mach/sama5_sfr.h +0 -1

index 3081d37..7b19a20 100644
@@ -32,7 +32,6 @@ struct atmel_sfr {
  #define ATMEL_SFR_DDRCFG_FDQSIEN	0x00020000
 
  /* Bit field in AICREDIR */
-#define ATMEL_SFR_AICREDIR_KEY		0x5F67B102
  #define ATMEL_SFR_AICREDIR_NSAIC	0x00000001
 
  #endif

arch/arm/mach-at91/include/mach/sama5d4.h +3 -0

index 449cf0e..90085da 100644
@@ -204,6 +204,9 @@
  #define H32MX_SLAVE_USB			5	/* USB Device & Host */
  #define H32MX_SLAVE_SMD			6	/* Soft Modem (SMD) */
 
+/* AICREDIR Unlock Key */
+#define ATMEL_SFR_AICREDIR_KEY		0x5F67B102
+
  /* sama5d4 series chip id definitions */
  #define ARCH_ID_SAMA5D4		0x8a5c07c0
  #define ARCH_EXID_SAMA5D41	0x00000001

Yang

2015-11-05 07:55 UTC #9 lore raw

PATCH 3/3 arm: at91: spl/atmel_sfr: move saic redirect to separate file

Hi Josh,

Thank you for your review.

Quoted 9 lines

-----Original Message-----
From: Wu, Josh
Sent: 2015?11?5? 10:59
To: Yang, Wenyou; U-Boot Mailing List
Subject: Re: [U-Boot] [PATCH 3/3] arm: at91: spl/atmel_sfr: move saic redirect to separate file
Hi, Wenyou

Quoted 7 lines

Quoted 4 lines · Wenyou Yang
To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c
maybe move it as mach-at91/armv7/atmel_sfr.c?

The explanation is given at the previous mail.

Quoted 104 lines

Best Regards,
Josh Wu

Quoted 2 lines

Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each

SoC

arch/arm/mach-at91/Makefile obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o

Quoted 18 lines

has its own value.

Signed-off-by Wenyou Yang <[email protected]>

---

  arch/arm/mach-at91/Makefile                 |    2 +-
  arch/arm/mach-at91/armv7/sama5d4_devices.c  |   13 -------------
  arch/arm/mach-at91/atmel_sfr.c              |   21 +++++++++++++++++++++
  arch/arm/mach-at91/include/mach/sama5_sfr.h |    1 -
  arch/arm/mach-at91/include/mach/sama5d4.h   |    3 +++
  5 files changed, 25 insertions(+), 15 deletions(-)

create mode 100644 arch/arm/mach-at91/atmel_sfr.c

arch/arm/mach-at91/Makefile +0 -0

index 649aff2..ca60397 100644
@@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o

spl_at91.o

Quoted 76 lines

arch/arm/mach-at91/Makefile +1 -1

  obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
  obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
  obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
+obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
  obj-y += spl.o
  endif

arch/arm/mach-at91/armv7/sama5d4_devices.c +0 ~~-13~~

index 52f4862..ce33cd4 100644
@@ -45,16 +45,3 @@ void at91_udp_hw_init(void)
  	at91_periph_clk_enable(ATMEL_ID_UDPHS);
  }
  #endif
-
-#ifdef CONFIG_SPL_BUILD
-void redirect_int_from_saic_to_aic(void)
-{
-	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
-	u32 key32;
-
-	if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
-		key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
-		writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
-	}
-}
-#endif

(quoted diff) +0 -0

b/arch/arm/mach-at91/atmel_sfr.c new file mode 100644 index 0000000..2bccb84

arch/arm/mach-at91/atmel_sfr.c new file +21 -0

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Wenyou Yang <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sama5_sfr.h>
+
+void redirect_int_from_saic_to_aic(void)
+{
+	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
+	u32 key32;
+
+	if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
+		key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY;
+		writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir);
+	}
+}

arch/arm/mach-at91/include/mach/sama5_sfr.h +0 -1

index 3081d37..7b19a20 100644
@@ -32,7 +32,6 @@ struct atmel_sfr {
  #define ATMEL_SFR_DDRCFG_FDQSIEN	0x00020000
 
  /* Bit field in AICREDIR */
-#define ATMEL_SFR_AICREDIR_KEY		0x5F67B102
  #define ATMEL_SFR_AICREDIR_NSAIC	0x00000001
 
  #endif

arch/arm/mach-at91/include/mach/sama5d4.h +0 -0

index 449cf0e..90085da 100644

arch/arm/mach-at91/include/mach/sama5d4.h line 204

Quoted 1 line

arch/arm/mach-at91/include/mach/sama5d4.h +0 -0
@@ -204,6 +204,9 @@
  #define H32MX_SLAVE_USB			5	/* USB Device &

Host */

arch/arm/mach-at91/include/mach/sama5d4.h line 205

Quoted 1 line

arch/arm/mach-at91/include/mach/sama5d4.h +0 -0
  #define H32MX_SLAVE_SMD			6	/* Soft Modem

Quoted 8 lines

(SMD) */
arch/arm/mach-at91/include/mach/sama5d4.h line 212
Quoted 7 lines
arch/arm/mach-at91/include/mach/sama5d4.h +3 -0
+/* AICREDIR Unlock Key */
+#define ATMEL_SFR_AICREDIR_KEY		0x5F67B102
+
  /* sama5d4 series chip id definitions */
  #define ARCH_ID_SAMA5D4		0x8a5c07c0
  #define ARCH_EXID_SAMA5D41	0x00000001

Best Regards,
Wenyou Yang