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tty: amba-pl011: add options to earlycon for 32-bit reg access

PATCH New Timur Tabi 3 participants 8 messages Nov 6, 2015 – Nov 7, 2015

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Timur Tabi

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#0 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Add the "sbsa32" command-line option to earlycon to specify that the pl011 registers should be accessed with 32-bit accessors only. This is SBSA platforms

Similarly, also add the "zte" option for the ZTE UART. It's functionally similar to the standard PL011, but some registers are at different offsets.

Normal console uses the "access_32b" field of the vendor data structure to determine whether the registers needs 32-bit accessors. Early console is used before the vendor data is available, so we need a different mechanism to choose the accessor.

Example:

	earlycon=pl011,0x3ced1000,sbsa32

---

This patch applies on top of Russell's 12-part amba-pl011.c patchset.

 drivers/tty/serial/amba-pl011.c | 46 +++++++++++++++++++++++++++++++++++++----
 1 file changed, 42 insertions(+), 4 deletions(-)
drivers/tty/serial/amba-pl011.c +42 -4
index 373b152..58eda89 100644
@@ -2301,10 +2301,10 @@ static struct console amba_console = {
 
 static void pl011_putc(struct uart_port *port, int c)
 {
-	while (readl(port->membase + REG_FR) & UART01x_FR_TXFF)
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
 		;
-	writeb(c, port->membase + REG_DR);
-	while (readl(port->membase + REG_FR) & UART01x_FR_BUSY)
+	writeb(c, port->membase + UART01x_DR);
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY)
 		;
 }
 
@@ -2315,13 +2315,51 @@ static void pl011_early_write(struct console *con, const char *s, unsigned n)
 	uart_console_write(&dev->port, s, n, pl011_putc);
 }
 
+static void pl011_putc_sbsa32(struct uart_port *port, int c)
+{
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
+		cpu_relax();
+	writel(c, port->membase + UART01x_DR);
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY)
+		cpu_relax();
+}
+
+static void pl011_early_write_sbsa32(struct console *con, const char *s, unsigned n)
+{
+	struct earlycon_device *dev = con->data;
+
+	uart_console_write(&dev->port, s, n, pl011_putc_sbsa32);
+}
+
+static void pl011_putc_zte(struct uart_port *port, int c)
+{
+	while (readl(port->membase + ZX_UART011_FR) & UART01x_FR_TXFF)
+		cpu_relax();
+	writel(c, port->membase + ZX_UART011_DR);
+	while (readl(port->membase + ZX_UART011_FR) & UART01x_FR_BUSY)
+		cpu_relax();
+}
+
+static void pl011_early_write_zte(struct console *con, const char *s, unsigned n)
+{
+	struct earlycon_device *dev = con->data;
+
+	uart_console_write(&dev->port, s, n, pl011_putc_zte);
+}
+
 static int __init pl011_early_console_setup(struct earlycon_device *device,
 					    const char *opt)
 {
 	if (!device->port.membase)
 		return -ENODEV;
 
-	device->con->write = pl011_early_write;
+	if (strcmp(device->options, "sbsa32") == 0)
+		device->con->write = pl011_early_write_sbsa32;
+	else if (strcmp(device->options, "zte") == 0)
+		device->con->write = pl011_early_write_zte;
+	else
+		device->con->write = pl011_early_write;
+
 	return 0;
 }
 EARLYCON_DECLARE(pl011, pl011_early_console_setup);
Signature · 3 lines
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
#1 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Quoted 8 lines · Timur Tabi

Add the "sbsa32" command-line option to earlycon to specify that the pl011 registers should be accessed with 32-bit accessors only. This is SBSA platforms

Similarly, also add the "zte" option for the ZTE UART. It's functionally similar to the standard PL011, but some registers are at different offsets.

Quoted 8 lines

Normal console uses the "access_32b" field of the vendor data structure to determine whether the registers needs 32-bit accessors. Early console is used before the vendor data is available, so we need a different mechanism to choose the accessor.

Example:

	earlycon=pl011,0x3ced1000,sbsa32

Perhaps I wasn't clear enough in my previous comments regarding this approach; I see no benefit to re-using the pl011 earlycon definition. Just define a completely new earlycon for sbsa32 (and zte):

EARLYCON_DECLARE(sbsa32, sbsa32_early_console_setup);

Example:

	earlycon=sbsa32,0x3ced1000

Regards,
Peter Hurley

Quoted 80 lines

---

This patch applies on top of Russell's 12-part amba-pl011.c patchset.

 drivers/tty/serial/amba-pl011.c | 46 +++++++++++++++++++++++++++++++++++++----
 1 file changed, 42 insertions(+), 4 deletions(-)
drivers/tty/serial/amba-pl011.c +42 -4
index 373b152..58eda89 100644
@@ -2301,10 +2301,10 @@ static struct console amba_console = {
 
 static void pl011_putc(struct uart_port *port, int c)
 {
-	while (readl(port->membase + REG_FR) & UART01x_FR_TXFF)
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
 		;
-	writeb(c, port->membase + REG_DR);
-	while (readl(port->membase + REG_FR) & UART01x_FR_BUSY)
+	writeb(c, port->membase + UART01x_DR);
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY)
 		;
 }
 
@@ -2315,13 +2315,51 @@ static void pl011_early_write(struct console *con, const char *s, unsigned n)
 	uart_console_write(&dev->port, s, n, pl011_putc);
 }
 
+static void pl011_putc_sbsa32(struct uart_port *port, int c)
+{
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
+		cpu_relax();
+	writel(c, port->membase + UART01x_DR);
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY)
+		cpu_relax();
+}
+
+static void pl011_early_write_sbsa32(struct console *con, const char *s, unsigned n)
+{
+	struct earlycon_device *dev = con->data;
+
+	uart_console_write(&dev->port, s, n, pl011_putc_sbsa32);
+}
+
+static void pl011_putc_zte(struct uart_port *port, int c)
+{
+	while (readl(port->membase + ZX_UART011_FR) & UART01x_FR_TXFF)
+		cpu_relax();
+	writel(c, port->membase + ZX_UART011_DR);
+	while (readl(port->membase + ZX_UART011_FR) & UART01x_FR_BUSY)
+		cpu_relax();
+}
+
+static void pl011_early_write_zte(struct console *con, const char *s, unsigned n)
+{
+	struct earlycon_device *dev = con->data;
+
+	uart_console_write(&dev->port, s, n, pl011_putc_zte);
+}
+
 static int __init pl011_early_console_setup(struct earlycon_device *device,
 					    const char *opt)
 {
 	if (!device->port.membase)
 		return -ENODEV;
 
-	device->con->write = pl011_early_write;
+	if (strcmp(device->options, "sbsa32") == 0)
+		device->con->write = pl011_early_write_sbsa32;
+	else if (strcmp(device->options, "zte") == 0)
+		device->con->write = pl011_early_write_zte;
+	else
+		device->con->write = pl011_early_write;
+
 	return 0;
 }
 EARLYCON_DECLARE(pl011, pl011_early_console_setup);
author
#2 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Quoted 8 lines · Peter Hurley

Perhaps I wasn't clear enough in my previous comments regarding this approach; I see no benefit to re-using the pl011 earlycon definition. Just define a completely new earlycon for sbsa32 (and zte):

EARLYCON_DECLARE(sbsa32, sbsa32_early_console_setup);

Example:

	earlycon=sbsa32,0x3ced1000

Sounds like six of one, half-dozen of another. But I'm happy to modify my patch accordingly. It will avoid the strcmp, but I'm not sure it will reduce the actual number of lines of code.

Signature · 3 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
Code Aurora Forum, hosted by The Linux Foundation.
#3 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Quoted 11 lines · Timur Tabi
Quoted 8 lines · Peter Hurley

Perhaps I wasn't clear enough in my previous comments regarding this approach; I see no benefit to re-using the pl011 earlycon definition. Just define a completely new earlycon for sbsa32 (and zte):

EARLYCON_DECLARE(sbsa32, sbsa32_early_console_setup);

Example:

    earlycon=sbsa32,0x3ced1000

Sounds like six of one, half-dozen of another. But I'm happy to modify my patch accordingly. It will avoid the strcmp, but I'm not sure it will reduce the actual number of lines of code.

Or better yet, for sbsa32 earlycon, just use the existing port type constructs. So,

	earlycon=pl011,mmio32,0x3ced1000

which will set port->iotype to UPIO_MEM32, which in turn can be used to select the correct i/o width in pl011_putc().

Regards,
Peter Hurley

author
#4 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Quoted 7 lines · Peter Hurley

Or better yet, for sbsa32 earlycon, just use the existing port type constructs. So,

	earlycon=pl011,mmio32,0x3ced1000

which will set port->iotype to UPIO_MEM32, which in turn can be used to select the correct i/o width in pl011_putc().

That's a great idea. But why aren't we using it for pl011_write()?

static void pl011_write(unsigned int val, const struct uart_amba_port *uap,
unsigned int reg)

{
	void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg);

	if (uap->port.iotype == UPIO_MEM32)
		writel(val, addr);
	else
		writew(val, addr);
}
Signature · 3 lines
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
#5 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Quoted 10 lines · Timur Tabi
Quoted 7 lines · Peter Hurley

Or better yet, for sbsa32 earlycon, just use the existing port type constructs. So,

    earlycon=pl011,mmio32,0x3ced1000

which will set port->iotype to UPIO_MEM32, which in turn can be used to select the correct i/o width in pl011_putc().

That's a great idea. But why aren't we using it for pl011_write()?

I'll note that when I review Russell's v2 series, if necessary. What is the plan to introduce the SBSA32 support? After the ACPI support is upstreamed?

Regards,
Peter Hurley

Quoted 12 lines

static void pl011_write(unsigned int val, const struct uart_amba_port *uap,
unsigned int reg)

{
    void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg);

    if (uap->port.iotype == UPIO_MEM32)
        writel(val, addr);
    else
        writew(val, addr);
}
#6 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

Quoted 5 lines · Peter Hurley
Quoted 4 lines · Timur Tabi
Quoted 3 lines · Peter Hurley

Or better yet, for sbsa32 earlycon, just use the existing port type constructs. So,

Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
    earlycon=pl011,mmio32,0x3ced1000

which will set port->iotype to UPIO_MEM32, which in turn can be used to select the correct i/o width in pl011_putc().

That's a great idea. But why aren't we using it for pl011_write()?

I'll note that when I review Russell's v2 series, if necessary.

And I'm not rushing to post them yet as the merge window is currently open.

Signature · 2 lines
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according to speedtest.net.
author
#7 lore raw

PATCH 1/1 tty: amba-pl011: add options to earlycon for 32-bit reg access

In reply to Peter Hurley
Quoted 3 lines · Peter Hurley

I'll note that when I review Russell's v2 series, if necessary. What is the plan to introduce the SBSA32 support? After the ACPI support is upstreamed?

There are some patches from Leif Lindholm that address that. However, they will probably need to be reworked on top of Russell's patch set.

Signature · 3 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
Code Aurora Forum, hosted by The Linux Foundation.