arm: socfpga: reset: FIX address of tstscratch register
Subsystems (3)
PATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist 0x54 not 0x24.
Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02 page 3-17 Reset Manager Module Address Map
--- arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-socfpga/include/mach/reset_manager.h +1 -0
@@ -25,6 +25,7 @@ struct socfpga_reset_manager {u32 per2_mod_reset;u32 brg_mod_reset;u32 misc_mod_reset; +u32 padding2[12 ];u32 tstscratch; };
Signature · 1 line
2.1.4
PATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
Quoted 8 lines · Philipp Rosenberger
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist
0x54not0x24.Cyclone V Hard Processor System Technical Reference Manual
cv_5v42015.11.02 page 3-17 Reset Manager Module Address MapSigned-off-by Philipp Rosenberger <[email protected]>
Thanks for spotting this!
Quoted 10 lines
--- arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)(quoted diff) +0
-0
b/arch/arm/mach-socfpga/include/mach/reset_manager.hindex 8e59578..6eb6011 100644
arch/arm/mach-socfpga/include/mach/reset_manager.h struct socfpga_reset_manager { · line 30
Quoted 6 lines
arch/arm/mach-socfpga/include/mach/reset_manager.h +1
-0@@ -25,6 +25,7 @@ struct socfpga_reset_manager {u32 per2_mod_reset;u32 brg_mod_reset;u32 misc_mod_reset; +u32 padding2[12 ];u32 tstscratch; };
Best regards,
Marek Vasut
Marek Vasut
AppliedPATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
In reply to Philipp RosenbergerQuoted 8 lines · Philipp Rosenberger
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist
0x54not0x24.Cyclone V Hard Processor System Technical Reference Manual
cv_5v42015.11.02 page 3-17 Reset Manager Module Address MapSigned-off-by Philipp Rosenberger <[email protected]>
Applied, thanks!
Best regards,
Marek Vasut
PATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
In reply to Philipp RosenbergerHi Philipp,
Quoted 17 lines · Philipp Rosenberger
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist
0x54not0x24.Cyclone V Hard Processor System Technical Reference Manual
cv_5v42015.11.02 page 3-17 Reset Manager Module Address MapSigned-off-by Philipp Rosenberger <[email protected]>--- arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)arch/arm/mach-socfpga/include/mach/reset_manager.h +0
-0
arch/arm/mach-socfpga/include/mach/reset_manager.h struct socfpga_reset_manager { · line 30
Quoted 6 lines
arch/arm/mach-socfpga/include/mach/reset_manager.h +1
-0@@ -25,6 +25,7 @@ struct socfpga_reset_manager {u32 per2_mod_reset;u32 brg_mod_reset;u32 misc_mod_reset; +u32 padding2[12 ];u32 tstscratch; };
Thanks. But usually such padding things are added as "u8" (1 byte) variables. This makes it easier to calculate the offsets. In this case:
+ u8 padding2[0x30];
which I would prefer.
Thanks,
Stefan
PATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
Quoted 39 lines · Stefan Roese
Hi Philipp,
Quoted 28 lines · Philipp Rosenberger
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist
0x54not0x24.Cyclone V Hard Processor System Technical Reference Manual
cv_5v42015.11.02 page 3-17 Reset Manager Module Address MapSigned-off-by Philipp Rosenberger <[email protected]>---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)(quoted diff) +0
-0
b/arch/arm/mach-socfpga/include/mach/reset_manager.hindex 8e59578..6eb6011 100644arch/arm/mach-socfpga/include/mach/reset_manager.h +1
-0@@ -25,6 +25,7 @@ struct socfpga_reset_manager {u32 per2_mod_reset;u32 brg_mod_reset;u32 misc_mod_reset; +u32 padding2[12 ];u32 tstscratch;
Quoted 1 line
};Thanks. But usually such padding things are added as "u8" (1 byte) variables. This makes it easier to calculate the offsets. In this case:
(quoted diff) +1
-0+ u8 padding2[0x30];
Quoted 1 line
which I would prefer.
I don't mind either way, I can amend the patch (if you don't mind), so let's hear Dinh's final word.
Best regards,
Marek Vasut
PATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
Hi Marek,
Quoted 38 lines · Marek Vasut
Quoted 37 lines · Stefan Roese
Hi Philipp,
Quoted 28 lines · Philipp Rosenberger
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist
0x54not0x24.Cyclone V Hard Processor System Technical Reference Manual
cv_5v42015.11.02 page 3-17 Reset Manager Module Address MapSigned-off-by Philipp Rosenberger <[email protected]>---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)(quoted diff) +0
-0
b/arch/arm/mach-socfpga/include/mach/reset_manager.hindex 8e59578..6eb6011 100644arch/arm/mach-socfpga/include/mach/reset_manager.h +1
-0@@ -25,6 +25,7 @@ struct socfpga_reset_manager {u32 per2_mod_reset;u32 brg_mod_reset;u32 misc_mod_reset; +u32 padding2[12 ];u32 tstscratch;
Quoted 1 line
};Thanks. But usually such padding things are added as "u8" (1 byte) variables. This makes it easier to calculate the offsets. In this case:
Quoted 6 lines
Quoted 3 lines
(quoted diff) +1
-0+ u8 padding2[0x30];which I would prefer.
I don't mind either way, I can amend the patch (if you don't mind), so let's hear Dinh's final word.
If we use u8 in the place we should change the padding1 in the same struct as well.
Best Regards
Philipp Rosenberger
PATCH 1/1 arm: socfpga: reset: FIX address of tstscratch register
Quoted 43 lines · Philipp Rosenberger
Hi Marek,
Quoted 40 lines · Marek Vasut
Quoted 39 lines · Stefan Roese
Hi Philipp,
Quoted 28 lines · Philipp Rosenberger
The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist
0x54not0x24.Cyclone V Hard Processor System Technical Reference Manual
cv_5v42015.11.02 page 3-17 Reset Manager Module Address MapSigned-off-by Philipp Rosenberger <[email protected]>---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + 1 file changed, 1 insertion(+)(quoted diff) +0
-0
b/arch/arm/mach-socfpga/include/mach/reset_manager.hindex 8e59578..6eb6011 100644arch/arm/mach-socfpga/include/mach/reset_manager.h +1
-0@@ -25,6 +25,7 @@ struct socfpga_reset_manager {u32 per2_mod_reset;u32 brg_mod_reset;u32 misc_mod_reset; +u32 padding2[12 ];u32 tstscratch;
Quoted 1 line
};Thanks. But usually such padding things are added as "u8" (1 byte) variables. This makes it easier to calculate the offsets. In this case:
(quoted diff) +1
-0+ u8 padding2[0x30];
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
which I would prefer.
I don't mind either way, I can amend the patch (if you don't mind), so let's hear Dinh's final word.
If we use u8 in the place we should change the padding1 in the same struct as well.
In that case, we keep it as-is . Subsequent patch is welcome if anyone cares.
Best regards,
Marek Vasut