armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Introduce a new function to calculate reserved memory to replace macro CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
---
README | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++++++++++++++++++ board/freescale/ls2085a/ls2085a.c | 17 ----------------- board/freescale/ls2085aqds/ls2085aqds.c | 17 ----------------- board/freescale/ls2085ardb/ls2085ardb.c | 17 ----------------- common/board_f.c | 14 +++++++++++--- include/configs/ls2085a_common.h | 5 ++--- 7 files changed, 34 insertions(+), 60 deletions(-)
README +3 -3
@@ -3889,7 +3889,7 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address. -- CONFIG_SYS_MEM_TOP_HIDE (PPC only): +- CONFIG_SYS_MEM_TOP_HIDE: If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By
@@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot booting. - CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE Define minimum DDR size required for debug server image -- CONFIG_SYS_MEM_TOP_HIDE_MIN - Define minimum DDR size to be hided from top of the DDR memory +- CONFIG_SYS_MC_RESERV_MEM_ALIGN + Define alignment of reserved memory MC requires Reproducible builds -------------------
arch/arm/cpu/armv8/fsl-layerscape/cpu.c +18 -0
@@ -663,3 +663,21 @@ void reset_cpu(ulong addr) val |=0x02 ;scfg_out32 (rstcr, val); } + +unsigned long board_reserve_ram_top (unsigned long ram_size) +{ +unsigned long ram_top = ram_size; + +/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER + ram_top -=debug_server_get_dram_block_size (); +#endif + +/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET + ram_top -=mc_get_dram_block_size (); + ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN -1 ); +#endif + +return ram_size - ram_top; +}
board/freescale/ls2085a/ls2085a.c +0 -17
@@ -66,23 +66,6 @@ int arch_misc_init(void) }#endif -unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -int board_eth_init (bd_t *bis) {int error =0 ;
board/freescale/ls2085aqds/ls2085aqds.c +0 -17
@@ -251,23 +251,6 @@ int arch_misc_init(void) }#endif -unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -#ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet (void *fdt) {
board/freescale/ls2085ardb/ls2085ardb.c +0 -17
@@ -217,23 +217,6 @@ int arch_misc_init(void) }#endif -unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -#ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet (void *fdt) {
common/board_f.c +11 -3
@@ -316,6 +316,15 @@ __weak ulong board_get_usable_ram_top(ulong total_size)return gd->ram_top; } +__weak ulong board_reserve_ram_top (ulong ram_size) +{ +#ifdef CONFIG_SYS_MEM_TOP_HIDE +return CONFIG_SYS_MEM_TOP_HIDE ; +#else +return 0 ; +#endif +} +static int setup_dest_addr (void ) {debug ("Monitor len: %08lX\n" , gd->mon_len);
@@ -332,7 +341,6 @@ static int setup_dest_addr(void)*/ gd->secure_ram = gd->ram_size;#endif -#if defined(CONFIG_SYS_MEM_TOP_HIDE )/* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size
@@ -343,8 +351,8 @@ static int setup_dest_addr(void)* memory size from the SDRAM controller setup will have to * get fixed. */ - gd->ram_size -=CONFIG_SYS_MEM_TOP_HIDE ; -#endif + gd->ram_size -=board_reserve_ram_top (gd->ram_size); +#ifdef CONFIG_SYS_SDRAM_BASE gd->ram_top =CONFIG_SYS_SDRAM_BASE ;#endif
include/configs/ls2085a_common.h +2 -3
@@ -193,10 +193,9 @@ unsigned long long get_qixis_addr(void);* 512MB aligned, so the min size to hide is 512MB. */ #if defined(CONFIG_FSL_MC_ENET ) || defined(CONFIG_FSL_DEBUG_SERVER ) -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254UL * 1024 * 1024)#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() +#define CONFIG_SYS_MC_RESERV_MEM_ALIGN (512UL * 1024 * 1024)#endif /* PCIe */
Signature · 1 line
1.7.9.5
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Quoted 5 lines · York Sun
Introduce a new function to calculate reserved memory to replace macro
CONFIG_SYS_MEM_TOP_HIDEfor more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
I would make sure "pram" is first to reserve memory, is it?
?Jocke
Quoted 204 lines
Signed-off-by York Sun <[email protected]>---
?README??????????????????????????????????|????6 +++--- ?arch/arm/cpu/armv8/fsl-layerscape/cpu.c |???18 ++++++++++++++++++ ?board/freescale/ls2085a/ls2085a.c???????|???17 ----------------- ?board/freescale/ls2085aqds/ls2085aqds.c |???17 ----------------- ?board/freescale/ls2085ardb/ls2085ardb.c |???17 ----------------- ?common/board_f.c????????????????????????|???14 +++++++++++--- ?include/configs/ls2085a_common.h????????|????5 ++---?7 files changed, 34 insertions(+), 60 deletions(-)
README +0
-0@@ -3889,7 +3889,7 @@ Configuration Settings: ? the RAM base is not zero, or RAM is divided into banks,? this variable needs to be recalcuated to get the address.
?
--CONFIG_SYS_MEM_TOP_HIDE(PPC only):
+-CONFIG_SYS_MEM_TOP_HIDE:
? IfCONFIG_SYS_MEM_TOP_HIDEis defined in the board config header,
? this specified memory area will get subtracted from the top
? (end) of RAM and won't get "touched" at all by U-Boot. ByREADME +0
-0@@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot booting.?-
CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
? Define minimum DDR size required for debug server image
?
--CONFIG_SYS_MEM_TOP_HIDE_MINREADME +2
-1- Define minimum DDR size to be hided from top of the DDR memory +- CONFIG_SYS_MC_RESERV_MEM_ALIGN + Define alignment of reserved memory MC requires?
?Reproducible builds
?-------------------arch/arm/cpu/armv8/fsl-layerscape/cpu.c +18
-0@@ -663,3 +663,21 @@ void reset_cpu(ulong addr) ? val |= 0x02; ? scfg_out32(rstcr, val); ?} + +unsigned long board_reserve_ram_top (unsigned long ram_size) +{ +unsigned long ram_top = ram_size; + +/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER + ram_top -=debug_server_get_dram_block_size (); +#endif + +/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET + ram_top -=mc_get_dram_block_size (); + ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN -1 ); +#endif + +return ram_size - ram_top; +}board/freescale/ls2085a/ls2085a.c +0
-0@@ -66,23 +66,6 @@ int arch_misc_init(void) ?}?#endif
?board/freescale/ls2085a/ls2085a.c +0
-17-unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -?int
board_eth_init(bd_t *bis)
?{
? int error = 0;board/freescale/ls2085aqds/ls2085aqds.c +0
-0@@ -251,23 +251,6 @@ int arch_misc_init(void) ?}?#endif
?board/freescale/ls2085aqds/ls2085aqds.c +0
-17-unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -?#ifdef
CONFIG_FSL_MC_ENET
?voidfdt_fixup_board_enet(void *fdt)
?{board/freescale/ls2085ardb/ls2085ardb.c +0
-0@@ -217,23 +217,6 @@ int arch_misc_init(void) ?}?#endif
?board/freescale/ls2085ardb/ls2085ardb.c +0
-17-unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -?#ifdef
CONFIG_FSL_MC_ENET
?voidfdt_fixup_board_enet(void *fdt)
?{common/board_f.c +0
-0@@ -316,6 +316,15 @@ __weak ulong board_get_usable_ram_top(ulong total_size) ? return gd->ram_top; ?}?
common/board_f.c +9
-0+__weak ulong board_reserve_ram_top (ulong ram_size) +{ +#ifdef CONFIG_SYS_MEM_TOP_HIDE +return CONFIG_SYS_MEM_TOP_HIDE ; +#else +return 0 ; +#endif +} +?static int
setup_dest_addr(void)
?{
?debug("Monitor len: %08lX\n", gd->mon_len);common/board_f.c +0
-0@@ -332,7 +341,6 @@ static int setup_dest_addr(void)? ?*/
?gd->secure_ram=gd->ram_size;
?#endif
-#ifdefined(CONFIG_SYS_MEM_TOP_HIDE)
? /*
? ?* Subtract specified amount of memory to hide so that it won't
? ?* get "touched" at all by U-Boot. By fixing upgd->ram_sizecommon/board_f.c +0
-0@@ -343,8 +351,8 @@ static int setup_dest_addr(void)? ?* memory size from the SDRAM controller setup will have to
? ?* get fixed.
? ?*/common/board_f.c +2
-2- gd->ram_size -=CONFIG_SYS_MEM_TOP_HIDE ; -#endif + gd->ram_size -=board_reserve_ram_top (gd->ram_size); +?#ifdef
CONFIG_SYS_SDRAM_BASE
?gd->ram_top=CONFIG_SYS_SDRAM_BASE;
?#endifinclude/configs/ls2085a_common.h +0
-0@@ -193,10 +193,9 @@ unsigned long long get_qixis_addr(void);? * 512MB aligned, so the min size to hide is 512MB.
? */
?#ifdefined(CONFIG_FSL_MC_ENET)||defined(CONFIG_FSL_DEBUG_SERVER)include/configs/ls2085a_common.h +1
-1-#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254UL * 1024 * 1024)?#define
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE(256UL * 1024 * 1024)include/configs/ls2085a_common.h +1
-2-#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() +#define CONFIG_SYS_MC_RESERV_MEM_ALIGN (512UL * 1024 * 1024)?#endif
?
?/* PCIe */
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Yes, pram is used to reserve small memory from the top of u-boot memory, not necessarily the top of total memory. For example, a 32-bit u-boot with large memory.
York
Sent on a Sprint Samsung Galaxy Note? II
-------- Original message --------
From: Joakim Tjernlund
Date:11/12/2015 2:55 PM (GMT-08:00)
To: Sun York-R58495 , u-boot at lists.denx.de
Cc: Wood Scott-B07421 , Yoder Stuart-B08248 , treding at nvidia.com, swarren at nvidia.com, trini at konsulko.com, abrodkin at synopsys.com, Gong Qianyu-B52263 , Rivera Jose-B46482 , joe.hershberger at ni.com, Hou Zhiqiang-B48286 , angelo at sysam.it
Subject: Re: [U-Boot] [PATCH v1] armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Quoted 5 lines · York Sun
Introduce a new function to calculate reserved memory to replace macro
CONFIG_SYS_MEM_TOP_HIDEfor more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.
I would make sure "pram" is first to reserve memory, is it?
Jocke
Quoted 204 lines
Signed-off-by York Sun <[email protected]>---
README | 6 +++--- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 18 ++++++++++++++++++ board/freescale/ls2085a/ls2085a.c | 17 ----------------- board/freescale/ls2085aqds/ls2085aqds.c | 17 ----------------- board/freescale/ls2085ardb/ls2085ardb.c | 17 ----------------- common/board_f.c | 14 +++++++++++--- include/configs/ls2085a_common.h | 5 ++--- 7 files changed, 34 insertions(+), 60 deletions(-)README +3
-3@@ -3889,7 +3889,7 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address. -- CONFIG_SYS_MEM_TOP_HIDE (PPC only): +- CONFIG_SYS_MEM_TOP_HIDE: If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By@@ -5068,8 +5068,8 @@ This firmware often needs to be loaded during U-Boot booting. - CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE Define minimum DDR size required for debug server image -- CONFIG_SYS_MEM_TOP_HIDE_MIN - Define minimum DDR size to be hided from top of the DDR memory +- CONFIG_SYS_MC_RESERV_MEM_ALIGN + Define alignment of reserved memory MC requires Reproducible builds -------------------arch/arm/cpu/armv8/fsl-layerscape/cpu.c +18
-0@@ -663,3 +663,21 @@ void reset_cpu(ulong addr) val |=0x02 ;scfg_out32 (rstcr, val); } + +unsigned long board_reserve_ram_top (unsigned long ram_size) +{ +unsigned long ram_top = ram_size; + +/* Carve the Debug Server private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_DEBUG_SERVER + ram_top -=debug_server_get_dram_block_size (); +#endif + +/* Carve the MC private DRAM block from the end of DRAM */ +#ifdef CONFIG_FSL_MC_ENET + ram_top -=mc_get_dram_block_size (); + ram_top &= ~(CONFIG_SYS_MC_RESERV_MEM_ALIGN -1 ); +#endif + +return ram_size - ram_top; +}board/freescale/ls2085a/ls2085a.c +0
-17@@ -66,23 +66,6 @@ int arch_misc_init(void) }#endif -unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -int board_eth_init (bd_t *bis) {int error =0 ;board/freescale/ls2085aqds/ls2085aqds.c +0
-17@@ -251,23 +251,6 @@ int arch_misc_init(void) }#endif -unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -#ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet (void *fdt) {board/freescale/ls2085ardb/ls2085ardb.c +0
-17@@ -217,23 +217,6 @@ int arch_misc_init(void) }#endif -unsigned long get_dram_size_to_hide (void ) -{ -unsigned long dram_to_hide =0 ; - -/* Carve the Debug Server private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_DEBUG_SERVER - dram_to_hide +=debug_server_get_dram_block_size (); -#endif - -/* Carve the MC private DRAM block from the end of DRAM */ -#ifdef CONFIG_FSL_MC_ENET - dram_to_hide +=mc_get_dram_block_size (); -#endif - -return roundup (dram_to_hide,CONFIG_SYS_MEM_TOP_HIDE_MIN ); -} -#ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet (void *fdt) {common/board_f.c +11
-3@@ -316,6 +316,15 @@ __weak ulong board_get_usable_ram_top(ulong total_size)return gd->ram_top; } +__weak ulong board_reserve_ram_top (ulong ram_size) +{ +#ifdef CONFIG_SYS_MEM_TOP_HIDE +return CONFIG_SYS_MEM_TOP_HIDE ; +#else +return 0 ; +#endif +} +static int setup_dest_addr (void ) {debug ("Monitor len: %08lX\n" , gd->mon_len);@@ -332,7 +341,6 @@ static int setup_dest_addr(void)*/ gd->secure_ram = gd->ram_size;#endif -#if defined(CONFIG_SYS_MEM_TOP_HIDE )/* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size @@ -343,8 +351,8 @@ static int setup_dest_addr(void)* memory size from the SDRAM controller setup will have to * get fixed. */ - gd->ram_size -=CONFIG_SYS_MEM_TOP_HIDE ; -#endif + gd->ram_size -=board_reserve_ram_top (gd->ram_size); +#ifdef CONFIG_SYS_SDRAM_BASE gd->ram_top =CONFIG_SYS_SDRAM_BASE ;#endif include/configs/ls2085a_common.h +2
-3@@ -193,10 +193,9 @@ unsigned long long get_qixis_addr(void);* 512MB aligned, so the min size to hide is 512MB. */ #if defined(CONFIG_FSL_MC_ENET ) || defined(CONFIG_FSL_DEBUG_SERVER ) -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254UL * 1024 * 1024)#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) -#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() +#define CONFIG_SYS_MC_RESERV_MEM_ALIGN (512UL * 1024 * 1024)#endif /* PCIe */
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
In reply to Joakim TjernlundQuoted 9 lines · Joakim Tjernlund
Quoted 5 lines · York Sun
Introduce a new function to calculate reserved memory to replace macro
CONFIG_SYS_MEM_TOP_HIDEfor more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.I would make sure "pram" is first to reserve memory, is it?
(previous reply wasn't caught by patchwork, adding more info)
Yes, pram is used to reserve small memory from the top of u-boot memory, not necessarily the top of total memory. For example, a 32-bit u-boot with large memory. This patch deals with carving memory from the end of memory, which could be far away from u-boot top. Even in system with small memory, it is still correct, because pram reserves memory from the _top_ of u-boot and this mechanism reserved memory is hidden from u-boot.
York
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Quoted 12 lines · York Sun
Quoted 9 lines · Joakim Tjernlund
Quoted 5 lines · York Sun
Introduce a new function to calculate reserved memory to replace macro
CONFIG_SYS_MEM_TOP_HIDEfor more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.I would make sure "pram" is first to reserve memory, is it?
Quoted 8 lines
(previous reply wasn't caught by patchwork, adding more info)
Yes, pram is used to reserve small memory from the top of u-boot memory, not necessarily the top of total memory. For example, a 32-bit u-boot with large memory. This patch deals with carving memory from the end of memory, which could be far away from u-boot top. Even in system with small memory, it is still correct, because pram reserves memory from the _top_ of u-boot and this mechanism reserved memory is hidden from u-boot.
And I realize I am mixing pram and CONFIG_SYS_MEM_TOP_HIDE. Your patch reserves memory before CONFIG_SYS_MEM_TOP_HIDE which might be confusing
for some. Why do you need another( then CONFIG_SYS_MEM_TOP_HIDE) method to reserve memory?
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Quoted 22 lines · Joakim Tjernlund
Quoted 12 lines · York Sun
Quoted 9 lines · Joakim Tjernlund
Quoted 5 lines · York Sun
Introduce a new function to calculate reserved memory to replace macro
CONFIG_SYS_MEM_TOP_HIDEfor more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.I would make sure "pram" is first to reserve memory, is it?
Quoted 8 lines
(previous reply wasn't caught by patchwork, adding more info)
Yes, pram is used to reserve small memory from the top of u-boot memory, not necessarily the top of total memory. For example, a 32-bit u-boot with large memory. This patch deals with carving memory from the end of memory, which could be far away from u-boot top. Even in system with small memory, it is still correct, because pram reserves memory from the _top_ of u-boot and this mechanism reserved memory is hidden from u-boot.
Quoted 4 lines
And I realize I am mixing pram and
CONFIG_SYS_MEM_TOP_HIDE. Your patch reserves memory beforeCONFIG_SYS_MEM_TOP_HIDEwhich might be confusing
for some. Why do you needanother( then CONFIG_SYS_MEM_TOP_HIDE)method to reserve memory?
I am not going to discover the legacy reason to have CONFIG_SYS_MEM_TOP_HIDE. For my current use on ARMv8, we have management complex (aks MC) and debug server. They both require a big chunk of private memory (even after OS boots up). I am taking advantage of existing CONFIG_SYS_MEM_TOP_HIDE to reserve this memory without fragment memory and without the need to create reserved memory node in device tree.
With that in place, I think it makes sense to do the same way for reserving secure memory.
York
PATCH 1/1 armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
Quoted 37 lines · York Sun
Quoted 22 lines · Joakim Tjernlund
Quoted 12 lines · York Sun
Quoted 9 lines · Joakim Tjernlund
Quoted 5 lines · York Sun
Introduce a new function to calculate reserved memory to replace macro
CONFIG_SYS_MEM_TOP_HIDEfor more flexibility. Legacy use of this macro is still supported. MC and debug server are not board-specific. Move the reservation function to SoC file. Reduce debug server memory by 2MB to make room for secure memory.I would make sure "pram" is first to reserve memory, is it?
Quoted 8 lines
(previous reply wasn't caught by patchwork, adding more info)
Yes, pram is used to reserve small memory from the top of u-boot memory, not necessarily the top of total memory. For example, a 32-bit u-boot with large memory. This patch deals with carving memory from the end of memory, which could be far away from u-boot top. Even in system with small memory, it is still correct, because pram reserves memory from the _top_ of u-boot and this mechanism reserved memory is hidden from u-boot.
Quoted 4 lines
And I realize I am mixing pram and
CONFIG_SYS_MEM_TOP_HIDE. Your patch reserves memory beforeCONFIG_SYS_MEM_TOP_HIDEwhich might be confusing
for some. Why do you needanother( then CONFIG_SYS_MEM_TOP_HIDE)method to reserve memory?I am not going to discover the legacy reason to have
CONFIG_SYS_MEM_TOP_HIDE. For my current use on ARMv8, we have management complex (aks MC) and debug server. They both require a big chunk of private memory (even after OS boots up). I am taking advantage of existingCONFIG_SYS_MEM_TOP_HIDEto reserve this memory without fragment memory and without the need to create reserved memory node in device tree.
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With that in place, I think it makes sense to do the same way for reserving secure memory.
Jocke,
Did I clear your questions? Let me know if you have further comments.
York