ARM: BCM5310X: activate erratas needed for SoC
Subsystems (3)
PATCH 1/1 ARM: BCM5310X: activate erratas needed for SoC
The BCM4708 I have, which is probably the first generation which got to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known erratas in the Linux kernel which could be activated and will be in this patch. There are currently no workarounds which have to be activated for the L2C-310 rev r3p2 in Linux.
--- arch/arm/mach-bcm/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
arch/arm/mach-bcm/Kconfig +4 -0
@@ -52,6 +52,10 @@ config ARCH_BCM_NSP config ARCH_BCM_5301X bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7 select ARCH_BCM_IPROC + select ARM_ERRATA_754322 + select ARM_ERRATA_775420 + select ARM_ERRATA_764369 if SMP + help Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
Signature · 1 line
2.6.2
Florian Fainelli
AppliedPATCH 1/1 ARM: BCM5310X: activate erratas needed for SoC
Quoted 8 lines · Hauke Mehrtens
The BCM4708 I have, which is probably the first generation which got to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known erratas in the Linux kernel which could be activated and will be in this patch. There are currently no workarounds which have to be activated for the L2C-310 rev r3p2 in Linux.
Signed-off-by Hauke Mehrtens <[email protected]>
Applied to soc/next, thanks!
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Florian