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LPC4337 CIAA-NXP DTS changes

PATCH New Ariel D'Alessandro 2 participants 16 messages Nov 23, 2015 – Dec 17, 2015 Device tree bindings

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Ariel D'Alessandro

author
#0 lore raw

cover LPC4337 CIAA-NXP DTS changes

Hi,

This patch set includes some DTS changes for LPC4337 CIAA-NXP board. It is based on tag next-20151120 of the linux-next repository. It has been successfully tested on a LPC4337 CIAA-NXP Board.

Ariel D'Alessandro (3):
ARM: dts: lpc4337-ciaa: enable EEPROM memory
ARM: dts: lpc4337-ciaa: enable SCT-PWM
ARM: dts: lpc4337-ciaa: add i2c0 and devices

 arch/arm/boot/dts/lpc4337-ciaa.dts | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
Signature · 1 line
2.6.2
author
#1 lore raw

PATCH 1/3 ARM: dts: lpc4337-ciaa: enable EEPROM memory

The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
index 5f500c1..03bdf77 100644
@@ -155,6 +155,10 @@
 	};
 };
 
+&eeprom {
+	status = "okay";
+};
+
 &enet_tx_clk {
 	clock-frequency = <50000000>;
 };
Signature · 1 line
2.6.2
author
#2 lore raw

PATCH 1/3 ARM: dts: lpc4337-ciaa: enable EEPROM memory

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 24 lines

The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
index 5f500c1..03bdf77 100644
@@ -155,6 +155,10 @@
 	};
 };
 
+&eeprom {
+	status = "okay";
+};
+
 &enet_tx_clk {
 	clock-frequency = <50000000>;
 };
Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
#3 lore raw

PATCH 1/3 ARM: dts: lpc4337-ciaa: enable EEPROM memory

Hi Ariel,

Quoted 19 lines · Ariel D'Alessandro

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 16 lines

The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +0 -0
index 5f500c1..03bdf77 100644
@@ -155,6 +155,10 @@
      };
 };
Quoted 4 lines

arch/arm/boot/dts/lpc4337-ciaa.dts line 161

Quoted 4 lines
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
+&eeprom {
+     status = "okay";
+};
+

I already had a patch that enabled the eeprom for all boards that included the lpc4357.dtsi from when I tested your driver. So opted to use that patch instead of this one. This is really a SoC device feature that doesn't require any board resources so I think it is better to have this entry in lpc4357.dtsi.

regards,
Joachim Eastwood

author
#4 lore raw

PATCH 1/3 ARM: dts: lpc4337-ciaa: enable EEPROM memory

Joachim,

El 14/12/15 a las 19:52, Joachim Eastwood escribi?:

Quoted 23 lines

Hi Ariel,

Quoted 19 lines · Ariel D'Alessandro

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 16 lines

The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +0 -0
index 5f500c1..03bdf77 100644
@@ -155,6 +155,10 @@
      };
 };
Quoted 10 lines
Quoted 4 lines

arch/arm/boot/dts/lpc4337-ciaa.dts line 161

Quoted 4 lines
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
+&eeprom {
+     status = "okay";
+};
+

I already had a patch that enabled the eeprom for all boards that included the lpc4357.dtsi from when I tested your driver. So opted to use that patch instead of this one. This is really a SoC device feature that doesn't require any board resources so I think it is better to have this entry in lpc4357.dtsi.

Yeah, you're right. Fine for me, thanks.

Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
author
#5 lore raw

PATCH 2/3 ARM: dts: lpc4337-ciaa: enable SCT-PWM

In reply to Ariel D'Alessandro

Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
index 03bdf77..1a23589 100644
@@ -170,6 +170,10 @@
 	pinctrl-0 = <&enet_rmii_pins>;
 };
 
+&sct_pwm {
+	status = "okay";
+};
+
 &ssp1 {
 	status = "okay";
 	pinctrl-names = "default";
Signature · 1 line
2.6.2
author
#6 lore raw

PATCH 2/3 ARM: dts: lpc4337-ciaa: enable SCT-PWM

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 24 lines

Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
index 03bdf77..1a23589 100644
@@ -170,6 +170,10 @@
 	pinctrl-0 = <&enet_rmii_pins>;
 };
 
+&sct_pwm {
+	status = "okay";
+};
+
 &ssp1 {
 	status = "okay";
 	pinctrl-names = "default";
Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
#7 lore raw

PATCH 2/3 ARM: dts: lpc4337-ciaa: enable SCT-PWM

Hi Ariel,

Sorry for the late reply. I have just started to put together my DT for 4.5 branch now.

Quoted 19 lines · Ariel D'Alessandro

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 16 lines

Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +0 -0
index 03bdf77..1a23589 100644
@@ -170,6 +170,10 @@
      pinctrl-0 = <&enet_rmii_pins>;
 };
Quoted 4 lines

arch/arm/boot/dts/lpc4337-ciaa.dts line 176

Quoted 4 lines
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
+&sct_pwm {
+     status = "okay";
+};
+

Isn't this a bit useless without any pinmux setup?

regards,
Joachim Eastwood

author
#8 lore raw

PATCH 2/3 ARM: dts: lpc4337-ciaa: enable SCT-PWM

Joachim,

El 14/12/15 a las 19:48, Joachim Eastwood escribi?:

Quoted 26 lines

Hi Ariel,

Sorry for the late reply. I have just started to put together my DT for 4.5 branch now.

Quoted 19 lines · Ariel D'Alessandro

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 16 lines

Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +0 -0
index 03bdf77..1a23589 100644
@@ -170,6 +170,10 @@
      pinctrl-0 = <&enet_rmii_pins>;
 };
Quoted 6 lines
Quoted 4 lines

arch/arm/boot/dts/lpc4337-ciaa.dts line 176

Quoted 4 lines
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
+&sct_pwm {
+     status = "okay";
+};
+

Isn't this a bit useless without any pinmux setup?

Yes, it might be kind of useless. Do you think it shouldn't be enabled then?

Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
#9 lore raw

PATCH 2/3 ARM: dts: lpc4337-ciaa: enable SCT-PWM

Quoted 29 lines · Ariel D'Alessandro

Joachim,

El 14/12/15 a las 19:48, Joachim Eastwood escribi?:

Quoted 26 lines

Hi Ariel,

Sorry for the late reply. I have just started to put together my DT for 4.5 branch now.

Quoted 19 lines · Ariel D'Alessandro

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 16 lines

Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +0 -0
index 03bdf77..1a23589 100644
@@ -170,6 +170,10 @@
      pinctrl-0 = <&enet_rmii_pins>;
 };
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines

arch/arm/boot/dts/lpc4337-ciaa.dts line 176

Quoted 4 lines
arch/arm/boot/dts/lpc4337-ciaa.dts +4 -0
+&sct_pwm {
+     status = "okay";
+};
+

Isn't this a bit useless without any pinmux setup?

Yes, it might be kind of useless. Do you think it shouldn't be enabled then?

It would be nice to have a board with sct-pwm enabled. Would it possible for you to assign a pin to it?

regards,
Joachim Eastwood

author
#10 lore raw

PATCH 3/3 ARM: dts: lpc4337-ciaa: add i2c0 and devices

In reply to Ariel D'Alessandro

Add I2C0 and two I2C EEPROM devices on the CIAA-NXP board:

* 24AA1025 EEPROM, 1Mbit: it is accessed as two 512Kbit EEPROMs.
* 24AA025E48 EEPROM, 2kbit.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +30 -0
index 1a23589..d81047a 100644
@@ -99,6 +99,14 @@
 		};
 	};
 
+	i2c0_pins: i2c0-pins {
+		i2c0_pins_cfg {
+			pins = "i2c0_scl", "i2c0_sda";
+			function = "i2c0";
+			input-enable;
+		};
+	};
+
 	ssp_pins: ssp-pins {
 		ssp1_cs {
 			pins = "p6_7";

@@ -163,6 +171,28 @@
 	clock-frequency = <50000000>;
 };
 
+&i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	clock-frequency = <400000>;
+
+	eeprom at 50 {
+		compatible = "microchip,24c512";
+		reg = <0x50>;
+	};
+
+	eeprom at 51 {
+		compatible = "microchip,24c02";
+		reg = <0x51>;
+	};
+
+	eeprom at 54 {
+		compatible = "microchip,24c512";
+		reg = <0x54>;
+	};
+};
+
 &mac {
 	status = "okay";
 	phy-mode = "rmii";
Signature · 1 line
2.6.2
author
#11 lore raw

PATCH 3/3 ARM: dts: lpc4337-ciaa: add i2c0 and devices

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 59 lines

Add I2C0 and two I2C EEPROM devices on the CIAA-NXP board:

* 24AA1025 EEPROM, 1Mbit: it is accessed as two 512Kbit EEPROMs.
* 24AA025E48 EEPROM, 2kbit.

Signed-off-by Ariel D'Alessandro <[email protected]>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm/boot/dts/lpc4337-ciaa.dts +30 -0
index 1a23589..d81047a 100644
@@ -99,6 +99,14 @@
 		};
 	};
 
+	i2c0_pins: i2c0-pins {
+		i2c0_pins_cfg {
+			pins = "i2c0_scl", "i2c0_sda";
+			function = "i2c0";
+			input-enable;
+		};
+	};
+
 	ssp_pins: ssp-pins {
 		ssp1_cs {
 			pins = "p6_7";

@@ -163,6 +171,28 @@
 	clock-frequency = <50000000>;
 };
 
+&i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	clock-frequency = <400000>;
+
+	eeprom at 50 {
+		compatible = "microchip,24c512";
+		reg = <0x50>;
+	};
+
+	eeprom at 51 {
+		compatible = "microchip,24c02";
+		reg = <0x51>;
+	};
+
+	eeprom at 54 {
+		compatible = "microchip,24c512";
+		reg = <0x54>;
+	};
+};
+
 &mac {
 	status = "okay";
 	phy-mode = "rmii";
Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
author
#12 lore raw

cover LPC4337 CIAA-NXP DTS changes

In reply to Ariel D'Alessandro

(+Cc Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 14 lines

Hi,

This patch set includes some DTS changes for LPC4337 CIAA-NXP board. It is based on tag next-20151120 of the linux-next repository. It has been successfully tested on a LPC4337 CIAA-NXP Board.

Ariel D'Alessandro (3):
ARM: dts: lpc4337-ciaa: enable EEPROM memory
ARM: dts: lpc4337-ciaa: enable SCT-PWM
ARM: dts: lpc4337-ciaa: add i2c0 and devices

 arch/arm/boot/dts/lpc4337-ciaa.dts | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
#13 lore raw

cover LPC4337 CIAA-NXP DTS changes

Hi Ariel,

Quoted 13 lines · Ariel D'Alessandro

(+Cc Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 10 lines

Hi,

This patch set includes some DTS changes for LPC4337 CIAA-NXP board. It is based on tag next-20151120 of the linux-next repository. It has been successfully tested on a LPC4337 CIAA-NXP Board.

Ariel D'Alessandro (3):
ARM: dts: lpc4337-ciaa: enable EEPROM memory
ARM: dts: lpc4337-ciaa: enable SCT-PWM
ARM: dts: lpc4337-ciaa: add i2c0 and devices

If you want me to pick up the patches please put me in the To field so they end up in my inbox.

regards,
Joachim Eastwood

author
#14 lore raw

cover LPC4337 CIAA-NXP DTS changes

Joachim,

El 23/11/15 a las 15:17, Joachim Eastwood escribi?:

Quoted 13 lines

Hi Ariel,

Quoted 9 lines · Ariel D'Alessandro

(+Cc Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 6 lines

Hi,

This patch set includes some DTS changes for LPC4337 CIAA-NXP board. It is based on tag next-20151120 of the linux-next repository. It has been successfully tested on a LPC4337 CIAA-NXP Board.

Quoted 7 lines
Quoted 4 lines
Quoted 4 lines

Ariel D'Alessandro (3):
ARM: dts: lpc4337-ciaa: enable EEPROM memory
ARM: dts: lpc4337-ciaa: enable SCT-PWM
ARM: dts: lpc4337-ciaa: add i2c0 and devices

If you want me to pick up the patches please put me in the To field so they end up in my inbox.

OK, I'm resending with you in the To field.

Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar
author
#15 lore raw

cover LPC4337 CIAA-NXP DTS changes

In reply to Ariel D'Alessandro

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:

Quoted 14 lines

Hi,

This patch set includes some DTS changes for LPC4337 CIAA-NXP board. It is based on tag next-20151120 of the linux-next repository. It has been successfully tested on a LPC4337 CIAA-NXP Board.

Ariel D'Alessandro (3):
ARM: dts: lpc4337-ciaa: enable EEPROM memory
ARM: dts: lpc4337-ciaa: enable SCT-PWM
ARM: dts: lpc4337-ciaa: add i2c0 and devices

 arch/arm/boot/dts/lpc4337-ciaa.dts | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
Signature · 2 lines
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar