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ARM: dts: rockchip: update the thermal management on rk3288

PATCH New Heiko Stübner 3 participants 5 messages Nov 30, 2015 – Dec 1, 2015

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#0 lore raw

PATCH 1/2 ARM: dts: rockchip: update the thermal management on rk3288

From: Caesar Wang <[email protected]>

In some cases the machine radiating is very poor,sometime the temperature is rising very quickly on heavy loading.So we need have more frequent polling and better granularity.

---
 arch/arm/boot/dts/rk3288-thermal.dtsi | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)
arch/arm/boot/dts/rk3288-thermal.dtsi +12 -2
index 3404066..651b962 100644
@@ -52,7 +52,7 @@ reserve_thermal: reserve_thermal {
 };
 
 cpu_thermal: cpu_thermal {
-	polling-delay-passive = <1000>; /* milliseconds */
+	polling-delay-passive = <100>; /* milliseconds */
 	polling-delay = <5000>; /* milliseconds */
 
 	thermal-sensors = <&tsadc 1>;
@@ -63,6 +63,11 @@ cpu_thermal: cpu_thermal {
 			hysteresis = <2000>; /* millicelsius */
 			type = "passive";
 		};
+		cpu_alert1: cpu_alert1 {
+			temperature = <75000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
 		cpu_crit: cpu_crit {
 			temperature = <90000>; /* millicelsius */
 			hysteresis = <2000>; /* millicelsius */
@@ -74,13 +79,18 @@ cpu_thermal: cpu_thermal {
 		map0 {
 			trip = <&cpu_alert0>;
 			cooling-device =
+				<&cpu0 THERMAL_NO_LIMIT 6>;
+		};
+		map1 {
+			trip = <&cpu_alert1>;
+			cooling-device =
 				<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 		};
 	};
 };
 
 gpu_thermal: gpu_thermal {
-	polling-delay-passive = <1000>; /* milliseconds */
+	polling-delay-passive = <100>; /* milliseconds */
 	polling-delay = <5000>; /* milliseconds */
 
 	thermal-sensors = <&tsadc 2>;
Signature · 1 line
2.6.1
#1 lore raw

PATCH 1/2 ARM: dts: rockchip: update the thermal management on rk3288

Hi Dmitry,

Am Montag, 30. November 2015, 14:13:17 schrieb Heiko St?bner:

Quoted 9 lines

From: Caesar Wang <[email protected]>

In some cases the machine radiating is very poor,sometime the temperature is rising very quickly on heavy loading.So we need have more frequent polling and better granularity.

it looks like I forget to Cc you on this mail, because I'd like to keep your Reviewed-by tag :-) . So can I keep your tag? Otherwise I'll just drop it when applying.

Thanks
Heiko

Quoted 49 lines
---
 arch/arm/boot/dts/rk3288-thermal.dtsi | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)
(quoted diff) +0 -0

b/arch/arm/boot/dts/rk3288-thermal.dtsi index 3404066..651b962 100644

arch/arm/boot/dts/rk3288-thermal.dtsi +12 -2
@@ -52,7 +52,7 @@ reserve_thermal: reserve_thermal {
 };
 
 cpu_thermal: cpu_thermal {
-	polling-delay-passive = <1000>; /* milliseconds */
+	polling-delay-passive = <100>; /* milliseconds */
 	polling-delay = <5000>; /* milliseconds */
 
 	thermal-sensors = <&tsadc 1>;
@@ -63,6 +63,11 @@ cpu_thermal: cpu_thermal {
 			hysteresis = <2000>; /* millicelsius */
 			type = "passive";
 		};
+		cpu_alert1: cpu_alert1 {
+			temperature = <75000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
 		cpu_crit: cpu_crit {
 			temperature = <90000>; /* millicelsius */
 			hysteresis = <2000>; /* millicelsius */
@@ -74,13 +79,18 @@ cpu_thermal: cpu_thermal {
 		map0 {
 			trip = <&cpu_alert0>;
 			cooling-device =
+				<&cpu0 THERMAL_NO_LIMIT 6>;
+		};
+		map1 {
+			trip = <&cpu_alert1>;
+			cooling-device =
 				<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 		};
 	};
 };
 
 gpu_thermal: gpu_thermal {
-	polling-delay-passive = <1000>; /* milliseconds */
+	polling-delay-passive = <100>; /* milliseconds */
 	polling-delay = <5000>; /* milliseconds */
 
 	thermal-sensors = <&tsadc 2>;
#2 lore raw

PATCH 2/2 ARM: dts: rockchip: override thermal settings on veyron-speedy

In reply to Heiko Stübner

According to a commit on the ChromeOS kernel, the temperature of the Speedy surface is over skin temperature spec. So adjust the thermal settings to mimic the ChromeOS tree to stay within these spec limits.

---
 arch/arm/boot/dts/rk3288-veyron-speedy.dts | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/rk3288-veyron-speedy.dts +8 -0
index a7ea7d0..b34a7b5 100644
@@ -88,6 +88,14 @@
 	};
 };
 
+&cpu_alert0 {
+	temperature = <65000>;
+};
+
+&cpu_alert1 {
+	temperature = <70000>;
+};
+
 &rk808 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pmic_int_l>;
Signature · 1 line
2.6.1
#3 lore raw

PATCH 2/2 ARM: dts: rockchip: override thermal settings on veyron-speedy

Hi Heiko,

? 2015?11?30? 21:14, Heiko St?bner ??:

Quoted 15 lines

According to a commit on the ChromeOS kernel, the temperature of the Speedy surface is over skin temperature spec. So adjust the thermal settings to mimic the ChromeOS tree to stay within these spec limits.

---
  arch/arm/boot/dts/rk3288-veyron-speedy.dts | 8 ++++++++
  1 file changed, 8 insertions(+)
arch/arm/boot/dts/rk3288-veyron-speedy.dts +0 -0
index a7ea7d0..b34a7b5 100644
@@ -88,6 +88,14 @@
  	};

arch/arm/boot/dts/rk3288-veyron-speedy.dts line 98

Quoted 10 lines
arch/arm/boot/dts/rk3288-veyron-speedy.dts +8 -0
  };
 
+&cpu_alert0 {
+	temperature = <65000>;
+};
+
+&cpu_alert1 {
+	temperature = <70000>;
+};
+

Yep, as the mass of thermal data from OEM with all kinds of testing. The 65/70 degree is very suit for speedy. (e.g.: Power, Performance).

So, feel free add my tag: :-)

Quoted 3 lines
arch/arm/boot/dts/rk3288-veyron-speedy.dts +0 -0
  &rk808 {
  	pinctrl-names = "default";
  	pinctrl-0 = <&pmic_int_l>;
maintainer Applied
#4 lore raw

PATCH 1/2 ARM: dts: rockchip: update the thermal management on rk3288

In reply to Heiko Stübner

Am Montag, 30. November 2015, 14:13:17 schrieb Heiko St?bner:

Quoted 9 lines

From: Caesar Wang <[email protected]>

In some cases the machine radiating is very poor,sometime the temperature is rising very quickly on heavy loading.So we need have more frequent polling and better granularity.

applied both patches to my dts32 branch for 4.5