armv8: fsl-layerscape: Fix "cpu release" command
PATCH 1/1 armv8: fsl-layerscape: Fix "cpu release" command
When one core is released, other cores may not have valid entry address. Those cores are trapped by "wfe" and wait for further instruction. When their address is set, they need to be kicked off by "sev".
Signed-off-by York Sun <[email protected]>
---
arch/arm/cpu/armv8/fsl-layerscape/mp.c | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm/cpu/armv8/fsl-layerscape/mp.c +6 -0
@@ -192,6 +192,12 @@ int cpu_release(int nr, int argc, char * const argv[]) (unsigned long)table + SPIN_TABLE_ELEM_SIZE); asmvolatile ("dsb st" );smp_kick_all_cpus ();/* only those with entry addr set will run */ +/* +* When the first release command runs, all cores are set to go. Those +* without a valid entry address will be trapped by "wfe". "sev" kicks +* them off to check the address again. When set, they continue to run. +*/ + asmvolatile ("sev" );return 0 ; }
Signature · 1 line
1.7.9.5
York Sun
AppliedPATCH 1/1 armv8: fsl-layerscape: Fix "cpu release" command
Quoted 5 lines · York Sun
When one core is released, other cores may not have valid entry address. Those cores are trapped by "wfe" and wait for further instruction. When their address is set, they need to be kicked off by "sev".
Quoted 7 lines
Signed-off-by York Sun <[email protected]>---
arch/arm/cpu/armv8/fsl-layerscape/mp.c | 6 ++++++ 1 file changed, 6 insertions(+)
Applied to fsl-qoriq master.
York