include: Add log2 header from the kernel
Subsystems (18)
PATCH v7 1/21 include: Add log2 header from the kernel
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
---
Changes since v6:
- None
include/linux/log2.h | 205 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 205 insertions(+) create mode 100644 include/linux/log2.h
include/linux/log2.h new file +205 -0
@@ -0,0 +1,205 @@ +/* Integer base 2 logarithm calculation +* +* Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. +* Written by David Howells (dhowells at redhat.com) +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef _LINUX_LOG2_H +#define _LINUX_LOG2_H + +#include <linux/types.h> +#include <linux/bitops.h> + +/* +* deal with unrepresentable constant logarithms +*/ +extern __attribute__((const, noreturn)) +int ____ilog2_NaN (void ); + +/* +* non-constant log of base 2 calculators +* - the arch may override these in asm/bitops.h if they can be implemented +* more efficiently than using fls() and fls64() +* - the arch is not required to handle n==0 if implementing the fallback +*/ +#ifndef CONFIG_ARCH_HAS_ILOG2_U32 +static inline __attribute__((const)) +int __ilog2_u32 (u32 n) +{ +return fls (n) -1 ; +} +#endif + +#ifndef CONFIG_ARCH_HAS_ILOG2_U64 +static inline __attribute__((const)) +int __ilog2_u64 (u64 n) +{ +return fls64 (n) -1 ; +} +#endif + +/* +* Determine whether some value is a power of two, where zero is +* *not* considered a power of two. +*/ + +static inline __attribute__((const)) +bool is_power_of_2 (unsigned long n) +{ +return (n !=0 && ((n & (n -1 )) ==0 )); +} + +/* +* round up to nearest power of two +*/ +static inline __attribute__((const)) +unsigned long __roundup_pow_of_two (unsigned long n) +{ +return 1UL <<fls_long (n -1 ); +} + +/* +* round down to nearest power of two +*/ +static inline __attribute__((const)) +unsigned long __rounddown_pow_of_two (unsigned long n) +{ +return 1UL << (fls_long (n) -1 ); +} + +/** +* ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value +* @n - parameter +* +* constant-capable log of base 2 calculation +* - this can be used to initialise global variables from constant data, hence +* the massive ternary operator construction +* +* selects the appropriately-sized optimised version depending on sizeof(n) +*/ +#define ilog2 (n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n) < 1 ? ____ilog2_NaN() : \ + (n) & (1ULL << 63) ? 63 : \ + (n) & (1ULL << 62) ? 62 : \ + (n) & (1ULL << 61) ? 61 : \ + (n) & (1ULL << 60) ? 60 : \ + (n) & (1ULL << 59) ? 59 : \ + (n) & (1ULL << 58) ? 58 : \ + (n) & (1ULL << 57) ? 57 : \ + (n) & (1ULL << 56) ? 56 : \ + (n) & (1ULL << 55) ? 55 : \ + (n) & (1ULL << 54) ? 54 : \ + (n) & (1ULL << 53) ? 53 : \ + (n) & (1ULL << 52) ? 52 : \ + (n) & (1ULL << 51) ? 51 : \ + (n) & (1ULL << 50) ? 50 : \ + (n) & (1ULL << 49) ? 49 : \ + (n) & (1ULL << 48) ? 48 : \ + (n) & (1ULL << 47) ? 47 : \ + (n) & (1ULL << 46) ? 46 : \ + (n) & (1ULL << 45) ? 45 : \ + (n) & (1ULL << 44) ? 44 : \ + (n) & (1ULL << 43) ? 43 : \ + (n) & (1ULL << 42) ? 42 : \ + (n) & (1ULL << 41) ? 41 : \ + (n) & (1ULL << 40) ? 40 : \ + (n) & (1ULL << 39) ? 39 : \ + (n) & (1ULL << 38) ? 38 : \ + (n) & (1ULL << 37) ? 37 : \ + (n) & (1ULL << 36) ? 36 : \ + (n) & (1ULL << 35) ? 35 : \ + (n) & (1ULL << 34) ? 34 : \ + (n) & (1ULL << 33) ? 33 : \ + (n) & (1ULL << 32) ? 32 : \ + (n) & (1ULL << 31) ? 31 : \ + (n) & (1ULL << 30) ? 30 : \ + (n) & (1ULL << 29) ? 29 : \ + (n) & (1ULL << 28) ? 28 : \ + (n) & (1ULL << 27) ? 27 : \ + (n) & (1ULL << 26) ? 26 : \ + (n) & (1ULL << 25) ? 25 : \ + (n) & (1ULL << 24) ? 24 : \ + (n) & (1ULL << 23) ? 23 : \ + (n) & (1ULL << 22) ? 22 : \ + (n) & (1ULL << 21) ? 21 : \ + (n) & (1ULL << 20) ? 20 : \ + (n) & (1ULL << 19) ? 19 : \ + (n) & (1ULL << 18) ? 18 : \ + (n) & (1ULL << 17) ? 17 : \ + (n) & (1ULL << 16) ? 16 : \ + (n) & (1ULL << 15) ? 15 : \ + (n) & (1ULL << 14) ? 14 : \ + (n) & (1ULL << 13) ? 13 : \ + (n) & (1ULL << 12) ? 12 : \ + (n) & (1ULL << 11) ? 11 : \ + (n) & (1ULL << 10) ? 10 : \ + (n) & (1ULL << 9) ? 9 : \ + (n) & (1ULL << 8) ? 8 : \ + (n) & (1ULL << 7) ? 7 : \ + (n) & (1ULL << 6) ? 6 : \ + (n) & (1ULL << 5) ? 5 : \ + (n) & (1ULL << 4) ? 4 : \ + (n) & (1ULL << 3) ? 3 : \ + (n) & (1ULL << 2) ? 2 : \ + (n) & (1ULL << 1) ? 1 : \ + (n) & (1ULL << 0) ? 0 : \ + ____ilog2_NaN() \ + ) : \ + (sizeof(n) <= 4) ? \ + __ilog2_u32(n) : \ + __ilog2_u64(n) \ + ) + +/** +* roundup_pow_of_two - round the given value up to nearest power of two +* @n - parameter +* +* round the given value up to the nearest power of two +* - the result is undefined when n == 0 +* - this can be used to initialise global variables from constant data +*/ +#define roundup_pow_of_two (n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n == 1) ? 1 : \ + (1UL << (ilog2((n) - 1) + 1)) \ + ) : \ + __roundup_pow_of_two(n) \ + ) + +/** +* rounddown_pow_of_two - round the given value down to nearest power of two +* @n - parameter +* +* round the given value down to the nearest power of two +* - the result is undefined when n == 0 +* - this can be used to initialise global variables from constant data +*/ +#define rounddown_pow_of_two (n) \ +( \ + __builtin_constant_p(n) ? ( \ + (1UL << ilog2(n))) : \ + __rounddown_pow_of_two(n) \ + ) + +/** +* order_base_2 - calculate the (rounded up) base 2 order of the argument +* @n: parameter +* +* The first few values calculated by this routine: +* ob2(0) = 0 +* ob2(1) = 0 +* ob2(2) = 1 +* ob2(3) = 2 +* ob2(4) = 2 +* ob2(5) = 3 +* ... and so on. +*/ + +#define order_base_2 (n) ilog2(roundup_pow_of_two(n)) + +#endif /* _LINUX_LOG2_H */
Signature · 1 line
1.9.1
PATCH v7 2/21 include: Add generic bitops headers
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
---
Changes since v6:
- Do not touch include/linux/bitops here to avoid build warnings (Daniel)
include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls.h | 41 ++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+) create mode 100644 include/asm-generic/bitops/__ffs.h create mode 100644 include/asm-generic/bitops/__fls.h create mode 100644 include/asm-generic/bitops/fls.h create mode 100644 include/asm-generic/bitops/fls64.h
include/asm-generic/bitops/__ffs.h new file +43 -0
@@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FFS_H_ +#define _ASM_GENERIC_BITOPS___FFS_H_ + +#include <asm/types.h> + +/** +* __ffs - find first bit in word. +* @word: The word to search +* +* Undefined if no bit exists, so code should check against 0 first. +*/ +static __always_inline unsigned long __ffs (unsigned long word) +{ +int num =0 ; + +#if BITS_PER_LONG ==64 +if ((word &0xffffffff ) ==0 ) { + num +=32 ; + word >>=32 ; + } +#endif +if ((word &0xffff ) ==0 ) { + num +=16 ; + word >>=16 ; + } +if ((word &0xff ) ==0 ) { + num +=8 ; + word >>=8 ; + } +if ((word &0xf ) ==0 ) { + num +=4 ; + word >>=4 ; + } +if ((word &0x3 ) ==0 ) { + num +=2 ; + word >>=2 ; + } +if ((word &0x1 ) ==0 ) + num +=1 ; +return num; +} + +#endif /* _ASM_GENERIC_BITOPS___FFS_H_ */
include/asm-generic/bitops/__fls.h new file +43 -0
43 lines not on this page · raw message
include/asm-generic/bitops/fls.h new file +41 -0
41 lines not on this page · raw message
include/asm-generic/bitops/fls64.h new file +36 -0
@@ -0,0 +1,36 @@ +#ifndef _ASM_GENERIC_BITOPS_FLS64_H_ +#define _ASM_GENERIC_BITOPS_FLS64_H_ + +#include <asm/types.h> + +/** +* fls64 - find last set bit in a 64-bit word +* @x: the word to search +* +* This is defined in a similar way as the libc and compiler builtin +* ffsll, but returns the position of the most significant set bit. +* +* fls64(value) returns 0 if value is 0 or the position of the last +* set bit if value is nonzero. The last (most significant) bit is +* at position 64. +*/ +#if BITS_PER_LONG ==32 +static __always_inline int fls64(__u64 x) +{ +__u32 h = x >>32 ; +if (h) +return fls (h) +32 ; +return fls (x); +} +#elif BITS_PER_LONG ==64 +static __always_inline int fls64(__u64 x) +{ +if (x ==0 ) +return 0 ; +return __fls (x) +1 ; +} +#else +#error BITS_PER_LONG not 32 or 64 +#endif + +#endif /* _ASM_GENERIC_BITOPS_FLS64_H_ */
Signature · 1 line
1.9.1
PATCH v7 2/21 include: Add generic bitops headers
Quoted 5 lines · Fabio Estevam
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by Fabio Estevam <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 2/21 include: Add generic bitops headers
In reply to Fabio EstevamQuoted 19 lines · Fabio Estevam
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by Fabio Estevam <[email protected]>---
Changes since v6:
- Do not touchinclude/linux/bitopshere to avoid build warnings (Daniel)include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls.h | 41 ++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+) create mode 100644 include/asm-generic/bitops/__ffs.h create mode 100644 include/asm-generic/bitops/__fls.h create mode 100644 include/asm-generic/bitops/fls.h create mode 100644 include/asm-generic/bitops/fls64.h
<snip>
Quoted 37 lines
include/asm-generic/bitops/__fls.h new file +31
-0@@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FLS_H_ +#define _ASM_GENERIC_BITOPS___FLS_H_ + +#include <asm/types.h> + +/** +* __fls - find last (most-significant) set bit in a long word +* @word: the word to search +* +* Undefined if no set bit exists, so code should check against 0 first. +*/ +static __always_inline unsigned long __fls (unsigned long word) +{ +int num =BITS_PER_LONG -1 ; + +#if BITS_PER_LONG ==64 +if (!(word & (~0ul <<32 ))) { + num -=32 ; + word <<=32 ; + } +#endif +if (!(word & (~0ul << (BITS_PER_LONG -16 )))) { + num -=16 ; + word <<=16 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -8 )))) { + num -=8 ; + word <<=8 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -4 )))) { + num -=4 ;
include/asm-generic/bitops/__fls.h line 41
Quoted 10 lines
include/asm-generic/bitops/__fls.h new file +10
-0+ word <<=4 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -2 )))) { + num -=2 ; + word <<=2 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -1 )))) + num -=1 ; +return num; +}
Sorry for catching this late. All above left shift causes compiling warning on 32-bit host (ubuntu 12.04 with gcc 4.6.3)
include/asm-generic/bitops/__fls.h:17:2: warning: left shift count >= width of type [enabled by default]
The root cause may be in include/configs/sandbox.h #define CONFIG_SANDBOX_BITS_PER_LONG 64
York
PATCH v7 2/21 include: Add generic bitops headers
Hi York,
Quoted 76 lines · York Sun
Quoted 19 lines · Fabio Estevam
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by Fabio Estevam <[email protected]>---
Changes since v6:
- Do not touchinclude/linux/bitopshere to avoid build warnings (Daniel)include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls.h | 41 ++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+) create mode 100644 include/asm-generic/bitops/__ffs.h create mode 100644 include/asm-generic/bitops/__fls.h create mode 100644 include/asm-generic/bitops/fls.h create mode 100644 include/asm-generic/bitops/fls64.h<snip>
Quoted 37 lines
include/asm-generic/bitops/__fls.h new file +31
-0@@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FLS_H_ +#define _ASM_GENERIC_BITOPS___FLS_H_ + +#include <asm/types.h> + +/** +* __fls - find last (most-significant) set bit in a long word +* @word: the word to search +* +* Undefined if no set bit exists, so code should check against 0 first. +*/ +static __always_inline unsigned long __fls (unsigned long word) +{ +int num =BITS_PER_LONG -1 ; + +#if BITS_PER_LONG ==64 +if (!(word & (~0ul <<32 ))) { + num -=32 ; + word <<=32 ; + } +#endif +if (!(word & (~0ul << (BITS_PER_LONG -16 )))) { + num -=16 ; + word <<=16 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -8 )))) { + num -=8 ; + word <<=8 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -4 )))) { + num -=4 ;include/asm-generic/bitops/__fls.h line 41
Quoted 10 lines
include/asm-generic/bitops/__fls.h new file +10
-0+ word <<=4 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -2 )))) { + num -=2 ; + word <<=2 ; + } +if (!(word & (~0ul << (BITS_PER_LONG -1 )))) + num -=1 ; +return num; +}Sorry for catching this late. All above left shift causes compiling warning on 32-bit host (ubuntu 12.04 with gcc 4.6.3)
Quoted 5 lines
include/asm-generic/bitops/__fls.h:17:2: warning: left shift count >= width of type [enabled by default]The root cause may be in
include/configs/sandbox.h#defineCONFIG_SANDBOX_BITS_PER_LONG64
I think sandbox has a few issues on 32-bit machines. Probably this should change to 32-bits. I don't have a 32-bit machine set up and in regular use so I have not looked a tthis.
Regards,
Simon
PATCH v7 3/21 ARM: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/arm/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/include/asm/bitops.h +5 -0
@@ -190,4 +190,9 @@ found_middle:#endif /* __KERNEL__ */ +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/__ffs.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/fls64.h> +#endif /* _ARM_BITOPS_H */
Signature · 1 line
1.9.1
PATCH v7 3/21 ARM: Use the generic bitops headers
Quoted 7 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v7 4/21 x86: Use the generic bitops headers
In reply to Fabio EstevamUse the generic bitops and also add custom __ffs() implementation as per the kernel.
Also align the ffs() implementation with the kernel.
---
Changes since v6:
- None
arch/x86/include/asm/bitops.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-)
arch/x86/include/asm/bitops.h +20 -1
@@ -14,6 +14,10 @@* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). */ +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#ifdef CONFIG_SMP #define LOCK_PREFIX "lock ; "#else
@@ -332,6 +336,20 @@ static __inline__ unsigned long ffz(unsigned long word)#ifdef __KERNEL__/** +* __ffs - find first set bit in word +* @word: The word to search +* +* Undefined if no bit exists, so code should check against 0 first. +*/ +static inline unsigned long __ffs (unsigned long word) +{ + __asm__("rep; bsf %1,%0" + :"=r" (word) + :"rm" (word)); +return word; +} + +/** * ffs - find first bit set * @x: the word to search *
@@ -346,7 +364,8 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"g" (x)); +"1:" :"=r" (r) :"rm" (x)); +return r+1 ; }#define PLATFORM_FFS
Signature · 1 line
1.9.1
PATCH v7 4/21 x86: Use the generic bitops headers
Quoted 9 lines · Fabio Estevam
Use the generic bitops and also add custom
__ffs()implementation as per the kernel.Also align the
ffs()implementation with the kernel.Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v7 5/21 m68k: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/m68k/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
arch/m68k/include/asm/bitops.h +4 -0
@@ -6,6 +6,10 @@#define _M68K_BITOPS_H#include <asm/byteorder.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> extern void set_bit (int nr,volatile void *addr);extern void clear_bit (int nr,volatile void *addr);
Signature · 1 line
1.9.1
PATCH v7 5/21 m68k: Use the generic bitops headers
Quoted 7 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 6/21 blackfin: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/blackfin/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
arch/blackfin/include/asm/bitops.h +4 -0
@@ -15,6 +15,10 @@#include <asm/byteorder.h> #include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> #ifdef __KERNEL__/*
Signature · 1 line
1.9.1
PATCH v7 6/21 blackfin: Use the generic bitops headers
Quoted 7 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 7/21 sh: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/sh/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/sh/include/asm/bitops.h +5 -0
@@ -1,6 +1,11 @@#ifndef __ASM_SH_BITOPS_H#define __ASM_SH_BITOPS_H +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +#ifdef __KERNEL__#include <asm/irqflags.h> /* For __swab32 */
Signature · 1 line
1.9.1
PATCH v7 7/21 sh: Use the generic bitops headers
Quoted 6 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 8/21 microblaze: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/microblaze/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
arch/microblaze/include/asm/bitops.h +4 -0
@@ -7,6 +7,10 @@#include <asm/byteorder.h> /* swab32 */ #include <asm/system.h> /* save_flags */ +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> #ifdef __KERNEL__/*
Signature · 1 line
1.9.1
PATCH v7 8/21 microblaze: Use the generic bitops headers
Quoted 4 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 9/21 sandbox: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/sandbox/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
arch/sandbox/include/asm/bitops.h +4 -0
@@ -21,6 +21,10 @@#include <linux/compiler.h> #include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> #ifdef __KERNEL__
Signature · 1 line
1.9.1
PATCH v7 9/21 sandbox: Use the generic bitops headers
Quoted 7 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v7 10/21 sparc: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/sparc/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/sparc/include/asm/bitops.h +5 -0
@@ -9,4 +9,9 @@#ifndef _SPARC_BITOPS_H#define _SPARC_BITOPS_H +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +#endif /* _SPARC_BITOPS_H */
Signature · 1 line
1.9.1
PATCH v7 10/21 sparc: Use the generic bitops headers
Quoted 5 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 11/21 openrisc: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/openrisc/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
arch/openrisc/include/asm/bitops.h +4 -0
@@ -12,6 +12,10 @@#define PLATFORM_FFS #include <asm/bitops/ffs.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +#define hweight32 (x) generic_hweight32(x)#define hweight16 (x) generic_hweight16(x)#define hweight8 (x) generic_hweight8(x)
Signature · 1 line
1.9.1
PATCH v7 11/21 openrisc: Use the generic bitops headers
Quoted 5 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 12/21 nds32: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/nds32/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
arch/nds32/include/asm/bitops.h +4 -0
@@ -21,6 +21,10 @@#ifdef __KERNEL__#include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> #define smp_mb__before_clear_bit () do { } while (0)#define smp_mb__after_clear_bit () do { } while (0)
Signature · 1 line
1.9.1
PATCH v7 12/21 nds32: Use the generic bitops headers
Quoted 5 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 13/21 nios2: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- None
arch/nios2/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/nios2/include/asm/bitops.h +5 -0
@@ -13,4 +13,9 @@#include <asm/bitops/non-atomic.h> #include <asm/bitops/ffs.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +#endif /* __ASM_NIOS2_BITOPS_H */
Signature · 1 line
1.9.1
PATCH v7 13/21 nios2: Use the generic bitops headers
Quoted 6 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Acked-by Thomas Chou <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 14/21 mips: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- Newly introduced in this series
arch/mips/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/mips/include/asm/bitops.h +5 -0
@@ -17,6 +17,11 @@#include <asm/sgidefs.h> #include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +/* * clear_bit() doesn't provide any barrier for the compiler. */
Signature · 1 line
1.9.1
PATCH v7 14/21 mips: Use the generic bitops headers
Quoted 6 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic
functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Daniel Schwierzeck <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 15/21 arc: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- Newly introduced in this series
arch/arc/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/arc/include/asm/bitops.h +5 -0
@@ -16,4 +16,9 @@#define hweight16 (x) generic_hweight16(x)#define hweight8 (x) generic_hweight8(x) +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +#endif /* __ASM_ARC_BITOPS_H */
Signature · 1 line
1.9.1
PATCH v7 15/21 arc: Use the generic bitops headers
Quoted 5 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic
functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 16/21 avr32: Use the generic bitops headers
In reply to Fabio EstevamThe generic bitops headers are required when calling logarithmic functions, such as ilog2().
---
Changes since v6:
- Newly introduced in this series
arch/avr32/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
arch/avr32/include/asm/bitops.h +5 -0
@@ -6,4 +6,9 @@#ifndef __ASM_AVR32_BITOPS_H#define __ASM_AVR32_BITOPS_H +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> +#endif /* __ASM_AVR32_BITOPS_H */
Signature · 1 line
1.9.1
PATCH v7 16/21 avr32: Use the generic bitops headers
Quoted 4 lines · Fabio Estevam
The generic bitops headers are required when calling logarithmic functions, such as
ilog2().Signed-off-by Fabio Estevam <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 17/21 bitops: Add fls_long and __ffs64
In reply to Fabio EstevamAdd fls_long and __ffs64 support to align with the kernel bitops implementation.
---
Changes since v6:
- Newly introduced in this series.
- Only touch include/linux/bitops.h after all the arch bitops headers have been added. This is done to avoid build warnings (Daniel).
include/linux/bitops.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
include/linux/bitops.h +27 -0
@@ -2,6 +2,7 @@#define _LINUX_BITOPS_H#include <asm/types.h> +#include <linux/compiler.h> #define BIT (nr) (1UL << (nr))#define BIT_MASK (nr) (1UL << ((nr) % BITS_PER_LONG))
@@ -139,6 +140,32 @@ static inline unsigned int generic_hweight8(unsigned int w)# define fls generic_fls#endif +static inline unsigned fls_long (unsigned long l) +{ +if (sizeof (l) ==4 ) +return fls (l); +return fls64 (l); +} + +/** +* __ffs64 - find first set bit in a 64 bit word +* @word: The 64 bit word +* +* On 64 bit arches this is a synomyn for __ffs +* The result is not defined if no bits are set, so check that @word +* is non-zero before calling this. +*/ +static inline unsigned long __ffs64 (u64 word) +{ +#if BITS_PER_LONG ==32 +if (((u32 )word) ==0UL ) +return __ffs ((u32)(word >>32 )) +32 ; +#elif BITS_PER_LONG !=64 +#error BITS_PER_LONG not 32 or 64 +#endif +return __ffs ((unsigned long )word); +} +/** * __set_bit - Set a bit in memory * @nr: the bit to set
Signature · 1 line
1.9.1
PATCH v7 17/21 bitops: Add fls_long and __ffs64
Quoted 4 lines · Fabio Estevam
Add
fls_longand__ffs64support to align with the kernel bitops implementation.Signed-off-by Fabio Estevam <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v7 18/21 compat: Remove is_power_of_2() definition
In reply to Fabio EstevamUse the is_power_of_2() definition from log2.h to align with the kernel implementation.
---
Changes since v6:
- None
arch/arm/mach-mvebu/mbus.c | 2 +- drivers/mtd/mtdcore.c | 2 +- drivers/mtd/ubi/build.c | 2 +- fs/ubifs/super.c | 2 +- include/linux/compat.h | 6 ------ 5 files changed, 4 insertions(+), 10 deletions(-)
arch/arm/mach-mvebu/mbus.c +1 -1
@@ -52,7 +52,7 @@#include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> -#include <linux/compat.h> +#include <linux/log2.h> #include <linux/mbus.h> /* DDR target is the same on all platforms */
drivers/mtd/mtdcore.c +1 -1
@@ -27,8 +27,8 @@#include <linux/gfp.h> #include <linux/slab.h> #else -#include <linux/compat.h> #include <linux/err.h> +#include <linux/log2.h> #include <ubi_uboot.h> #endif
drivers/mtd/ubi/build.c +1 -1
@@ -30,7 +30,7 @@#include <linux/slab.h> #include <linux/major.h> #else -#include <linux/compat.h> +#include <linux/log2.h> #endif #include <linux/err.h> #include <ubi_uboot.h>
fs/ubifs/super.c +1 -1
@@ -31,7 +31,7 @@#include <common.h> #include <malloc.h> #include <memalign.h> -#include <linux/compat.h> +#include <linux/log2.h> #include <linux/stat.h> #include <linux/err.h> #include "ubifs.h"
include/linux/compat.h +0 -6
@@ -130,12 +130,6 @@ static inline void led_trigger_unregister_simple(struct led_trigger *trigger) {}static inline void led_trigger_event (struct led_trigger *trigger,enum led_brightness event) {} -/* include/linux/log2.h */ -static inline int is_power_of_2 (unsigned long n) -{ -return (n !=0 && ((n & (n -1 )) ==0 )); -} -/* uapi/linux/limits.h */ #define XATTR_LIST_MAX 65536/* size of extended attribute namelist (64k) */
Signature · 1 line
1.9.1
PATCH v7 18/21 compat: Remove is_power_of_2() definition
Quoted 7 lines · Fabio Estevam
Use the
is_power_of_2()definition fromlog2.hto align with the kernel implementation.Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
With the minor fixup that was sent as a follow up in the thread on patch #1,
Applied to u-boot/master, thanks!
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PATCH v7 19/21 powerpc: Remove __ilog2_u64 and ffs4 from bitops
In reply to Fabio EstevamRemove __ilog2_u64 and ffs4 from powerpc bitops to align with the kernel implementation.
Use the generic __ffs64 instead of a custom powerpc implementation.
--- arch/powerpc/cpu/mpc83xx/law.c | 5 +++-- arch/powerpc/cpu/mpc85xx/tlb.c | 2 ++ arch/powerpc/cpu/mpc8xxx/law.c | 5 +++-- arch/powerpc/include/asm/bitops.h | 11 +---------- arch/powerpc/include/asm/fsl_law.h | 1 + arch/powerpc/include/asm/fsl_srio.h | 2 ++ 6 files changed, 12 insertions(+), 14 deletions(-)
arch/powerpc/cpu/mpc83xx/law.c +3 -2
@@ -9,6 +9,7 @@#include <common.h> #include <asm/fsl_law.h> #include <asm/mmu.h> +#include <linux/log2.h> int set_ddr_laws (u64 start,u64 sz,enum law_trgt_if id) {
@@ -20,7 +21,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)if (start ==0 ) start_align =1ull << (LAW_SIZE_2G +1 );else - start_align =1ull << (ffs64 (start) -1 ); + start_align =1ull << (__ffs64 (start) -1 ); law_sz =min (start_align, sz); law_sz_enc =__ilog2_u64 (law_sz) -1 ;
@@ -40,7 +41,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)if (sz) { start += law_sz; - start_align =1ull << (ffs64 (start) -1 ); + start_align =1ull << (__ffs64 (start) -1 ); law_sz =min (start_align, sz); law_sz_enc =__ilog2_u64 (law_sz) -1 ; ecm = &immap->sysconf.ddrlaw[1 ];
arch/powerpc/cpu/mpc85xx/tlb.c +2 -0
@@ -14,6 +14,8 @@#include <addr_map.h> #endif +#include <linux/log2.h> +DECLARE_GLOBAL_DATA_PTR ;void invalidate_tlb (u8 tlb)
arch/powerpc/cpu/mpc8xxx/law.c +3 -2
@@ -11,6 +11,7 @@#include <linux/compiler.h> #include <asm/fsl_law.h> #include <asm/io.h> +#include <linux/log2.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -187,7 +188,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)if (start ==0 ) start_align =1ull << (LAW_SIZE_32G +1 );else - start_align =1ull << (ffs64 (start) -1 ); + start_align =1ull << (__ffs64 (start) -1 ); law_sz =min (start_align, sz); law_sz_enc =__ilog2_u64 (law_sz) -1 ;
@@ -202,7 +203,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)if (sz) { start += law_sz; - start_align =1ull << (ffs64 (start) -1 ); + start_align =1ull << (__ffs64 (start) -1 ); law_sz =min (start_align, sz); law_sz_enc =__ilog2_u64 (law_sz) -1 ;
arch/powerpc/include/asm/bitops.h +1 -10
@@ -6,6 +6,7 @@#define _PPC_BITOPS_H#include <asm/byteorder.h> +#include <asm-generic/bitops/__ffs.h> extern void set_bit (int nr,volatile void *addr);extern void clear_bit (int nr,volatile void *addr);
@@ -209,16 +210,6 @@ static inline int fls64(__u64 x)#error BITS_PER_LONG not 32 or 64#endif -static inline int __ilog2_u64 (u64 n) -{ -return fls64 (n) -1 ; -} - -static inline int ffs64 (u64 x) -{ -return __ilog2_u64 (x & -x) +1ull ; -} -#ifdef __KERNEL__/*
arch/powerpc/include/asm/fsl_law.h +1 -0
@@ -10,6 +10,7 @@#define _FSL_LAW_H_#include <asm/io.h> +#include <linux/log2.h> #define LAW_EN 0x80000000
arch/powerpc/include/asm/fsl_srio.h +2 -0
@@ -7,6 +7,8 @@#ifndef _FSL_SRIO_H_#define _FSL_SRIO_H_ +#include <linux/log2.h> +enum atmu_size {ATMU_SIZE_4K =0xb , ATMU_SIZE_8K,
Signature · 1 line
1.9.1
PATCH v7 19/21 powerpc: Remove __ilog2_u64 and ffs4 from bitops
Quoted 10 lines · Fabio Estevam
Remove
__ilog2_u64and ffs4 from powerpc bitops to align with the kernel implementation.Use the generic
__ffs64instead of a custom powerpc implementation.Cc York Sun <[email protected]>Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v7 20/21 sf: Add SPI protection mechanism from the kernel
In reply to Fabio EstevamAdd the SPI NOR protection mechanism from the kernel.
This code is based on the work from
Brian Norris <[email protected]> Here is the commit details:
"mtd: spi-nor: refactor block protection functions" (sha1: 62593cf40b23b523b9fc9334ca61ba6c595ebb09)
---
Changes since v1:
- Use size_t in stm_lock/unlock functions and prototypes to avoid build error in Blackfin.
drivers/mtd/spi/sf_internal.h | 3 + drivers/mtd/spi/sf_ops.c | 170 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 173 insertions(+)
drivers/mtd/spi/sf_internal.h +3 -0
@@ -105,6 +105,9 @@ enum spi_nor_option_flags {#define STATUS_QEB_WINSPAN (1 << 1)#define STATUS_QEB_MXIC (1 << 6)#define STATUS_PEC (1 << 7) +#define SR_BP0 BIT(2)/* Block protect 0 */ +#define SR_BP1 BIT(3)/* Block protect 1 */ +#define SR_BP2 BIT(4)/* Block protect 2 */ /* Flash timeout values */ #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
drivers/mtd/spi/sf_ops.c +170 -0
179 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v7 20/21 sf: Add SPI protection mechanism from the kernel
Quoted 8 lines · Fabio Estevam
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from
Brian Norris <[email protected]> Here is the commit details:
"mtd: spi-nor: refactor block protection functions" (sha1:62593cf40b23b523b9fc9334ca61ba6c595ebb09)
Quoted 7 lines
Signed-off-by Fabio Estevam <[email protected]>Signed-off-by Jagan Teki <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>Signed-off-by Fabio Estevam <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 21/21 sf: Add SPI NOR protection mechanism
In reply to Fabio EstevamMany SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
offset 0x3f0000 is protected and cannot be erased
SF: 65536 bytes @ 0x3f0000 Erased: ERROR
=> sf protect unlock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
SF: 65536 bytes @ 0x3f0000 Erased: OK
---
Changes since v6:
- None
common/cmd_sf.c | 35 +++++++++++++++++++++++++++++++++++ drivers/mtd/spi/sf_internal.h | 9 +++++++++ drivers/mtd/spi/sf_ops.c | 14 ++++++++++++-- drivers/mtd/spi/sf_probe.c | 13 +++++++++++++ include/spi_flash.h | 19 +++++++++++++++++++ 5 files changed, 88 insertions(+), 2 deletions(-)
common/cmd_sf.c +35 -0
@@ -348,6 +348,37 @@ static int do_spi_flash_erase(int argc, char * const argv[])return ret ==0 ?0 :1 ; } +static int do_spi_protect (int argc,char *const argv[]) +{ +int ret =0 ; +loff_t start, len; +bool prot = false; + +if (argc !=4 ) +return -1 ; + +if (!str2off (argv[2 ], &start)) { +puts ("start sector is not a valid number\n" ); +return 1 ; + } + +if (!str2off (argv[3 ], &len)) { +puts ("len is not a valid number\n" ); +return 1 ; + } + +if (strcmp (argv[1 ],"lock" ) ==0 ) + prot = true; +else if (strcmp (argv[1 ],"unlock" ) ==0 ) + prot = false; +else +return -1 ;/* Unknown parameter */ + + ret =spi_flash_protect (flash, start, len, prot); + +return ret ==0 ?0 :1 ; +} +#ifdef CONFIG_CMD_SF_TEST enum { STAGE_ERASE,
@@ -540,6 +571,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, ret =do_spi_flash_read_write (argc, argv); else if (strcmp(cmd, "erase") == 0) ret =do_spi_flash_erase (argc, argv); + else if (strcmp(cmd, "protect") == 0) + ret =do_spi_protect (argc, argv);#ifdef CONFIG_CMD_SF_TEST else if (!strcmp(cmd, "test")) ret =do_spi_flash_test (argc, argv);
@@ -579,5 +612,7 @@ U_BOOT_CMD("sf update addr offset|partition len - erase and write `len' bytes from memory\n" " at `addr' to flash at `offset'\n" " or to start of mtd `partition'\n" +"sf protect lock/unlock sector len - protect/unprotect 'len' bytes starting\n" +" at address 'sector'\n" SF_TEST_HELP );
drivers/mtd/spi/sf_internal.h +9 -0
@@ -176,6 +176,15 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);/* Program the status register */ int spi_flash_cmd_write_status (struct spi_flash *flash,u8 ws); +/* Lock stmicro spi flash region */ +int stm_lock (struct spi_flash *flash,u32 ofs,size_t len); + +/* Unlock stmicro spi flash region */ +int stm_unlock (struct spi_flash *flash,u32 ofs,size_t len); + +/* Check if a stmicro spi flash region is completely locked */ +int stm_is_locked (struct spi_flash *flash,u32 ofs,size_t len); +/* Read the config register */ int spi_flash_cmd_read_config (struct spi_flash *flash,u8 *rc);
drivers/mtd/spi/sf_ops.c +12 -2
@@ -268,6 +268,11 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)return -1 ; } +if (flash->flash_is_locked (flash, offset, len) >0 ) { +printf ("offset 0x%x is protected and cannot be erased\n" , offset); +return -EINVAL ; + } + cmd[0 ] = flash->erase_cmd;while (len) { erase_addr = offset;
@@ -310,6 +315,11 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, page_size = flash->page_size; +if (flash->flash_is_locked (flash, offset, len) >0 ) { +printf ("offset 0x%x is protected and cannot be written\n" , offset); +return -EINVAL ; + } + cmd[0 ] = flash->write_cmd;for (actual =0 ; actual < len; actual += chunk_len) { write_addr = offset;
@@ -589,7 +599,7 @@ static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,/* * Return 1 if the entire region is locked, 0 otherwise */ -static int stm_is_locked_sr (struct spi_flash *flash,loff_t ofs,u32 len, +static int stm_is_locked_sr (struct spi_flash *flash,u32 ofs,u32 len,u8 sr) {loff_t lock_offs;
@@ -607,7 +617,7 @@ static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u32 len,* Returns 1 if entire region is locked, 0 if any portion is unlocked, and * negative on errors. */ -int stm_is_locked (struct spi_flash *flash,loff_t ofs,u32 len) +int stm_is_locked (struct spi_flash *flash,u32 ofs,size_t len) {int status;u8 sr;
drivers/mtd/spi/sf_probe.c +13 -0
@@ -182,6 +182,19 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, flash->read = spi_flash_cmd_read_ops;#endif +/* lock hooks are flash specific - assign them based on idcode0 */ +switch (idcode[0 ]) { +#ifdef CONFIG_SPI_FLASH_STMICRO +case SPI_FLASH_CFI_MFR_STMICRO : + flash->flash_lock = stm_lock; + flash->flash_unlock = stm_unlock; + flash->flash_is_locked = stm_is_locked; +#endif +break ; +default : +debug ("SF: Lock ops not supported for %02x flash\n" , idcode[0 ]); + } +/* Compute the flash size */ flash->shift = (flash->dual_flash &SF_DUAL_PARALLEL_FLASH ) ?1 :0 ;/*
include/spi_flash.h +19 -0
@@ -54,6 +54,9 @@ struct spi_slave;* @write_cmd: Write cmd - page and quad program. * @dummy_byte: Dummy cycles for read operation. * @memory_map: Address of read-only SPI flash access +* @flash_lock: lock a region of the SPI Flash +* @flash_unlock: unlock a region of the SPI Flash +* @flash_is_locked: check if a region of the SPI Flash is completely locked * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read * @write: Flash write ops: Write len bytes from buf into offset
@@ -87,6 +90,10 @@ struct spi_flash {u8 dummy_byte;void *memory_map; + +int (*flash_lock)(struct spi_flash *flash,u32 ofs,size_t len); +int (*flash_unlock)(struct spi_flash *flash,u32 ofs,size_t len); +int (*flash_is_locked)(struct spi_flash *flash,u32 ofs,size_t len);#ifndef CONFIG_DM_SPI_FLASH /* * These are not strictly needed for driver model, but keep them here
@@ -227,6 +234,18 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, }#endif +static inline int spi_flash_protect (struct spi_flash *flash,u32 ofs,u32 len, +bool prot) +{ +if (!flash->flash_lock) +return -EOPNOTSUPP ; + +if (prot) +return flash->flash_lock (flash, ofs, len); +else +return flash->flash_unlock (flash, ofs, len); +} +void spi_boot (void )__noreturn ;void spi_spl_load_image (uint32_t offs,unsigned int size,void *vdst);
Signature · 1 line
1.9.1
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Quoted 18 lines · Fabio Estevam
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock0x3f00000x10000
=> sf erase0x3f00000x10000
offset0x3f0000is protected and cannot be erased
SF: 65536 bytes @0x3f0000Erased: ERROR
=> sf protect unlock0x3f00000x10000
=> sf erase0x3f00000x10000
SF: 65536 bytes @0x3f0000Erased: OK
Quoted 6 lines
Signed-off-by Fabio Estevam <[email protected]>[re-worked to fit the lock common to dm and non-dm]Signed-off-by Jagan Teki <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Hi Fabio,
Quoted 20 lines · Tom Rini
Quoted 18 lines · Fabio Estevam
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock0x3f00000x10000
=> sf erase0x3f00000x10000
offset0x3f0000is protected and cannot be erased
SF: 65536 bytes @0x3f0000Erased: ERROR
=> sf protect unlock0x3f00000x10000
=> sf erase0x3f00000x10000
SF: 65536 bytes @0x3f0000Erased: OK
Quoted 8 lines
Quoted 6 lines
Signed-off-by Fabio Estevam <[email protected]>[re-worked to fit the lock common to dm and non-dm]Signed-off-by Jagan Teki <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>Applied to u-boot/master, thanks!
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
Also I don't like the way this adds new operations to struct spi_flash. These should go in struct dm_spi_flash_ops for driver model, and be compatible with the driver-model way of doing things.
Can you please take a look?
Regards,
Simon
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Quoted 37 lines · Simon Glass
Hi Fabio,
Quoted 20 lines · Tom Rini
Quoted 18 lines · Fabio Estevam
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock0x3f00000x10000
=> sf erase0x3f00000x10000
offset0x3f0000is protected and cannot be erased
SF: 65536 bytes @0x3f0000Erased: ERROR
=> sf protect unlock0x3f00000x10000
=> sf erase0x3f00000x10000
SF: 65536 bytes @0x3f0000Erased: OKQuoted 8 lines
Quoted 6 lines
Signed-off-by Fabio Estevam <[email protected]>[re-worked to fit the lock common to dm and non-dm]Signed-off-by Jagan Teki <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>Applied to u-boot/master, thanks!
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
Quoted 5 lines
Also I don't like the way this adds new operations to struct
spi_flash. These should go in structdm_spi_flash_opsfor driver model, and be compatible with the driver-model way of doing things.Can you please take a look?
I think it's a bit more complex, I thought we had covered the not supported case. I wonder if it's the same chip family and thus thought to be, but not in this case, supported?
Signature · 8 lines
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PATCH v7 21/21 sf: Add SPI NOR protection mechanism
In reply to Simon GlassHi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
Regards,
Fabio Estevam
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB
*** Warning - bad CRC, using default environment
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
EIP: 0010:[<00000058>] EFLAGS: 00010283
Original EIP :[<52fbb058>]
EAX: 76d46bf0 EBX: acd46c20 ECX: 00010000 EDX: 533f94e0
ESI: 003e0000 EDI: 00000004 EBP: 00010000 ESP: acd3cf58
DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018
CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: ffff0ff0 DR7: 00000400
Stack:
0xacd3cf98 : 0x00010000
0xacd3cf94 : 0xacd3dd00
0xacd3cf90 : 0x00000028
0xacd3cf8c : 0xacf75917
0xacd3cf88 : 0x00000a30
0xacd3cf84 : 0xacd3cf9c
0xacd3cf80 : 0x00000008
0xacd3cf7c : 0x00001000
0xacd3cf78 : 0xacd44480
0xacd3cf74 : 0x00000a30
0xacd3cf70 : 0x00000a30
0xacd3cf6c : 0xacf67e75
0xacd3cf68 : 0xacd3cfd8
0xacd3cf64 : 0xacd444c8
0xacd3cf60 : 0xacd3d00c
0xacd3cf5c : 0xacf75c74
--->0xacd3cf58 : 0x00010000
0xacd3cf54 : 0x00010283
0xacd3cf50 : 0x00000010
0xacd3cf4c : 0x00000058### ERROR ### Please RESET the board ###
The flash is W25Q64CV.
Regards,
Simon
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Quoted 7 lines · Simon Glass
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB
Quoted 8 lines
*** Warning - bad CRC, using default environment
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
EIP: 0010:[<00000058>] EFLAGS: 00010283
Original EIP :[<52fbb058>]
In this patch we only assign the lock ops if the flash is of ST Micro type, so not sure why it affects Winbound flash as well.
Jagan, would you have some ideas, please?
Thanks
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Quoted 18 lines · Fabio Estevam
Quoted 7 lines · Simon Glass
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiBQuoted 8 lines
*** Warning - bad CRC, using default environment
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
EIP: 0010:[<00000058>] EFLAGS: 00010283
Original EIP :[<52fbb058>]
Quoted 4 lines
In this patch we only assign the lock ops if the flash is of ST Micro type, so not sure why it affects Winbound flash as well.
Jagan, would you have some ideas, please?
Issue still there? because we added these lock ops only for ST Micro flash's.
thanks!
Signature · 1 line
Jagan | openedev.
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Quoted 22 lines · Jagan Teki
Quoted 21 lines · Fabio Estevam
Quoted 7 lines · Simon Glass
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiBQuoted 8 lines
*** Warning - bad CRC, using default environment
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
EIP: 0010:[<00000058>] EFLAGS: 00010283
Original EIP :[<52fbb058>]In this patch we only assign the lock ops if the flash is of ST Micro type, so not sure why it affects Winbound flash as well.
Quoted 6 lines
Quoted 1 line
Jagan, would you have some ideas, please?
Issue still there? because we added these lock ops only for ST Micro flash's.
thanks!
--
It now breaks SPI flash on Intel Crown Bay too ..
=> saveenv
Saving Environment to SPI Flash...
SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB, total 2 MiB Erasing SPI flash...Invalid Opcode (Undefined Opcode)
EIP: 0010:[<00000006>] EFLAGS: 00010213
Original EIP :[<c0b9e006>]
EAX: 3f164f30 EBX: 00000000 ECX: 00001000 EDX: 00000000
ESI: 00001000 EDI: 00001000 EBP: 3f164f30 ESP: 3f15b77c
DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018
CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000600
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: ffff0ff0 DR7: 00000400
Stack:
0x3f15b7bc : 0x3f387b0e
0x3f15b7b8 : 0x3f3c6108
0x3f15b7b4 : 0x00000000
0x3f15b7b0 : 0x3f15b7e0
0x3f15b7ac : 0x3f3ab6cc
0x3f15b7a8 : 0x00001000
0x3f15b7a4 : 0x3f1610b8
0x3f15b7a0 : 0x3f3af400
0x3f15b79c : 0x3f388036
0x3f15b798 : 0x00000000
0x3f15b794 : 0x00000ffc
0x3f15b790 : 0x3f15b7bc
0x3f15b78c : 0x3f38e9ec
0x3f15b788 : 0x0000002e
0x3f15b784 : 0x3f1610b8
0x3f15b780 : 0x0000002e
--->0x3f15b77c : 0x3f38838b
0x3f15b778 : 0x00010213
0x3f15b774 : 0x00000010
0x3f15b770 : 0x00000006### ERROR ### Please RESET the board ###
Regards,
Bin
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
In reply to Simon GlassQuoted 22 lines · Simon Glass
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB
Quoted 6 lines
*** Warning - bad CRC, using default environment
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
arch/x86/include/asm/bitops.h +1 -1
@@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"rm" (x)); +"1:" :"=r" (r) :"g" (x));return r+1 ; }
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Hi,
Quoted 25 lines · Fabio Estevam
Quoted 24 lines · Simon Glass
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB*** Warning - bad CRC, using default environment
Quoted 9 lines
Quoted 4 lines
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)I am wondering if this invalid opcode is caused by
6c2f758cee266f7648.Could you please try this?
No, this does not resolve this issue.
arch/x86/include/asm/bitops.h static __inline__ int ffs(int x) · line 370
Quoted 11 lines
arch/x86/include/asm/bitops.h +1
-1@@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"rm" (x)); +"1:" :"=r" (r) :"g" (x));return r+1 ; }
It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Regards,
Bin
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Hi,
Quoted 49 lines · Bin Meng
Hi,
Quoted 25 lines · Fabio Estevam
Quoted 24 lines · Simon Glass
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB*** Warning - bad CRC, using default environment
Quoted 9 lines
Quoted 4 lines
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)I am wondering if this invalid opcode is caused by
6c2f758cee266f7648.Could you please try this?
No, this does not resolve this issue.
Quoted 9 lines
arch/x86/include/asm/bitops.h +1
-1@@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"rm" (x)); +"1:" :"=r" (r) :"g" (x));
Quoted 6 lines
arch/x86/include/asm/bitops.h static __inline__ int ffs(int x) · line 370
Quoted 2 lines
arch/x86/include/asm/bitops.h +0
-0return r+1 ; }It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct dm_spi_flash_ops instead, then convert the affected boards to driver model?
Regards,
Simon
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Quoted 66 lines · Simon Glass
Hi,
Quoted 49 lines · Bin Meng
Hi,
Quoted 25 lines · Fabio Estevam
Quoted 24 lines · Simon Glass
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB*** Warning - bad CRC, using default environment
Quoted 9 lines
Quoted 4 lines
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)I am wondering if this invalid opcode is caused by
6c2f758cee266f7648.Could you please try this?
No, this does not resolve this issue.
Quoted 9 lines
arch/x86/include/asm/bitops.h +1
-1@@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"rm" (x)); +"1:" :"=r" (r) :"g" (x));Quoted 6 lines
arch/x86/include/asm/bitops.h static __inline__ int ffs(int x) · line 370
Quoted 2 lines
arch/x86/include/asm/bitops.h +0
-0return r+1 ; }It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
Quoted 7 lines
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct
dm_spi_flash_opsinstead, then convert the affected boards to driver model?
Hang on, didn't we have this discussion on one of the earlier threads about this? Part of the problem here is that everything else required to do this on DM isn't quite there and Fabio has agreed to (under pain of feature removal later) do the conversion when possible but to not otherwise block getting this feature (and thus some platform(s)) integrated already.
Signature · 8 lines
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PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Hi Tom,
Quoted 75 lines · Tom Rini
Quoted 66 lines · Simon Glass
Hi,
Quoted 49 lines · Bin Meng
Hi,
Quoted 25 lines · Fabio Estevam
Quoted 24 lines · Simon Glass
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB*** Warning - bad CRC, using default environment
Quoted 9 lines
Quoted 4 lines
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)I am wondering if this invalid opcode is caused by
6c2f758cee266f7648.Could you please try this?
No, this does not resolve this issue.
Quoted 9 lines
arch/x86/include/asm/bitops.h +1
-1@@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"rm" (x)); +"1:" :"=r" (r) :"g" (x));Quoted 6 lines
arch/x86/include/asm/bitops.h static __inline__ int ffs(int x) · line 370
Quoted 2 lines
arch/x86/include/asm/bitops.h +0
-0return r+1 ; }It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
Quoted 7 lines
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct
dm_spi_flash_opsinstead, then convert the affected boards to driver model?
Quoted 6 lines
Hang on, didn't we have this discussion on one of the earlier threads about this? Part of the problem here is that everything else required to do this on DM isn't quite there and Fabio has agreed to (under pain of feature removal later) do the conversion when possible but to not otherwise block getting this feature (and thus some platform(s)) integrated already.
OK that sounds good, thanks.
Regards,
Simon
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
Hi Tom/Simon/Febio,
Quoted 78 lines · Simon Glass
Hi Tom,
Quoted 75 lines · Tom Rini
Quoted 73 lines · Simon Glass
Hi,
Quoted 49 lines · Bin Meng
Hi,
Quoted 25 lines · Fabio Estevam
Quoted 24 lines · Simon Glass
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Simon,
Quoted 4 lines · Simon Glass
This patch breaks
chromebook_link- I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB*** Warning - bad CRC, using default environment
Quoted 9 lines
Quoted 4 lines
Video: 1280x1024x16
Model: Google Link
SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)I am wondering if this invalid opcode is caused by
6c2f758cee266f7648.Could you please try this?
No, this does not resolve this issue.
Quoted 9 lines
arch/x86/include/asm/bitops.h +1
-1@@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" -"1:" :"=r" (r) :"rm" (x)); +"1:" :"=r" (r) :"g" (x));Quoted 6 lines
arch/x86/include/asm/bitops.h static __inline__ int ffs(int x) · line 370
Quoted 2 lines
arch/x86/include/asm/bitops.h +0
-0return r+1 ; }It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct
dm_spi_flash_opsinstead, then convert the affected boards to driver model?
Quoted 8 lines
Quoted 6 lines
Hang on, didn't we have this discussion on one of the earlier threads about this? Part of the problem here is that everything else required to do this on DM isn't quite there and Fabio has agreed to (under pain of feature removal later) do the conversion when possible but to not otherwise block getting this feature (and thus some platform(s)) integrated already.
OK that sounds good, thanks.
Idea of making lock ops to common for both dm and non-dm(w/o adding them to dm_spi_ops) is that all generic spi_flash ops are going to use mtd ops similar to nand and Linux spi-nor. I did that mtd conversion in this [1] series and going forward spi_flash{} doesn't have generic ops all are inherited from mtd_info this is my initial plan for moving to spi-nor core addition.
[1] http://u-boot.10912.n7.nabble.com/PATCH-v6-00-23-sf-MTD-support-td233769.html
thanks!
Signature · 1 line
Jagan | openedev.
PATCH v7 21/21 sf: Add SPI NOR protection mechanism
In reply to Simon GlassHi Simon,
Quoted 3 lines · Simon Glass
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct
dm_spi_flash_opsinstead, then convert the affected boards to driver model?
Ok, I will give it a try in converting imx spi driver to DM as a first step, and then moving the lock functions into dm_spi_flash_ops.
Actually I should start with converting imx serial driver to DM as we now have a deadline approaching :-)
PATCH v7 1/21 include: Add log2 header from the kernel
In reply to Fabio EstevamQuoted 8 lines · Fabio Estevam
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
I'm giving this and the rest of the series a build spin now and if it's all good I'll push, otherwise I'll have some more feedback.
Signature · 8 lines
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PATCH v7 1/21 include: Add log2 header from the kernel
Quoted 6 lines · Tom Rini
Quoted 4 lines · Fabio Estevam
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Quoted 7 lines
Quoted 4 lines
Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>I'm giving this and the rest of the series a build spin now and if it's all good I'll push, otherwise I'll have some more feedback.
Thanks, Tom!
PATCH v7 1/21 include: Add log2 header from the kernel
Quoted 12 lines · Fabio Estevam
Quoted 11 lines · Tom Rini
Quoted 8 lines · Fabio Estevam
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Quoted 4 lines
Quoted 2 lines
I'm giving this and the rest of the series a build spin now and if it's all good I'll push, otherwise I'll have some more feedback.
Thanks, Tom!
For tqma6s_mba6_spi, at91sam9261ek_dataflash_cs0 this is not bisectable. I'm going to see how the things are at the end of the series only now.
Signature · 8 lines
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PATCH v7 1/21 include: Add log2 header from the kernel
Hi Tom,
Quoted 2 lines · Tom Rini
For
tqma6s_mba6_spi,at91sam9261ek_dataflash_cs0this is not bisectable. I'm going to see how the things are at the end of the series only now.
Ok, I have a fix for this issue. We just need the following patch to be applied after the second patch of this series.
PATCH v7 1/21 include: Add log2 header from the kernel
Quoted 54 lines · Fabio Estevam
Hi Tom,
Quoted 2 lines · Tom Rini
For
tqma6s_mba6_spi,at91sam9261ek_dataflash_cs0this is not bisectable. I'm going to see how the things are at the end of the series only now.Ok, I have a fix for this issue. We just need the following patch to be applied after the second patch of this series.
From
a435dfc50f03bb861c6aab0e8f5c3d9587a16268Mon Sep 17 00:00:00 2001
From: Fabio Estevam <[email protected]>
Date: Thu, 5 Nov 2015 15:44:56 -0200
Subject: [PATCH] bitops: Add linux/compiler header fileWe need to add <
linux/compiler.h> so that__always_inlinecan be understood.Otherwise we can get errors like:
include/asm-generic/bitops/__fls.h:12:24: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?unsigned?include/asm-generic/bitops/__ffs.h:12:24: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?uninclude/asm-generic/bitops/fls.h:12:24: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?int?include/asm-generic/bitops/fls64.h:18:24: error: expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?int?
make[1]: *** [arch/arm/lib/asm-offsets.s] Error 1Signed-off-by Fabio Estevam <[email protected]>--- include/linux/bitops.h | 1 + 1 file changed, 1 insertion(+)include/linux/bitops.h +1
-0@@ -2,6 +2,7 @@#define _LINUX_BITOPS_H#include <asm/types.h> +#include <linux/compiler.h> #define BIT (nr) (1UL << (nr))#define BIT_MASK (nr) (1UL << ((nr) % BITS_PER_LONG))Signature · 6 lines
1.9.1 and then patch 17 just needs to remove the #include <linux/compiler.h>. I can fix it in v8 if you want. I will wait to see your build result for the entire series.
I can fix this much locally. sandbox fails to build at the end:
+(sandbox) ../arch/sandbox/include/asm/types.h:53:23: error:
?CONFIG_SANDBOX_BITS_PER_LONG? undeclared (first use in this function)
Signature · 8 lines
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PATCH v7 1/21 include: Add log2 header from the kernel
Quoted 3 lines · Tom Rini
I can fix this much locally. sandbox fails to build at the end:
+(sandbox)../arch/sandbox/include/asm/types.h:53:23: error:
?CONFIG_SANDBOX_BITS_PER_LONG? undeclared (first use in this function)
Ok, here is the fix on top of patch 18:
drivers/mtd/mtdcore.c +1 -1
@@ -28,10 +28,10 @@#include <linux/slab.h> #else #include <linux/err.h> -#include <linux/log2.h> #include <ubi_uboot.h> #endif +#include <linux/log2.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h>
Thanks!
PATCH v7 1/21 include: Add log2 header from the kernel
Quoted 22 lines · Fabio Estevam
Quoted 3 lines · Tom Rini
I can fix this much locally. sandbox fails to build at the end:
+(sandbox)../arch/sandbox/include/asm/types.h:53:23: error:
?CONFIG_SANDBOX_BITS_PER_LONG? undeclared (first use in this function)Ok, here is the fix on top of patch 18:
drivers/mtd/mtdcore.c +1
-1@@ -28,10 +28,10 @@#include <linux/slab.h> #else #include <linux/err.h> -#include <linux/log2.h> #include <ubi_uboot.h> #endif +#include <linux/log2.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h>
Quoted 1 line
Thanks!
OK, we're good. I'll queue up and push things for real in the morning.
Signature · 8 lines
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PATCH v7 1/21 include: Add log2 header from the kernel
Quoted 1 line · Tom Rini
OK, we're good. I'll queue up and push things for real in the morning.
Excellent! Thanks, Tom!
PATCH v7 1/21 include: Add log2 header from the kernel
In reply to Fabio EstevamQuoted 8 lines · Fabio Estevam
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by Fabio Estevam <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Heiko Schocher <[email protected]>Reviewed-by Jagan Teki <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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