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LCD: Add an option to skip registration as an stdio output

PATCH New Lin Huang 2 participants 5 messages Dec 7, 2015 Arm i.MX and Layerscape

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Lin Huang

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#0 lore raw

PATCH 1/159 LCD: Add an option to skip registration as an stdio output

From: Stephane Ayotte <[email protected]>

This patch adds an option to skip the registration of LCD stdio output for boards that want to show different text on LCD than on serial output (or the active stdout selected by the environment variable).

Signed-off-by Stephane Ayotte <[email protected]>
---
 common/lcd.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)
common/lcd.c +13 -0
index d29308a..ed68be9 100644
@@ -143,6 +143,16 @@ __weak int lcd_get_size(int *line_length)
 	return *line_length * panel_info.vl_row;
 }
 
+/*
+ * Implement a weak default function for boards that optionally
+ * need to skip the lcd console initialization.
+ */
+__weak int board_lcd_console_skip(void)
+{
+	/* As default, don't skip cfb init */
+	return 0;
+}
+
 int drv_lcd_init(void)
 {
 	struct stdio_dev lcddev;

@@ -152,6 +162,9 @@ int drv_lcd_init(void)
 
 	lcd_init(lcd_base);
 
+	if (board_lcd_console_skip())
+		return 0;
+
 	/* Device initialization */
 	memset(&lcddev, 0, sizeof(lcddev));
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH 1/159 LCD: Add an option to skip registration as an stdio output

Hi all,

i am sorry send wrong patch, please ignore these patchs.

2015-12-07 11:04 GMT+08:00 Lin Huang <[email protected]>:

Quoted 46 lines

From: Stephane Ayotte <[email protected]>

This patch adds an option to skip the registration of LCD stdio output for boards that want to show different text on LCD than on serial output (or the active stdout selected by the environment variable).

Signed-off-by Stephane Ayotte <[email protected]>
---
 common/lcd.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)
common/lcd.c +13 -1
index d29308a..ed68be9 100644
@@ -143,6 +143,16 @@ __weak int lcd_get_size(int *line_length)
        return *line_length * panel_info.vl_row;
 }
 
+/*
+ * Implement a weak default function for boards that optionally
+ * need to skip the lcd console initialization.
+ */
+__weak int board_lcd_console_skip(void)
+{
+       /* As default, don't skip cfb init */
+       return 0;
+}
+
 int drv_lcd_init(void)
 {
        struct stdio_dev lcddev;

@@ -152,6 +162,9 @@ int drv_lcd_init(void)
 
        lcd_init(lcd_base);
 
+       if (board_lcd_console_skip())
+               return 0;
+
        /* Device initialization */
        memset(&lcddev, 0, sizeof(lcddev));
 
--

1.9.1

author
#2 lore raw

PATCH 2/159 arm: mx6: Reduce SPL malloc pool size

In reply to Lin Huang

From: Marek Vasut <[email protected]>

Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB.

Signed-off-by Marek Vasut <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Tim Harvey <[email protected]>
Tested-by Stefano Babic <[email protected]>
Acked-by Tim Harvey <[email protected]>
---
 include/configs/imx6_spl.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
include/configs/imx6_spl.h +3 -3
index 1744f2c..43ce7fe 100644
@@ -63,15 +63,15 @@
 
 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
 #define CONFIG_SPL_BSS_START_ADDR      0x88200000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x100000        /* 1 MB */
+#define CONFIG_SPL_BSS_MAX_SIZE        0x100000		/* 1 MB */
 #define CONFIG_SYS_SPL_MALLOC_START    0x88300000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x3200000       /* 50 MB */
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000		/* 1 MB */
 #define CONFIG_SYS_TEXT_BASE           0x87800000
 #else
 #define CONFIG_SPL_BSS_START_ADDR	0x18200000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000	/* 1 MB */
 #define CONFIG_SYS_SPL_MALLOC_START	0x18300000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x3200000	/* 50 MB */
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
 #define CONFIG_SYS_TEXT_BASE		0x17800000
 #endif
 #endif
Signature · 1 line
1.9.1
#3 lore raw

PATCH 2/159 arm: mx6: Reduce SPL malloc pool size

Hi Lin,

Quoted 29 lines · Lin Huang

From: Marek Vasut <[email protected]>

Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB.

Signed-off-by Marek Vasut <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Tim Harvey <[email protected]>
Tested-by Stefano Babic <[email protected]>
Acked-by Tim Harvey <[email protected]>
---
 include/configs/imx6_spl.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
include/configs/imx6_spl.h +2 -2
index 1744f2c..43ce7fe 100644
@@ -63,15 +63,15 @@
 
 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
 #define CONFIG_SPL_BSS_START_ADDR      0x88200000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x100000        /* 1 MB */
+#define CONFIG_SPL_BSS_MAX_SIZE        0x100000		/* 1 MB */
 #define CONFIG_SYS_SPL_MALLOC_START    0x88300000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x3200000       /* 50 MB */
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000		/* 1 MB */

include/configs/imx6_spl.h line 77

Quoted 10 lines
include/configs/imx6_spl.h +1 -1
 #define CONFIG_SYS_TEXT_BASE           0x87800000
 #else
 #define CONFIG_SPL_BSS_START_ADDR	0x18200000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000	/* 1 MB */
 #define CONFIG_SYS_SPL_MALLOC_START	0x18300000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x3200000	/* 50 MB */
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
 #define CONFIG_SYS_TEXT_BASE		0x17800000
 #endif
 #endif

Marek's patch was already accepted and it is mainline. Which is the reason to post it again ?

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
author
#4 lore raw

PATCH 3/159 cgtqmx6eval: Add SPI NOR flash support

In reply to Lin Huang

From: Otavio Salvador <[email protected]>

Add SPI NOR support:

=> sf probe
SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB

Signed-off-by Otavio Salvador <[email protected]>
Reviewed-by Fabio Estevam <[email protected]>
---
 board/congatec/cgtqmx6eval/cgtqmx6eval.c | 29 +++++++++++++++++++++++++++++
 include/configs/cgtqmx6eval.h            | 12 ++++++++++++
 2 files changed, 41 insertions(+)
board/congatec/cgtqmx6eval/cgtqmx6eval.c +29 -0
index cf5607b..0458229 100644
@@ -45,6 +45,10 @@ DECLARE_GLOBAL_DATA_PTR;
 	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |			\
 	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
 
+#define SPI_PAD_CTRL (PAD_CTL_HYS |				\
+	PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
 #define MX6Q_QMX6_PFUZE_MUX		IMX_GPIO_NR(6, 9)
 
 

@@ -152,6 +156,13 @@ static iomux_v3_cfg_t enet_pads_ar8035[] = {
 	MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
 };
 
+static iomux_v3_cfg_t const ecspi1_pads[] = {
+	MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
+	MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
+	MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
+	MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 struct i2c_pads_info i2c_pad_info1 = {
 	.scl = {

@@ -381,6 +392,14 @@ static void setup_iomux_uart(void)
 	imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
 }
 
+#ifdef CONFIG_MXC_SPI
+static void setup_spi(void)
+{
+	imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
+	gpio_direction_output(IMX_GPIO_NR(3, 19), 0);
+}
+#endif
+
 #ifdef CONFIG_FSL_ESDHC
 static struct fsl_esdhc_cfg usdhc_cfg[] = {
 	{USDHC2_BASE_ADDR},

@@ -647,6 +666,9 @@ int board_early_init_f(void)
 	setup_iomux_uart();
 	setup_display();
 
+#ifdef CONFIG_MXC_SPI
+	setup_spi();
+#endif
 	return 0;
 }
 

@@ -671,6 +693,13 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_MXC_SPI
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+	return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -EINVAL;
+}
+#endif
+
 #ifdef CONFIG_CMD_BMODE
 static const struct boot_mode board_boot_modes[] = {
 	/* 4 bit bus width */
include/configs/cgtqmx6eval.h +12 -0
index e0aa4b0..9aa66c7 100644
@@ -29,6 +29,16 @@
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
+/* SPI NOR */
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_MXC_SPI
+#define CONFIG_SF_DEFAULT_BUS		0
+#define CONFIG_SF_DEFAULT_SPEED		20000000
+#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
+
 /* Miscellaneous commands */
 #define CONFIG_CMD_BMODE
 

@@ -200,8 +210,10 @@
 		"else " \
 			"bootz; " \
 		"fi;\0" \
+	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
 
 #define CONFIG_BOOTCOMMAND \
+	"run spilock;"	    \
 	"mmc dev ${mmcdev};" \
 	"if mmc rescan; then " \
 		"if run loadbootscript; then " \
Signature · 1 line
1.9.1