arm: socfpga: Allow DWC2 UDC probing from OF
Subsystems (2)
PATCH 1/7 arm: socfpga: Allow DWC2 UDC probing from OF
The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it.
--- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 2 files changed, 2 insertions(+)
include/fdtdec.h +1 -0
@@ -167,6 +167,7 @@ enum fdt_compat_id {COMPAT_INTEL_IRQ_ROUTER ,/* Intel Interrupt Router */ COMPAT_ALTERA_SOCFPGA_DWMAC ,/* SoCFPGA Ethernet controller */ COMPAT_ALTERA_SOCFPGA_DWMMC ,/* SoCFPGA DWMMC controller */ +COMPAT_ALTERA_SOCFPGA_DWC2USB ,/* SoCFPGA DWC2 USB controller */ COMPAT_INTEL_BAYTRAIL_FSP ,/* Intel Bay Trail FSP */ COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
lib/fdtdec.c +1 -0
@@ -71,6 +71,7 @@ static const char * const compat_names[COMPAT_COUNT] = {COMPAT (COMPAT_INTEL_IRQ_ROUTER ,"intel,irq-router" ),COMPAT (ALTERA_SOCFPGA_DWMAC ,"altr,socfpga-stmmac" ),COMPAT (ALTERA_SOCFPGA_DWMMC ,"altr,socfpga-dw-mshc" ), +COMPAT (ALTERA_SOCFPGA_DWC2USB ,"snps,dwc2" ),COMPAT (COMPAT_INTEL_BAYTRAIL_FSP ,"intel,baytrail-fsp" ), COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), };
Signature · 1 line
2.1.4
PATCH 2/7 arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
--- arch/arm/dts/socfpga_arria5_socdk.dts | 1 + board/altera/arria5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_arria5_defconfig | 2 ++ include/configs/socfpga_arria5_socdk.h | 3 --- 4 files changed, 22 insertions(+), 5 deletions(-)
arch/arm/dts/socfpga_arria5_socdk.dts +1 -0
@@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator {
board/altera/arria5-socdk/socfpga.c +19 -2
@@ -5,12 +5,12 @@*/ #include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h> #include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -29,12 +29,29 @@ int board_init(void)#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg =CONFIG_USB_DWC2_REG_ADDR , .usb_gusbcfg =0x1417 , };int board_usb_init (int index,enum usb_init_type init) { +int node[2 ], count; +fdt_addr_t addr; + + count =fdtdec_find_aliases_for_id (gd->fdt_blob,"udc" , +COMPAT_ALTERA_SOCFPGA_DWC2USB , + node,2 ); +if (count <=0 )/* No controller found. */ +return 0 ; + + addr =fdtdec_get_addr (gd->fdt_blob, node[0 ],"reg" ); +if (addr ==FDT_ADDR_T_NONE ) { +printf ("UDC Controller has no 'reg' property!\n" ); +return -EINVAL ; + } + +/* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; +return dwc2_udc_probe (&socfpga_otg_data); }
configs/socfpga_arria5_defconfig +2 -0
@@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y
include/configs/socfpga_arria5_socdk.h +0 -3
@@ -56,9 +56,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera"/* Extra Environment */
Signature · 1 line
2.1.4
PATCH 2/7 arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 13 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 8 lines
--- arch/arm/dts/socfpga_arria5_socdk.dts | 1 + board/altera/arria5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_arria5_defconfig | 2 ++ include/configs/socfpga_arria5_socdk.h | 3 --- 4 files changed, 22 insertions(+), 5 deletions(-)
Thanks
Chin Liang
PATCH 3/7 arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
In reply to Marek VasutThis patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
--- arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++++---- board/altera/cyclone5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_cyclone5_defconfig | 2 ++ include/configs/socfpga_cyclone5_socdk.h | 3 --- 4 files changed, 26 insertions(+), 9 deletions(-)
arch/arm/dts/socfpga_cyclone5_socdk.dts +5 -4
@@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator {
@@ -77,10 +78,6 @@ vqmmc-supply = <®ulator_3_3v>; }; -&usb1 { - status = "okay"; -}; - &qspi { status = "okay";
@@ -100,3 +97,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +};
board/altera/cyclone5-socdk/socfpga.c +19 -2
@@ -5,12 +5,12 @@*/ #include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h> #include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -29,12 +29,29 @@ int board_init(void)#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg =CONFIG_USB_DWC2_REG_ADDR , .usb_gusbcfg =0x1417 , };int board_usb_init (int index,enum usb_init_type init) { +int node[2 ], count; +fdt_addr_t addr; + + count =fdtdec_find_aliases_for_id (gd->fdt_blob,"udc" , +COMPAT_ALTERA_SOCFPGA_DWC2USB , + node,2 ); +if (count <=0 )/* No controller found. */ +return 0 ; + + addr =fdtdec_get_addr (gd->fdt_blob, node[0 ],"reg" ); +if (addr ==FDT_ADDR_T_NONE ) { +printf ("UDC Controller has no 'reg' property!\n" ); +return -EINVAL ; + } + +/* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; +return dwc2_udc_probe (&socfpga_otg_data); }
configs/socfpga_cyclone5_defconfig +2 -0
@@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y
include/configs/socfpga_cyclone5_socdk.h +0 -3
@@ -56,9 +56,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera"/* Extra Environment */
Signature · 1 line
2.1.4
PATCH 3/7 arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 13 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 7 lines
--- arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++++---- board/altera/cyclone5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_cyclone5_defconfig | 2 ++ include/configs/socfpga_cyclone5_socdk.h | 3 --- 4 files changed, 26 insertions(+), 9 deletions(-)
Thanks
Chin Liang
PATCH 4/7 arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data
In reply to Marek VasutThis patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
--- arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ include/configs/socfpga_de0_nano_soc.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-)
arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +5 -0
@@ -16,6 +16,7 @@ aliases { ethernet0 = &gmac1; + udc0 = &usb1; }; memory {
@@ -59,3 +60,7 @@ status = "okay"; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +};
configs/socfpga_de0_nano_soc_defconfig +2 -0
@@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y
include/configs/socfpga_de0_nano_soc.h +0 -3
@@ -56,9 +56,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Terasic"/* Extra Environment */
Signature · 1 line
2.1.4
PATCH 4/7 arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 13 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 7 lines
--- arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ include/configs/socfpga_de0_nano_soc.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-)
Thanks
Chin Liang
PATCH 5/7 arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded data
In reply to Marek VasutThis patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
--- arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++++ board/denx/mcvevk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_mcvevk_defconfig | 2 ++ include/configs/socfpga_mcvevk.h | 3 --- 4 files changed, 26 insertions(+), 5 deletions(-)
arch/arm/dts/socfpga_cyclone5_mcvevk.dts +5 -0
@@ -16,6 +16,7 @@ aliases { ethernet0 = &gmac0; + udc0 = &usb1; }; memory {
@@ -51,3 +52,7 @@ bus-width = <8>; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +};
board/denx/mcvevk/socfpga.c +19 -2
@@ -5,12 +5,12 @@*/ #include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h> #include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -29,12 +29,29 @@ int board_init(void)#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg =CONFIG_USB_DWC2_REG_ADDR , .usb_gusbcfg =0x1417 , };int board_usb_init (int index,enum usb_init_type init) { +int node[2 ], count; +fdt_addr_t addr; + + count =fdtdec_find_aliases_for_id (gd->fdt_blob,"udc" , +COMPAT_ALTERA_SOCFPGA_DWC2USB , + node,2 ); +if (count <=0 )/* No controller found. */ +return 0 ; + + addr =fdtdec_get_addr (gd->fdt_blob, node[0 ],"reg" ); +if (addr ==FDT_ADDR_T_NONE ) { +printf ("UDC Controller has no 'reg' property!\n" ); +return -EINVAL ; + } + +/* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; +return dwc2_udc_probe (&socfpga_otg_data); }
configs/socfpga_mcvevk_defconfig +2 -0
@@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y
include/configs/socfpga_mcvevk.h +0 -3
@@ -49,9 +49,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "DENX"/* Extra Environment */
Signature · 1 line
2.1.4
PATCH 5/7 arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 13 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 8 lines
--- arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++++ board/denx/mcvevk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_mcvevk_defconfig | 2 ++ include/configs/socfpga_mcvevk.h | 3 --- 4 files changed, 26 insertions(+), 5 deletions(-)
Thanks
Chin Liang
PATCH 6/7 arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data
In reply to Marek VasutThis patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
--- arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 +++++++-- board/terasic/sockit/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_sockit_defconfig | 2 ++ include/configs/socfpga_sockit.h | 3 --- 4 files changed, 28 insertions(+), 7 deletions(-)
arch/arm/dts/socfpga_cyclone5_sockit.dts +7 -2
@@ -14,9 +14,10 @@ bootargs = "console=ttyS0,115200"; }; - aliases { + aliases { ethernet0 = &gmac1; - }; + udc0 = &usb1; + }; memory { name = "memory";
@@ -90,3 +91,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +};
board/terasic/sockit/socfpga.c +19 -2
@@ -5,12 +5,12 @@*/ #include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h> #include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -29,12 +29,29 @@ int board_init(void)#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg =CONFIG_USB_DWC2_REG_ADDR , .usb_gusbcfg =0x1417 , };int board_usb_init (int index,enum usb_init_type init) { +int node[2 ], count; +fdt_addr_t addr; + + count =fdtdec_find_aliases_for_id (gd->fdt_blob,"udc" , +COMPAT_ALTERA_SOCFPGA_DWC2USB , + node,2 ); +if (count <=0 )/* No controller found. */ +return -EINVAL ; + + addr =fdtdec_get_addr (gd->fdt_blob, node[0 ],"reg" ); +if (addr ==FDT_ADDR_T_NONE ) { +printf ("UDC Controller has no 'reg' property!\n" ); +return -EINVAL ; + } + +/* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; +return dwc2_udc_probe (&socfpga_otg_data); }
configs/socfpga_sockit_defconfig +2 -0
@@ -23,3 +23,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y
include/configs/socfpga_sockit.h +0 -3
@@ -56,9 +56,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Terasic"/* Extra Environment */
Signature · 1 line
2.1.4
PATCH 6/7 arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 13 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 8 lines
--- arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 +++++++-- board/terasic/sockit/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_sockit_defconfig | 2 ++ include/configs/socfpga_sockit.h | 3 --- 4 files changed, 28 insertions(+), 7 deletions(-)
Thanks
Chin Liang
PATCH 7/7 arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
In reply to Marek VasutThis patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
--- arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
arch/arm/dts/socfpga_cyclone5_socrates.dts +8 -0
@@ -14,6 +14,10 @@ bootargs = "console=ttyS0,115200"; }; + aliases { + udc0 = &usb1; + }; + memory { name = "memory"; device_type = "memory";
@@ -72,3 +76,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +};
board/ebv/socrates/socfpga.c +19 -2
@@ -5,12 +5,12 @@*/ #include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h> #include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -29,12 +29,29 @@ int board_init(void)#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg =CONFIG_USB_DWC2_REG_ADDR , .usb_gusbcfg =0x1417 , };int board_usb_init (int index,enum usb_init_type init) { +int node[2 ], count; +fdt_addr_t addr; + + count =fdtdec_find_aliases_for_id (gd->fdt_blob,"udc" , +COMPAT_ALTERA_SOCFPGA_DWC2USB , + node,2 ); +if (count <=0 )/* No controller found. */ +return 0 ; + + addr =fdtdec_get_addr (gd->fdt_blob, node[0 ],"reg" ); +if (addr ==FDT_ADDR_T_NONE ) { +printf ("UDC Controller has no 'reg' property!\n" ); +return -EINVAL ; + } + +/* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; +return dwc2_udc_probe (&socfpga_otg_data); }
configs/socfpga_socrates_defconfig +2 -0
@@ -22,3 +22,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y
include/configs/socfpga_socrates.h +0 -3
@@ -52,9 +52,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "EBV"/* Extra Environment */
Signature · 1 line
2.1.4
PATCH 7/7 arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 13 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 9 lines
--- arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++- - configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
Thanks
Chin Liang
PATCH 7/7 arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
In reply to Marek VasutQuoted 17 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>--- arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
<snip>
Quoted 6 lines
include/configs/socfpga_socrates.h +0
-0
include/configs/socfpga_socrates.h line 57
Quoted 9 lines
include/configs/socfpga_socrates.h +0
-3@@ -52,9 +52,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "EBV"/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
---
(quoted diff) +0 -0
b/include/configs/socfpga_common.h
index f74c758..b57fd4c 100644
include/configs/socfpga_common.h +0 -7
@@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);#ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* -* NOTE: User must define either of the following to select which -* of the two USB controllers available on SoCFPGA to use. -* The DWC2 driver doesn't support multiple USB controllers. -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -*/ #endif /*
Dinh
PATCH 7/7 arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 52 lines · Dinh Nguyen
Quoted 18 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>---
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)<snip>
Quoted 16 lines
(quoted diff) +0
-0
b/include/configs/socfpga_socrates.hindex de8ced6..1b0888f 100644include/configs/socfpga_socrates.h +0
-3@@ -52,9 +52,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define
CONFIG_G_DNL_MANUFACTURER"EBV"Quoted 1 line
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
---
include/configs/socfpga_common.h +0
-0@@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);#ifdef CONFIG_CMD_USB
include/configs/socfpga_common.h unsigned int cm_get_qspi_controller_clk_hz(void); · line 236
Quoted 10 lines
include/configs/socfpga_common.h +0
-7#define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* -* NOTE: User must define either of the following to select which -* of the two USB controllers available on SoCFPGA to use. -* The DWC2 driver doesn't support multiple USB controllers. -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -*/ #endif
You're right. Can you give me a SoB line on this or submit one ?
Best regards,
Marek Vasut
PATCH 7/7 arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 57 lines · Marek Vasut
Quoted 56 lines · Dinh Nguyen
Quoted 18 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>---
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)<snip>
Quoted 16 lines
(quoted diff) +0
-0
b/include/configs/socfpga_socrates.hindex de8ced6..1b0888f 100644include/configs/socfpga_socrates.h +0
-3@@ -52,9 +52,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define
CONFIG_G_DNL_MANUFACTURER"EBV"Quoted 1 line
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
---
include/configs/socfpga_common.h +0
-2@@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);#ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* -* NOTE: User must define either of the following to select which
Quoted 9 lines
include/configs/socfpga_common.h unsigned int cm_get_qspi_controller_clk_hz(void); · line 236
Quoted 6 lines
include/configs/socfpga_common.h +0
-5-* of the two USB controllers available on SoCFPGA to use. -* The DWC2 driver doesn't support multiple USB controllers. -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -*/ #endif You're right. Can you give me a SoB line on this or submit one ?
I'll submit a patch for you.
Dinh
PATCH 7/7 arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
Quoted 66 lines · Dinh Nguyen
Quoted 65 lines · Marek Vasut
Quoted 64 lines · Dinh Nguyen
Quoted 18 lines · Marek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>---
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)<snip>
Quoted 16 lines
(quoted diff) +0
-0
b/include/configs/socfpga_socrates.hindex de8ced6..1b0888f 100644include/configs/socfpga_socrates.h +0
-3@@ -52,9 +52,6 @@#define CONFIG_ENV_OFFSET 512/* just after the MBR */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define
CONFIG_G_DNL_MANUFACTURER"EBV"Quoted 1 line
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
---
include/configs/socfpga_common.h +0
-7@@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);#ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* -* NOTE: User must define either of the following to select which -* of the two USB controllers available on SoCFPGA to use. -* The DWC2 driver doesn't support multiple USB controllers. -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS -* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -*/
Quoted 5 lines
Quoted 3 lines
Quoted 1 line
#endif
You're right. Can you give me a SoB line on this or submit one ?
I'll submit a patch for you.
Thanks!
I am completely happy that we're finally reaching the point where we just don't need any of the board-specific crap.
My next step I think would be to revisit the configuration files in include/configs/socfpga_* and possibly do some more unification of those into include/configs/socfpga_common.h .
PATCH 1/7 arm: socfpga: Allow DWC2 UDC probing from OF
In reply to Marek VasutQuoted 9 lines · Marek Vasut
The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by Marek Vasut <[email protected]>Cc Simon Glass <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 6 lines
--- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 2 files changed, 2 insertions(+)
Thanks
Chin Liang
PATCH 1/7 arm: socfpga: Allow DWC2 UDC probing from OF
Quoted 18 lines · Chin Liang See
Quoted 9 lines · Marek Vasut
The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by Marek Vasut <[email protected]>Cc Simon Glass <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Lukasz Majewski <[email protected]>Cc Lukasz Majewski <[email protected]>Quoted 6 lines
--- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 2 files changed, 2 insertions(+)
Quoted 2 lines
Reviewed-by Chin Liang See <[email protected]>