Moving Uartlite to DM

PATCH Superseded Michal Simek 3 participants 17 messages Dec 17, 2015 – Dec 18, 2015

Subsystems (2)

Arm/Zynq architecture Microblaze architecture

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Michal Simek

author

2015-12-17 12:00 UTC #0 lore raw

v2 cover Moving Uartlite to DM

Hi,

This patch series depends on microblaze cleanup series. All these patches will be available in
git://git.denx.de/u-boot-microblaze.git
also with patches which I am going to send now.

Thanks,
Michal

Changes in v2:
- Remove unneeded headers
- Use get_dev_addr instead of fdtdec_get_addr
- Use platdata instead of private data
- Add opb compatible string to be in sync with Linux
- Add binding documentation
- Add needed header from the first patch
- Remove WATCHDOG_RESET call
- Extend commit description

Michal Simek (3):
serial: uartlite: Move driver to DM
serial: uartlite: Add support for debug console
serial: uartlite: Add uartlite to Kconfig

 arch/microblaze/Kconfig                            |   1 +
 board/xilinx/microblaze-generic/xparameters.h      |   4 -
 configs/microblaze-generic_defconfig               |   3 +
 .../serial/xilinx_uartlite.txt                     |  13 ++
 doc/driver-model/serial-howto.txt                  |   1 -
 drivers/serial/Kconfig                             |  14 ++
 drivers/serial/serial_xuartlite.c                  | 188 +++++++++------------
 include/configs/microblaze-generic.h               |   7 +-
 8 files changed, 116 insertions(+), 115 deletions(-)
 create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

Signature · 1 line

1.9.1

Michal Simek

author

2015-12-17 12:00 UTC #1 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

 arch/microblaze/Kconfig                            |   1 +
 configs/microblaze-generic_defconfig               |   2 +
 .../serial/xilinx_uartlite.txt                     |  13 ++
 doc/driver-model/serial-howto.txt                  |   1 -
 drivers/serial/serial_xuartlite.c                  | 170 ++++++++-------------
 5 files changed, 78 insertions(+), 109 deletions(-)
 create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
 	select SUPPORT_SPL
 	select OF_CONTROL
 	select DM
+	select DM_SERIAL
 
 endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
 CONFIG_MICROBLAZE=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
 CONFIG_TARGET_MICROBLAZE_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
 CONFIG_SPL=y
 CONFIG_SYS_PROMPT="U-Boot-mONStR> "
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +13 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or "xlnx,opb-uartlite-1.00.b"
+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.
+
+Example:
+	serial at 40600000 {
+		compatible = "xlnx,xps-uartlite-1.00.a";
+		interrupts = <1 0>;
+		reg = <0x40600000 0x10000>;
+	};

doc/driver-model/serial-howto.txt +0 -1

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the remaining serial drivers:
    serial_pxa.c
    serial_s3c24x0.c
    serial_sa1100.c
-   serial_xuartlite.c
    usbtty.c
 
 You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +62 ~~-108~~

213 lines not on this page · raw message

Signature · 1 line

1.9.1

Thomas Chou

2015-12-17 13:37 UTC #2 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Hi Michal,

Quoted 169 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

  arch/microblaze/Kconfig                            |   1 +
  configs/microblaze-generic_defconfig               |   2 +
  .../serial/xilinx_uartlite.txt                     |  13 ++
  doc/driver-model/serial-howto.txt                  |   1 -
  drivers/serial/serial_xuartlite.c                  | 170 ++++++++-------------
  5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
  	select SUPPORT_SPL
  	select OF_CONTROL
  	select DM
+	select DM_SERIAL
 
  endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
  CONFIG_MICROBLAZE=y
  CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
  CONFIG_TARGET_MICROBLAZE_GENERIC=y
  CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
  CONFIG_SPL=y
  CONFIG_SYS_PROMPT="U-Boot-mONStR> "
  CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +13 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or "xlnx,opb-uartlite-1.00.b"
+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.
+
+Example:
+	serial at 40600000 {
+		compatible = "xlnx,xps-uartlite-1.00.a";
+		interrupts = <1 0>;
+		reg = <0x40600000 0x10000>;
+	};

doc/driver-model/serial-howto.txt +0 -1

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the remaining serial drivers:
     serial_pxa.c
     serial_s3c24x0.c
     serial_sa1100.c
-   serial_xuartlite.c
     usbtty.c
 
  You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
  /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
   * Clean driver and add xilinx constant from header file
   *
   * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
  #include <config.h>
  #include <common.h>
+#include <dm.h>
  #include <asm/io.h>
  #include <linux/compiler.h>
  #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
  #define SR_TX_FIFO_FULL		0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY	0x04 /* transmit FIFO empty */
  #define SR_RX_FIFO_VALID_DATA	0x01 /* data in receive FIFO */
  #define SR_RX_FIFO_FULL		0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
  	unsigned int control;
  };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-	[0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-	[1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-	[2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-	[3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+	struct uartlite *regs;
  };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
  {
-	struct uartlite *regs = userial_ports[port];
+	struct uartlite_platdata *plat = dev_get_platdata(dev);
+	struct uartlite *regs = plat->regs;
 
-	if (c == '\n')
-		uartlite_serial_putc('\r', port);
+	if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+		return -EAGAIN;
 
-	while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-		;
-	out_be32(&regs->tx_fifo, c & 0xff);
-}
+	out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-	while (*s)
-		uartlite_serial_putc(*s++, port);
+	return 0;
  }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
  {
-	struct uartlite *regs = userial_ports[port];
+	struct uartlite_platdata *plat = dev_get_platdata(dev);
+	struct uartlite *regs = plat->regs;
+
+	if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+		return -EAGAIN;
 
-	while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-		;
  	return in_be32(&regs->rx_fifo) & 0xff;
  }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

  {
-	struct uartlite *regs = userial_ports[port];
+	struct uartlite_platdata *plat = dev_get_platdata(dev);
+	struct uartlite *regs = plat->regs;
 
-	return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+	if (input)
+		return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+	return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Otherwise,

Reviewed-by Thomas Chou <[email protected]>

Quoted 111 lines

drivers/serial/serial_xuartlite.c +25 ~~-75~~

  }
 
-static int uartlite_serial_init(const int port)
+static int uartlite_serial_probe(struct udevice *dev)
  {
-	struct uartlite *regs = userial_ports[port];
-
-	if (regs) {
-		out_be32(&regs->control, 0);
-		out_be32(&regs->control,
-			 ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
-		in_be32(&regs->control);
-		return 0;
-	}
+	struct uartlite_platdata *plat = dev_get_platdata(dev);
+	struct uartlite *regs = plat->regs;
 
-	return -1;
-}
+	out_be32(&regs->control, 0);
+	out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
+	in_be32(&regs->control);
 
-/* Multi serial device functions */
-#define DECLARE_ESERIAL_FUNCTIONS(port) \
-	static int userial##port##_init(void) \
-				{ return uartlite_serial_init(port); } \
-	static void userial##port##_setbrg(void) {} \
-	static int userial##port##_getc(void) \
-				{ return uartlite_serial_getc(port); } \
-	static int userial##port##_tstc(void) \
-				{ return uartlite_serial_tstc(port); } \
-	static void userial##port##_putc(const char c) \
-				{ uartlite_serial_putc(c, port); } \
-	static void userial##port##_puts(const char *s) \
-				{ uartlite_serial_puts(s, port); }
-
-/* Serial device descriptor */
-#define INIT_ESERIAL_STRUCTURE(port, __name) {	\
-	.name	= __name,			\
-	.start	= userial##port##_init,		\
-	.stop	= NULL,				\
-	.setbrg	= userial##port##_setbrg,	\
-	.getc	= userial##port##_getc,		\
-	.tstc	= userial##port##_tstc,		\
-	.putc	= userial##port##_putc,		\
-	.puts	= userial##port##_puts,		\
+	return 0;
  }
 
-DECLARE_ESERIAL_FUNCTIONS(0);
-struct serial_device uartlite_serial0_device =
-	INIT_ESERIAL_STRUCTURE(0, "ttyUL0");
-DECLARE_ESERIAL_FUNCTIONS(1);
-struct serial_device uartlite_serial1_device =
-	INIT_ESERIAL_STRUCTURE(1, "ttyUL1");
-DECLARE_ESERIAL_FUNCTIONS(2);
-struct serial_device uartlite_serial2_device =
-	INIT_ESERIAL_STRUCTURE(2, "ttyUL2");
-DECLARE_ESERIAL_FUNCTIONS(3);
-struct serial_device uartlite_serial3_device =
-	INIT_ESERIAL_STRUCTURE(3, "ttyUL3");
-
-__weak struct serial_device *default_serial_console(void)
+static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
  {
-	if (userial_ports[0])
-		return &uartlite_serial0_device;
-	if (userial_ports[1])
-		return &uartlite_serial1_device;
-	if (userial_ports[2])
-		return &uartlite_serial2_device;
-	if (userial_ports[3])
-		return &uartlite_serial3_device;
-
-	return NULL;
-}
+	struct uartlite_platdata *plat = dev_get_platdata(dev);
 
-void uartlite_serial_initialize(void)
-{
-#ifdef XILINX_UARTLITE_BASEADDR
-	serial_register(&uartlite_serial0_device);
-#endif /* XILINX_UARTLITE_BASEADDR */
-#ifdef XILINX_UARTLITE_BASEADDR1
-	serial_register(&uartlite_serial1_device);
-#endif /* XILINX_UARTLITE_BASEADDR1 */
-#ifdef XILINX_UARTLITE_BASEADDR2
-	serial_register(&uartlite_serial2_device);
-#endif /* XILINX_UARTLITE_BASEADDR2 */
-#ifdef XILINX_UARTLITE_BASEADDR3
-	serial_register(&uartlite_serial3_device);
-#endif /* XILINX_UARTLITE_BASEADDR3 */
+	plat->regs = (struct uartlite *)dev_get_addr(dev);
+
+	return 0;
  }
+
+static const struct dm_serial_ops uartlite_serial_ops = {
+	.putc = uartlite_serial_putc,
+	.pending = uartlite_serial_pending,
+	.getc = uartlite_serial_getc,
+};
+
+static const struct udevice_id uartlite_serial_ids[] = {
+	{ .compatible = "xlnx,opb-uartlite-1.00.b", },
+	{ .compatible = "xlnx,xps-uartlite-1.00.a" },
+	{ }
+};
+

drivers/serial/serial_xuartlite.c struct uartlite { · line 116

Quoted 10 lines

drivers/serial/serial_xuartlite.c +10 -0

+U_BOOT_DRIVER(serial_uartlite) = {
+	.name	= "serial_uartlite",
+	.id	= UCLASS_SERIAL,
+	.of_match = uartlite_serial_ids,
+	.ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
+	.probe = uartlite_serial_probe,
+	.ops	= &uartlite_serial_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};

Best regards,
Thomas

Michal Simek

author

2015-12-17 13:58 UTC #3 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Quoted 192 lines · Thomas Chou

Hi Michal,

Quoted 176 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

  arch/microblaze/Kconfig                            |   1 +
  configs/microblaze-generic_defconfig               |   2 +
  .../serial/xilinx_uartlite.txt                     |  13 ++
  doc/driver-model/serial-howto.txt                  |   1 -
  drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
  5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
      select SUPPORT_SPL
      select OF_CONTROL
      select DM
+    select DM_SERIAL
 
  endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
  CONFIG_MICROBLAZE=y
  CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
  CONFIG_TARGET_MICROBLAZE_GENERIC=y
  CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
  CONFIG_SPL=y
  CONFIG_SYS_PROMPT="U-Boot-mONStR> "
  CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

     serial_pxa.c
     serial_s3c24x0.c
     serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
     usbtty.c
 
  You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
  /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
   * Clean driver and add xilinx constant from header file
   *
   * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
  #include <config.h>
  #include <common.h>
+#include <dm.h>
  #include <asm/io.h>
  #include <linux/compiler.h>
  #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
  #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
  #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
  #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
      unsigned int control;
  };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
  };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
  }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
      return in_be32(&regs->rx_fifo) & 0xff;
  }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

Can you please tell me more about it?
I was trying to understand logic of this function but pending function is called just from here. (maybe I missed other occurrences but
drivers/serial/serial-uclass.c:157: if (ops->pending)
drivers/serial/serial-uclass.c:158: return ops->pending(dev,
true);

And not for output.

From docs
@return number of waiting characters, 0 for none, -ve on error

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.

The similar logix is used for input.

Is this logic wrong?

Thanks,
Michal

Simon Glass

2015-12-17 15:27 UTC #4 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Hi Michal,

Quoted 209 lines · Michal Simek

Quoted 192 lines · Thomas Chou

Hi Michal,

Quoted 176 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

  arch/microblaze/Kconfig                            |   1 +
  configs/microblaze-generic_defconfig               |   2 +
  .../serial/xilinx_uartlite.txt                     |  13 ++
  doc/driver-model/serial-howto.txt                  |   1 -
  drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
  5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
      select SUPPORT_SPL
      select OF_CONTROL
      select DM
+    select DM_SERIAL
 
  endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
  CONFIG_MICROBLAZE=y
  CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
  CONFIG_TARGET_MICROBLAZE_GENERIC=y
  CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
  CONFIG_SPL=y
  CONFIG_SYS_PROMPT="U-Boot-mONStR> "
  CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

     serial_pxa.c
     serial_s3c24x0.c
     serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
     usbtty.c
 
  You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
  /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
   * Clean driver and add xilinx constant from header file
   *
   * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
  #include <config.h>
  #include <common.h>
+#include <dm.h>
  #include <asm/io.h>
  #include <linux/compiler.h>
  #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
  #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
  #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
  #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
      unsigned int control;
  };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
  };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
  }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
      return in_be32(&regs->rx_fifo) & 0xff;
  }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

From docs
@return number of waiting characters, 0 for none, -ve on error

Quoted 6 lines

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.
The similar logix is used for input.
Is this logic wrong?

Be careful to return 1 if you don't know how many characters are waiting. It looks like you return 'in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA' which could be >1.

Regards,
Simon

Michal Simek

author

2015-12-17 18:52 UTC #5 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Quoted 215 lines · Simon Glass

Hi Michal,

Quoted 212 lines · Michal Simek

Quoted 192 lines · Thomas Chou

Hi Michal,

Quoted 176 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

  arch/microblaze/Kconfig                            |   1 +
  configs/microblaze-generic_defconfig               |   2 +
  .../serial/xilinx_uartlite.txt                     |  13 ++
  doc/driver-model/serial-howto.txt                  |   1 -
  drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
  5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
      select SUPPORT_SPL
      select OF_CONTROL
      select DM
+    select DM_SERIAL
 
  endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
  CONFIG_MICROBLAZE=y
  CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
  CONFIG_TARGET_MICROBLAZE_GENERIC=y
  CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
  CONFIG_SPL=y
  CONFIG_SYS_PROMPT="U-Boot-mONStR> "
  CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

     serial_pxa.c
     serial_s3c24x0.c
     serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
     usbtty.c
 
  You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
  /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
   * Clean driver and add xilinx constant from header file
   *
   * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
  #include <config.h>
  #include <common.h>
+#include <dm.h>
  #include <asm/io.h>
  #include <linux/compiler.h>
  #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
  #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
  #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
  #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
      unsigned int control;
  };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
  };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
  }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
      return in_be32(&regs->rx_fifo) & 0xff;
  }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

From docs
@return number of waiting characters, 0 for none, -ve on error

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.

Quoted 7 lines

Quoted 3 lines
The similar logix is used for input.
Is this logic wrong?
Be careful to return 1 if you don't know how many characters are waiting. It looks like you return 'in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA' which could be >1.

IP doesn't provide information how many chars is in FIFO. It can be 1 to 16.
No problem to return just 1 for more than 1 char in FIFO.
Is core working with that information?

Thanks,
Michal

Simon Glass

2015-12-18 02:40 UTC #6 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Hi Michal,

Quoted 220 lines · Michal Simek

Quoted 219 lines · Simon Glass

Hi Michal,

Quoted 215 lines · Michal Simek

Quoted 192 lines · Thomas Chou

Hi Michal,

Quoted 176 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

  arch/microblaze/Kconfig                            |   1 +
  configs/microblaze-generic_defconfig               |   2 +
  .../serial/xilinx_uartlite.txt                     |  13 ++
  doc/driver-model/serial-howto.txt                  |   1 -
  drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
  5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
      select SUPPORT_SPL
      select OF_CONTROL
      select DM
+    select DM_SERIAL
 
  endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
  CONFIG_MICROBLAZE=y
  CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
  CONFIG_TARGET_MICROBLAZE_GENERIC=y
  CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
  CONFIG_SPL=y
  CONFIG_SYS_PROMPT="U-Boot-mONStR> "
  CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

     serial_pxa.c
     serial_s3c24x0.c
     serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
     usbtty.c
 
  You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
  /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
   * Clean driver and add xilinx constant from header file
   *
   * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
  #include <config.h>
  #include <common.h>
+#include <dm.h>
  #include <asm/io.h>
  #include <linux/compiler.h>
  #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
  #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
  #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
  #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
      unsigned int control;
  };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
  };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
  }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
      return in_be32(&regs->rx_fifo) & 0xff;
  }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

From docs
@return number of waiting characters, 0 for none, -ve on error

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.

The similar logix is used for input.

Is this logic wrong?

Quoted 8 lines

Quoted 3 lines
Be careful to return 1 if you don't know how many characters are waiting. It looks like you return 'in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA' which could be >1.
IP doesn't provide information how many chars is in FIFO. It can be 1 to 16.
No problem to return just 1 for more than 1 char in FIFO.
Is core working with that information?

It has no effect right now, but in the future we might use it. If you know there is at least one character, it is safe to return 1.

I suppose the UART does not support reading a single byte?

Regards,
Simon

Michal Simek

author

2015-12-18 08:00 UTC #7 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Quoted 227 lines · Simon Glass

Hi Michal,

Quoted 224 lines · Michal Simek

Quoted 222 lines · Simon Glass

Hi Michal,

Quoted 209 lines · Michal Simek

Quoted 192 lines · Thomas Chou

Hi Michal,

Quoted 176 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

  arch/microblaze/Kconfig                            |   1 +
  configs/microblaze-generic_defconfig               |   2 +
  .../serial/xilinx_uartlite.txt                     |  13 ++
  doc/driver-model/serial-howto.txt                  |   1 -
  drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
  5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
      select SUPPORT_SPL
      select OF_CONTROL
      select DM
+    select DM_SERIAL
 
  endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
  CONFIG_MICROBLAZE=y
  CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
  CONFIG_TARGET_MICROBLAZE_GENERIC=y
  CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
  CONFIG_SPL=y
  CONFIG_SYS_PROMPT="U-Boot-mONStR> "
  CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

     serial_pxa.c
     serial_s3c24x0.c
     serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
     usbtty.c
 
  You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
  /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
   * Clean driver and add xilinx constant from header file
   *
   * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
  #include <config.h>
  #include <common.h>
+#include <dm.h>
  #include <asm/io.h>
  #include <linux/compiler.h>
  #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
  #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
  #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
  #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
      unsigned int control;
  };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
  };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
  }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
      return in_be32(&regs->rx_fifo) & 0xff;
  }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

  {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

From docs
@return number of waiting characters, 0 for none, -ve on error

Quoted 6 lines

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.
The similar logix is used for input.
Is this logic wrong?

Be careful to return 1 if you don't know how many characters are waiting. It looks like you return 'in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA' which could be >1.

Quoted 7 lines

Quoted 4 lines
IP doesn't provide information how many chars is in FIFO. It can be 1 to 16.
No problem to return just 1 for more than 1 char in FIFO.
Is core working with that information?
It has no effect right now, but in the future we might use it. If you know there is at least one character, it is safe to return 1.

ok.

Quoted 2 lines

I suppose the UART does not support reading a single byte?

Based on
http://www.xilinx.com/support/documentation/ip_documentation/axi_uartlite/v2_0/pg142-axi-uartlite.pdf

data bits can be 5-8. 8 is standard setting.
Regarding reading just single byte from IP. There shouldn't be any problem with reading just single byte from current version but the problem is that this is pretty old IP and IRC this is not supported in every IP version. Also there were LE/BE versions. That's why I think it is just safer to use 32bit read.

Thanks,
Michal

Thomas Chou

2015-12-17 23:35 UTC #8 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

In reply to Michal Simek

Hi Michal,

Quoted 207 lines · Michal Simek

Quoted 192 lines · Thomas Chou

Hi Michal,

Quoted 176 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

   arch/microblaze/Kconfig                            |   1 +
   configs/microblaze-generic_defconfig               |   2 +
   .../serial/xilinx_uartlite.txt                     |  13 ++
   doc/driver-model/serial-howto.txt                  |   1 -
   drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
   5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644 doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
       select SUPPORT_SPL
       select OF_CONTROL
       select DM
+    select DM_SERIAL
 
   endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
   CONFIG_MICROBLAZE=y
   CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
   CONFIG_TARGET_MICROBLAZE_GENERIC=y
   CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
   CONFIG_SPL=y
   CONFIG_SYS_PROMPT="U-Boot-mONStR> "
   CONFIG_CMD_GPIO=y
   # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
   CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

      serial_pxa.c
      serial_s3c24x0.c
      serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
      usbtty.c
 
   You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
   /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
    * Clean driver and add xilinx constant from header file
    *
    * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
   #include <config.h>
   #include <common.h>
+#include <dm.h>
   #include <asm/io.h>
   #include <linux/compiler.h>
   #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
   #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
   #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
   #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
       unsigned int control;
   };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
   };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
   {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
   }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
   {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
       return in_be32(&regs->rx_fifo) & 0xff;
   }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

   {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

Quoted 1 line

From docs

Quoted 9 lines

@return number of waiting characters, 0 for none, -ve on error
It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.
The similar logix is used for input.
Is this logic wrong?

+ return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Yes, the logic is wrong. Your code return non 0 if empty, and 0 if not empty.

BTW, you might want to convert the following macros to BIT() with a follow-up.

Quoted 4 lines

drivers/serial/serial_xuartlite.c line 23

Quoted 4 lines

drivers/serial/serial_xuartlite.c +1 -0

   #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
   #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
   #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

Best regards,
Thomas

Quoted 3 lines

Thanks,
Michal

Michal Simek

author

2015-12-18 07:52 UTC #9 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Quoted 219 lines · Thomas Chou

Hi Michal,

Quoted 216 lines · Michal Simek

Quoted 193 lines · Thomas Chou

Hi Michal,

Quoted 177 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

   arch/microblaze/Kconfig                            |   1 +
   configs/microblaze-generic_defconfig               |   2 +
   .../serial/xilinx_uartlite.txt                     |  13 ++
   doc/driver-model/serial-howto.txt                  |   1 -
   drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
   5 files changed, 78 insertions(+), 109 deletions(-)

create mode 100644
doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
       select SUPPORT_SPL
       select OF_CONTROL
       select DM
+    select DM_SERIAL
 
   endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
   CONFIG_MICROBLAZE=y
   CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
   CONFIG_TARGET_MICROBLAZE_GENERIC=y
   CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
   CONFIG_SPL=y
   CONFIG_SYS_PROMPT="U-Boot-mONStR> "
   CONFIG_CMD_GPIO=y
   # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
   CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

      serial_pxa.c
      serial_s3c24x0.c
      serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
      usbtty.c
 
   You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
   /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
    * Clean driver and add xilinx constant from header file
    *
    * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
   #include <config.h>
   #include <common.h>
+#include <dm.h>
   #include <asm/io.h>
   #include <linux/compiler.h>
   #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
   #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
   #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
   #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
       unsigned int control;
   };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
   };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
   {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
   }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
   {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
       return in_be32(&regs->rx_fifo) & 0xff;
   }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

   {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

Quoted 1 line

From docs

@return number of waiting characters, 0 for none, -ve on error

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.

The similar logix is used for input.

Quoted 7 lines

Quoted 2 lines
Is this logic wrong?
+ return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;
Yes, the logic is wrong. Your code return non 0 if empty, and 0 if not empty.

right.

return !in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Quoted 8 lines

BTW, you might want to convert the following macros to BIT() with a follow-up.
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
drivers/serial/serial_xuartlite.c +1 -0
   #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
   #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
   #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

NP with that.

Thanks,
Michal

Thomas Chou

2015-12-18 08:12 UTC #10 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Hi Michal,

Quoted 223 lines · Michal Simek

Quoted 222 lines · Thomas Chou

Hi Michal,

Quoted 218 lines · Michal Simek

Quoted 193 lines · Thomas Chou

Hi Michal,

Quoted 177 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

    arch/microblaze/Kconfig                            |   1 +
    configs/microblaze-generic_defconfig               |   2 +
    .../serial/xilinx_uartlite.txt                     |  13 ++
    doc/driver-model/serial-howto.txt                  |   1 -
    drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
    5 files changed, 78 insertions(+), 109 deletions(-)
    create mode 100644

doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
        select SUPPORT_SPL
        select OF_CONTROL
        select DM
+    select DM_SERIAL
 
    endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
    CONFIG_MICROBLAZE=y
    CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
    CONFIG_TARGET_MICROBLAZE_GENERIC=y
    CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
    CONFIG_SPL=y
    CONFIG_SYS_PROMPT="U-Boot-mONStR> "
    CONFIG_CMD_GPIO=y
    # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
    CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over the

remaining serial drivers:

       serial_pxa.c
       serial_s3c24x0.c
       serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
       usbtty.c
 
    You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
    /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
     * Clean driver and add xilinx constant from header file
     *
     * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
    #include <config.h>
    #include <common.h>
+#include <dm.h>
    #include <asm/io.h>
    #include <linux/compiler.h>
    #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
    #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
    #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
    #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
        unsigned int control;
    };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
    };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
    {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
    }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
    {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
        return in_be32(&regs->rx_fifo) & 0xff;
    }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

    {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

Quoted 1 line

From docs

@return number of waiting characters, 0 for none, -ve on error

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.

The similar logix is used for input.

Is this logic wrong?

Quoted 8 lines

Quoted 4 lines
+ return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;
Yes, the logic is wrong. Your code return non 0 if empty, and 0 if not empty.
right.
return !in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

As suggested by Simon, it might be better to return 1 when we don't know the count of pending.

if (input)

         return (in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA) ? 1 : 0;

return (in_be32(&regs->status) & SR_TX_FIFO_EMPTY) ? 0 : 1;

Quoted 6 lines

Quoted 6 lines
BTW, you might want to convert the following macros to BIT() with a follow-up.

Quoted 6 lines

Quoted 4 lines

drivers/serial/serial_xuartlite.c line 23

Quoted 4 lines

drivers/serial/serial_xuartlite.c +1 -0

    #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
    #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
    #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

NP with that.

Best regards,
Thomas

Michal Simek

author

2015-12-18 08:23 UTC #11 lore raw

PATCH v2 1/3 serial: uartlite: Move driver to DM

Quoted 235 lines · Thomas Chou

Hi Michal,

Quoted 232 lines · Michal Simek

Quoted 221 lines · Thomas Chou

Hi Michal,

Quoted 218 lines · Michal Simek

Quoted 194 lines · Thomas Chou

Hi Michal,

Quoted 178 lines · Michal Simek

Enable SPL DM too.

Signed-off-by Michal Simek <[email protected]>

---

    arch/microblaze/Kconfig                            |   1 +
    configs/microblaze-generic_defconfig               |   2 +
    .../serial/xilinx_uartlite.txt                     |  13 ++
    doc/driver-model/serial-howto.txt                  |   1 -
    drivers/serial/serial_xuartlite.c                  | 170
++++++++-------------
    5 files changed, 78 insertions(+), 109 deletions(-)
    create mode 100644

doc/device-tree-bindings/serial/xilinx_uartlite.txt

arch/microblaze/Kconfig +1 -0

index 604f6815af5b..30ea484f48aa 100644
@@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
        select SUPPORT_SPL
        select OF_CONTROL
        select DM
+    select DM_SERIAL
 
    endchoice

configs/microblaze-generic_defconfig +2 -0

index 54aa3ef3d26f..5df080b6a87c 100644
@@ -1,9 +1,11 @@
    CONFIG_MICROBLAZE=y
    CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
    CONFIG_TARGET_MICROBLAZE_GENERIC=y
    CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
    CONFIG_SPL=y
    CONFIG_SYS_PROMPT="U-Boot-mONStR> "
    CONFIG_CMD_GPIO=y
    # CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
    CONFIG_OF_EMBED=y

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +4 -0

new file mode 100644
index 000000000000..d15753c8c380
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or

"xlnx,opb-uartlite-1.00.b"

+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.

doc/device-tree-bindings/serial/xilinx_uartlite.txt new file +7 -0

+
+Example:
+    serial at 40600000 {
+        compatible = "xlnx,xps-uartlite-1.00.a";
+        interrupts = <1 0>;
+        reg = <0x40600000 0x10000>;
+    };

doc/driver-model/serial-howto.txt +0 -0

index 76ad629ef9cb..381a2a084562 100644
@@ -18,7 +18,6 @@ is time for maintainers to start converting over

the
remaining serial drivers:

       serial_pxa.c
       serial_s3c24x0.c
       serial_sa1100.c

doc/driver-model/serial-howto.txt +0 -1

-   serial_xuartlite.c
       usbtty.c
 
    You should complete this by the end of January 2016.

drivers/serial/serial_xuartlite.c +21 ~~-31~~

index 988438e75471..8225d9a320a5 100644
@@ -1,5 +1,5 @@
    /*
- * (C) Copyright 2008-2011 Michal Simek <[email protected]>
+ * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
     * Clean driver and add xilinx constant from header file
     *
     * (C) Copyright 2004 Atmark Techno, Inc.

@@ -10,11 +10,15 @@
 
    #include <config.h>
    #include <common.h>
+#include <dm.h>
    #include <asm/io.h>
    #include <linux/compiler.h>
    #include <serial.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
    #define SR_TX_FIFO_FULL        0x08 /* transmit FIFO full */
+#define SR_TX_FIFO_EMPTY    0x04 /* transmit FIFO empty */
    #define SR_RX_FIFO_VALID_DATA    0x01 /* data in receive FIFO */
    #define SR_RX_FIFO_FULL        0x02 /* receive FIFO full */

@@ -28,135 +32,85 @@ struct uartlite {
        unsigned int control;
    };
 
-static struct uartlite *userial_ports[4] = {
-#ifdef XILINX_UARTLITE_BASEADDR
-    [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR1
-    [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR2
-    [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
-#endif
-#ifdef XILINX_UARTLITE_BASEADDR3
-    [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
-#endif
+struct uartlite_platdata {
+    struct uartlite *regs;
    };
 
-static void uartlite_serial_putc(const char c, const int port)
+static int uartlite_serial_putc(struct udevice *dev, const char ch)
    {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    if (c == '\n')
-        uartlite_serial_putc('\r', port);
+    if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+        return -EAGAIN;
 
-    while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
-        ;
-    out_be32(&regs->tx_fifo, c & 0xff);
-}
+    out_be32(&regs->tx_fifo, ch & 0xff);
 
-static void uartlite_serial_puts(const char *s, const int port)
-{
-    while (*s)
-        uartlite_serial_putc(*s++, port);
+    return 0;
    }
 
-static int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(struct udevice *dev)
    {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
+
+    if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+        return -EAGAIN;
 
-    while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
-        ;
        return in_be32(&regs->rx_fifo) & 0xff;
    }
 
-static int uartlite_serial_tstc(const int port)
+static int uartlite_serial_pending(struct udevice *dev, bool input)

drivers/serial/serial_xuartlite.c struct uartlite { · line 71

Quoted 10 lines

drivers/serial/serial_xuartlite.c +6 -2

    {
-    struct uartlite *regs = userial_ports[port];
+    struct uartlite_platdata *plat = dev_get_platdata(dev);
+    struct uartlite *regs = plat->regs;
 
-    return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+    if (input)
+        return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+
+    return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;

Should be inversed.

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

And not for output.

Quoted 1 line

From docs

@return number of waiting characters, 0 for none, -ve on error

It means I do read status and mask it if tx fifo is empty or not. If it is empty I am returning 0, if it is not empty I do return non 0 value.

The similar logix is used for input.

Quoted 7 lines

Quoted 2 lines
Is this logic wrong?
+ return in_be32(&regs->status) & SR_TX_FIFO_EMPTY;
Yes, the logic is wrong. Your code return non 0 if empty, and 0 if not empty.

right.

Quoted 7 lines

Quoted 1 line
return !in_be32(&regs->status) & SR_TX_FIFO_EMPTY;
As suggested by Simon, it might be better to return 1 when we don't know the count of pending.
if (input)
        return (in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA) ? 1 : 0;

SR_RX_FIFO_VALID_DATA is 1 already that's why I haven't done this because it is not needed.

Quoted 2 lines

return (in_be32(&regs->status) & SR_TX_FIFO_EMPTY) ? 0 : 1;

And here FIFO_EMPTY is BIT(2)

It means this should also work.
return !(in_be32(&regs->status) & SR_TX_FIFO_EMPTY);

Thanks,
Michal

Michal Simek

author

2015-12-17 12:00 UTC #12 lore raw

PATCH v2 2/3 serial: uartlite: Add support for debug console

In reply to Michal Simek

Add support for debug console.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- Add needed header from the first patch
- Remove WATCHDOG_RESET call
- Extend commit description

 drivers/serial/Kconfig            |  7 +++++++
 drivers/serial/serial_xuartlite.c | 26 ++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

drivers/serial/Kconfig +7 -0

index 1fc287ee98ec..f1e221799b81 100644
@@ -92,6 +92,13 @@ config DEBUG_UART_S5P
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_UARTLITE
+	bool "Xilinx Uartlite"
+	help
+	  Select this to enable a debug UART using the serial_uartlite driver.
+	  You will need to provide parameters to make this work. The driver will
+	  be available until the real driver-model serial is running.
+
 config DEBUG_UART_ZYNQ
 	bool "Xilinx Zynq"
 	help

drivers/serial/serial_xuartlite.c +26 -0

index 8225d9a320a5..f42b11eae102 100644
@@ -114,3 +114,29 @@ U_BOOT_DRIVER(serial_uartlite) = {
 	.ops	= &uartlite_serial_ops,
 	.flags = DM_FLAG_PRE_RELOC,
 };
+
+#ifdef CONFIG_DEBUG_UART_UARTLITE
+
+#include <debug_uart.h>
+
+void _debug_uart_init(void)
+{
+	struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
+
+	out_be32(&regs->control, 0);
+	out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
+	in_be32(&regs->control);
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+	struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
+
+	while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+		;
+
+	out_be32(&regs->tx_fifo, ch & 0xff);
+}
+
+DEBUG_UART_FUNCS
+#endif

Signature · 1 line

1.9.1

Thomas Chou

2015-12-17 13:29 UTC #13 lore raw

PATCH v2 2/3 serial: uartlite: Add support for debug console

Hi Michal,

Quoted 37 lines · Michal Simek

Add support for debug console.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- Add needed header from the first patch
- Remove WATCHDOG_RESET call
- Extend commit description

  drivers/serial/Kconfig            |  7 +++++++
  drivers/serial/serial_xuartlite.c | 26 ++++++++++++++++++++++++++
  2 files changed, 33 insertions(+)

drivers/serial/Kconfig +7 -0

index 1fc287ee98ec..f1e221799b81 100644
@@ -92,6 +92,13 @@ config DEBUG_UART_S5P
  	  will need to provide parameters to make this work. The driver will
  	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_UARTLITE
+	bool "Xilinx Uartlite"
+	help
+	  Select this to enable a debug UART using the serial_uartlite driver.
+	  You will need to provide parameters to make this work. The driver will
+	  be available until the real driver-model serial is running.
+
  config DEBUG_UART_ZYNQ
  	bool "Xilinx Zynq"
  	help

drivers/serial/serial_xuartlite.c +0 -0

index 8225d9a320a5..f42b11eae102 100644

drivers/serial/serial_xuartlite.c U_BOOT_DRIVER(serial_uartlite) = { · line 122

Quoted 9 lines

drivers/serial/serial_xuartlite.c +6 -0

@@ -114,3 +114,29 @@ U_BOOT_DRIVER(serial_uartlite) = {
  	.ops	= &uartlite_serial_ops,
  	.flags = DM_FLAG_PRE_RELOC,
  };
+
+#ifdef CONFIG_DEBUG_UART_UARTLITE
+
+#include <debug_uart.h>
+
+void _debug_uart_init(void)

Still missing, static inline

Otherwise,

Reviewed-by Thomas Chou <[email protected]>

Quoted 11 lines

drivers/serial/serial_xuartlite.c +10 -0

+{
+	struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
+
+	out_be32(&regs->control, 0);
+	out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
+	in_be32(&regs->control);
+}
+
+static inline void _debug_uart_putc(int ch)
+{

drivers/serial/serial_xuartlite.c U_BOOT_DRIVER(serial_uartlite) = { · line 142

Quoted 10 lines

drivers/serial/serial_xuartlite.c +10 -0

+	struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
+
+	while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+		;
+
+	out_be32(&regs->tx_fifo, ch & 0xff);
+}
+
+DEBUG_UART_FUNCS
+#endif

Best regards,
Thomas

Michal Simek

author

2015-12-17 13:51 UTC #14 lore raw

PATCH v2 2/3 serial: uartlite: Add support for debug console

Quoted 56 lines · Thomas Chou

Hi Michal,
Quoted 41 lines · Michal Simek
Add support for debug console.
Signed-off-by Michal Simek <[email protected]>
---
Changes in v2:
- Add needed header from the first patch
- Remove WATCHDOG_RESET call
- Extend commit description
  drivers/serial/Kconfig            |  7 +++++++
  drivers/serial/serial_xuartlite.c | 26 ++++++++++++++++++++++++++
  2 files changed, 33 insertions(+)
drivers/serial/Kconfig +0 -0
index 1fc287ee98ec..f1e221799b81 100644
@@ -92,6 +92,13 @@ config DEBUG_UART_S5P
        will need to provide parameters to make this work. The driver
will
be available until the real driver-model serial is running.
drivers/serial/Kconfig +4 -0
+config DEBUG_UART_UARTLITE
+    bool "Xilinx Uartlite"
+    help
+      Select this to enable a debug UART using the serial_uartlite
driver.
+ You will need to provide parameters to make this work. The
driver will
drivers/serial/Kconfig +2 -0
+      be available until the real driver-model serial is running.
+
  config DEBUG_UART_ZYNQ
      bool "Xilinx Zynq"
      help
drivers/serial/serial_xuartlite.c +0 -0
index 8225d9a320a5..f42b11eae102 100644
drivers/serial/serial_xuartlite.c U_BOOT_DRIVER(serial_uartlite) = { · line 122
Quoted 9 lines
drivers/serial/serial_xuartlite.c +6 -0
@@ -114,3 +114,29 @@ U_BOOT_DRIVER(serial_uartlite) = {
      .ops    = &uartlite_serial_ops,
      .flags = DM_FLAG_PRE_RELOC,
  };
+
+#ifdef CONFIG_DEBUG_UART_UARTLITE
+
+#include <debug_uart.h>
+
+void _debug_uart_init(void)
Still missing, static inline

Quoted 2 lines

Otherwise,
Reviewed-by Thomas Chou <[email protected]>

I have sent separate patch for it and keep it here unchanged that's why it is not here.

I can send you like if you like but I think you will find it out.

Thanks,
Michal

Michal Simek

author

2015-12-17 12:00 UTC #15 lore raw

PATCH v2 3/3 serial: uartlite: Add uartlite to Kconfig

In reply to Michal Simek

- Move config option out of board file.
- Remove uartlite address from config file

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2: None

 board/xilinx/microblaze-generic/xparameters.h | 4 ----
 configs/microblaze-generic_defconfig          | 1 +
 drivers/serial/Kconfig                        | 7 +++++++
 include/configs/microblaze-generic.h          | 7 +------
 4 files changed, 9 insertions(+), 10 deletions(-)

board/xilinx/microblaze-generic/xparameters.h +0 -4

index 8ba146cb88db..11b3c9a4846e 100644
@@ -28,10 +28,6 @@
 #define XILINX_TIMER_BASEADDR	0x41c00000
 #define XILINX_TIMER_IRQ	0
 
-/* Uart pheriphery is RS232_Uart */
-#define XILINX_UARTLITE_BASEADDR	0x40600000
-#define XILINX_UARTLITE_BAUDRATE	115200
-
 /* IIC pheriphery is IIC_EEPROM */
 #define XILINX_IIC_0_BASEADDR	0x40800000
 #define XILINX_IIC_0_FREQ	100000

configs/microblaze-generic_defconfig +1 -0

index 5df080b6a87c..9a7bb915466f 100644
@@ -9,3 +9,4 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_EMBED=y
+CONFIG_XILINX_UARTLITE=y

drivers/serial/Kconfig +7 -0

index f1e221799b81..ddf49ba9cef3 100644
@@ -230,4 +230,11 @@ config UNIPHIER_SERIAL
 	  If you have a UniPhier based board and want to use the on-chip
 	  serial ports, say Y to this option. If unsure, say N.
 
+config XILINX_UARTLITE
+	bool "Xilinx Uarlite support"
+	depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+	help
+	  If you have a Xilinx based board and want to use the uartlite
+	  serial ports, say Y to this option. If unsure, say N.
+
 endmenu

include/configs/microblaze-generic.h +1 -6

index 10ac8328b8ff..6e3c80b14350 100644
@@ -37,10 +37,7 @@
 # define CONFIG_SYS_BAUDRATE_TABLE \
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
-#ifdef XILINX_UARTLITE_BASEADDR
-# define CONFIG_XILINX_UARTLITE
-# define CONFIG_SERIAL_BASE	XILINX_UARTLITE_BASEADDR
-#elif XILINX_UART16550_BASEADDR
+#if XILINX_UART16550_BASEADDR
 # define CONFIG_SYS_NS16550_SERIAL
 # if defined(__MICROBLAZEEL__)
 #  define CONFIG_SYS_NS16550_REG_SIZE	-4

@@ -51,8 +48,6 @@
 # define CONFIG_SYS_NS16550_COM1 \
 		((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
 # define CONFIG_SYS_NS16550_CLK	XILINX_UART16550_CLOCK_HZ
-#else
-# error Undefined uart
 #endif
 
 /* setting reset address */

Signature · 1 line

1.9.1

Thomas Chou

2015-12-17 13:32 UTC #16 lore raw

PATCH v2 3/3 serial: uartlite: Add uartlite to Kconfig

Hi Michal,

Quoted 72 lines · Michal Simek

- Move config option out of board file.
- Remove uartlite address from config file

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2: None

  board/xilinx/microblaze-generic/xparameters.h | 4 ----
  configs/microblaze-generic_defconfig          | 1 +
  drivers/serial/Kconfig                        | 7 +++++++
  include/configs/microblaze-generic.h          | 7 +------
  4 files changed, 9 insertions(+), 10 deletions(-)

board/xilinx/microblaze-generic/xparameters.h +0 -4

index 8ba146cb88db..11b3c9a4846e 100644
@@ -28,10 +28,6 @@
  #define XILINX_TIMER_BASEADDR	0x41c00000
  #define XILINX_TIMER_IRQ	0
 
-/* Uart pheriphery is RS232_Uart */
-#define XILINX_UARTLITE_BASEADDR	0x40600000
-#define XILINX_UARTLITE_BAUDRATE	115200
-
  /* IIC pheriphery is IIC_EEPROM */
  #define XILINX_IIC_0_BASEADDR	0x40800000
  #define XILINX_IIC_0_FREQ	100000

configs/microblaze-generic_defconfig +1 -0

index 5df080b6a87c..9a7bb915466f 100644
@@ -9,3 +9,4 @@ CONFIG_CMD_GPIO=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_EMBED=y
+CONFIG_XILINX_UARTLITE=y

drivers/serial/Kconfig +7 -0

index f1e221799b81..ddf49ba9cef3 100644
@@ -230,4 +230,11 @@ config UNIPHIER_SERIAL
  	  If you have a UniPhier based board and want to use the on-chip
  	  serial ports, say Y to this option. If unsure, say N.
 
+config XILINX_UARTLITE
+	bool "Xilinx Uarlite support"
+	depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+	help
+	  If you have a Xilinx based board and want to use the uartlite
+	  serial ports, say Y to this option. If unsure, say N.
+
  endmenu

include/configs/microblaze-generic.h +1 -4

index 10ac8328b8ff..6e3c80b14350 100644
@@ -37,10 +37,7 @@
  # define CONFIG_SYS_BAUDRATE_TABLE \
  	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
-#ifdef XILINX_UARTLITE_BASEADDR
-# define CONFIG_XILINX_UARTLITE
-# define CONFIG_SERIAL_BASE	XILINX_UARTLITE_BASEADDR
-#elif XILINX_UART16550_BASEADDR
+#if XILINX_UART16550_BASEADDR
  # define CONFIG_SYS_NS16550_SERIAL
  # if defined(__MICROBLAZEEL__)
  #  define CONFIG_SYS_NS16550_REG_SIZE	-4

include/configs/microblaze-generic.h line 53

Quoted 8 lines

include/configs/microblaze-generic.h +0 -2

@@ -51,8 +48,6 @@
  # define CONFIG_SYS_NS16550_COM1 \
  		((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
  # define CONFIG_SYS_NS16550_CLK	XILINX_UART16550_CLOCK_HZ
-#else
-# error Undefined uart
  #endif
 
  /* setting reset address */

Reviewed-by Thomas Chou <[email protected]>

Best regards,
Thomas