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ARM64: tegra: Add support for Google Pixel C

PATCH New Jon Hunter 4 participants 8 messages Jan 6, 2016 – Jan 7, 2016

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Jon Hunter

author maintainer
#0 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.

---
 arch/arm64/boot/dts/nvidia/Makefile           |  1 +
 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
arch/arm64/boot/dts/nvidia/Makefile +1 -0
index a7e865da1005..0f7cdf3e05c1 100644
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
+dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
 
 always		:= $(dtb-y)
 clean-files	:= *.dtb
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +42 -0

42 lines not on this page · raw message

Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Hi,

Quoted 28 lines · Jon Hunter

Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.

---
 arch/arm64/boot/dts/nvidia/Makefile           |  1 +
 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
arch/arm64/boot/dts/nvidia/Makefile +1 -0
index a7e865da1005..0f7cdf3e05c1 100644
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
+dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
 
 always		:= $(dtb-y)
 clean-files	:= *.dtb
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +0 -0
new file mode 100644
index 000000000000..a7474f5fcbcc

arch/arm64/boot/dts/nvidia/tegra210-smaug.dts line 10

Quoted 10 lines
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +10 -0
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+#include "tegra210.dtsi"
+
+/ {
+	model = "Google Pixel C";
+	compatible = "google,smaug-rev8", "google,smaug-rev7",
+		     "google,smaug-rev6", "google,smaug-rev5",
+		     "google,smaug-rev4", "google,smaug-rev3",
+		     "google,smaug-rev1", "google,smaug", "nvidia,tegra210";

This looks a little funky. Is each revision a strict superset of the previous version?

arch/arm64/boot/dts/nvidia/tegra210-smaug.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +4 -0
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
+	};

Use stdout-path.

Otherwise this looks ok.

Thanks,
Mark.

author maintainer
#2 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Quoted 36 lines · Mark Rutland

Hi,

Quoted 33 lines · Jon Hunter

Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.

---
 arch/arm64/boot/dts/nvidia/Makefile           |  1 +
 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
arch/arm64/boot/dts/nvidia/Makefile +1 -0
index a7e865da1005..0f7cdf3e05c1 100644
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-2180.dtb
 dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2571.dtb
+dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-smaug.dtb
 
 always		:= $(dtb-y)
 clean-files	:= *.dtb
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +5 -0
new file mode 100644
index 000000000000..a7474f5fcbcc
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+#include "tegra210.dtsi"
+
+/ {
Quoted 8 lines

arch/arm64/boot/dts/nvidia/tegra210-smaug.dts line 10

Quoted 5 lines
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +5 -0
+	model = "Google Pixel C";
+	compatible = "google,smaug-rev8", "google,smaug-rev7",
+		     "google,smaug-rev6", "google,smaug-rev5",
+		     "google,smaug-rev4", "google,smaug-rev3",
+		     "google,smaug-rev1", "google,smaug", "nvidia,tegra210";

This looks a little funky. Is each revision a strict superset of the previous version?

Yes this is based upon what Google have in the chromiumos branch [0] and I have checked with them and they were ok with this.

Olof, let me know if you have any more comments here.

Quoted 6 lines

arch/arm64/boot/dts/nvidia/tegra210-smaug.dts line 14

Quoted 4 lines
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts new file +4 -0
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
+	};

Use stdout-path.

Ok.

Quoted 1 line

Otherwise this looks ok.

Cheers
Jon

[0]
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.18/arch/arm64/boot/dts/tegra/tegra210-smaug-p1.dts

author maintainer
#3 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Quoted 13 lines · Jon Hunter
Quoted 12 lines · Mark Rutland

Hi,

Quoted 9 lines · Jon Hunter

Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.

---
 arch/arm64/boot/dts/nvidia/Makefile           |  1 +
 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 42 +++++++++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-smaug.dts

[snip]

Quoted 8 lines
Quoted 6 lines

Review

Quoted 4 lines
(quoted diff) +4 -0
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x70006000";
+	};

Use stdout-path.

Ok.

Adding Arnd.

Hmmm ... well apparently stdout-path does not work for tegra and in order to make this work I had to do the following ...

[PATCH] serial: 8250: of: Add earlycon support for Tegra

Currently, early console support only works for Tegra when the serial port information is passed via the earlycon boot parameter. If the serial port information is specified via device-tree using the "stdout-path" then the early console does not work because:

1. The tegra serial ports compatibility parameter does not match any of the supported serial drivers for early console.
2. The of_setup_earlycon() function assumes that serial port registers are byte aligned and for tegra they are 32-bit aligned.

Add an early console setup function for tegra so that the early console can be specified via the device-tree "stdout-path" variable.

---
 drivers/tty/serial/8250/8250_of.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
drivers/tty/serial/8250/8250_of.c +10 -0
index 33021c1f7d55..98adf83e83c2 100644
@@ -44,6 +44,16 @@ void tegra_serial_handle_break(struct uart_port *p)
 		udelay(1);
 	} while (1);
 }
+
+int __init tegra_earlycon_setup(struct earlycon_device *device,
+				const char *options)
+{
+	device->port.iotype = UPIO_MEM32;
+	device->port.regshift = 2;
+
+	return early_serial8250_setup(device, options);
+}
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart", tegra_earlycon_setup);
 #else
 static inline void tegra_serial_handle_break(struct uart_port *port)
 {

Arnd, does the above look ok, or should there be a generic early_serial8250x32_setup() somewhere?

Cheers
Jon

#4 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Quoted 50 lines · On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:

Adding Arnd.

Hmmm ... well apparently stdout-path does not work for tegra and in order to make this work I had to do the following ...

[PATCH] serial: 8250: of: Add earlycon support for Tegra

Currently, early console support only works for Tegra when the serial port information is passed via the earlycon boot parameter. If the serial port information is specified via device-tree using the "stdout-path" then the early console does not work because:

1. The tegra serial ports compatibility parameter does not match any of the supported serial drivers for early console.
2. The of_setup_earlycon() function assumes that serial port registers are byte aligned and for tegra they are 32-bit aligned.

Add an early console setup function for tegra so that the early console can be specified via the device-tree "stdout-path" variable.

---
 drivers/tty/serial/8250/8250_of.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
drivers/tty/serial/8250/8250_of.c +10 -0
index 33021c1f7d55..98adf83e83c2 100644
@@ -44,6 +44,16 @@ void tegra_serial_handle_break(struct uart_port *p)
                udelay(1);
        } while (1);
 }
+
+int __init tegra_earlycon_setup(struct earlycon_device *device,
+                               const char *options)
+{
+       device->port.iotype = UPIO_MEM32;
+       device->port.regshift = 2;
+
+       return early_serial8250_setup(device, options);
+}
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart", tegra_earlycon_setup);
 #else
 static inline void tegra_serial_handle_break(struct uart_port *port)
 {
Quoted 2 lines

Arnd, does the above look ok, or should there be a generic early_serial8250x32_setup() somewhere?

I think it would be better to put it into 8250_early.c rather than 8250_of.c, as there are already some other definitions in there, and the #ifdef CONFIG_TEGRA in 8250_of.c is for some other workaround.

Would it be possible to handle the "reg-io-width" parsing in early_serial8250_setup instead of keying it off the string?

Arnd

author maintainer
#5 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Quoted 51 lines · Arnd Bergmann
Quoted 50 lines · On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:

Adding Arnd.

Hmmm ... well apparently stdout-path does not work for tegra and in order to make this work I had to do the following ...

[PATCH] serial: 8250: of: Add earlycon support for Tegra

Currently, early console support only works for Tegra when the serial port information is passed via the earlycon boot parameter. If the serial port information is specified via device-tree using the "stdout-path" then the early console does not work because:

1. The tegra serial ports compatibility parameter does not match any of the supported serial drivers for early console.
2. The of_setup_earlycon() function assumes that serial port registers are byte aligned and for tegra they are 32-bit aligned.

Add an early console setup function for tegra so that the early console can be specified via the device-tree "stdout-path" variable.

---
 drivers/tty/serial/8250/8250_of.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
drivers/tty/serial/8250/8250_of.c +10 -0
index 33021c1f7d55..98adf83e83c2 100644
@@ -44,6 +44,16 @@ void tegra_serial_handle_break(struct uart_port *p)
                udelay(1);
        } while (1);
 }
+
+int __init tegra_earlycon_setup(struct earlycon_device *device,
+                               const char *options)
+{
+       device->port.iotype = UPIO_MEM32;
+       device->port.regshift = 2;
+
+       return early_serial8250_setup(device, options);
+}
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart", tegra_earlycon_setup);
 #else
 static inline void tegra_serial_handle_break(struct uart_port *port)
 {
Quoted 6 lines
Quoted 2 lines

Arnd, does the above look ok, or should there be a generic early_serial8250x32_setup() somewhere?

I think it would be better to put it into 8250_early.c rather than 8250_of.c, as there are already some other definitions in there, and the #ifdef CONFIG_TEGRA in 8250_of.c is for some other workaround.

Ok so something like this ...

(quoted diff) +0 -0

b/drivers/tty/serial/8250/8250_early.c
index af62131af21e..4ce6e2b57534 100644

drivers/tty/serial/8250/8250_early.c +0 -0
@@ -141,7 +141,18 @@ int __init early_serial8250_setup(struct

earlycon_device *device,

        device->con->write = early_serial8250_write;
        return 0;

}
+
+int __init early_serial8250_mem32_setup(struct earlycon_device *device,
+ const char *options)
+{
+ device->port.iotype = UPIO_MEM32;
+ device->port.regshift = 2;
+
+ return early_serial8250_setup(device, options);
+}
EARLYCON_DECLARE(uart8250, early_serial8250_setup); EARLYCON_DECLARE(uart, early_serial8250_setup); OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup); OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart",
+ early_serial8250_mem32_setup);

Quoted 2 lines

Would it be possible to handle the "reg-io-width" parsing in early_serial8250_setup instead of keying it off the string?

Good point. I spent a bit of time looking at this, but I cannot see an easy way to do this unless we check for "reg-io-width" and "reg-shift" in early_init_dt_scan_chosen_serial() and pass to of_setup_earlycon(), however, I am guessing that this would not be ideal as this would happen for non-8250 devices. May be that would be ok, but I am not sure.

Cheers
Jon

#6 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Quoted 3 lines · Jon Hunter
Quoted 1 line · Arnd Bergmann

On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:

[...]

Quoted 28 lines

Ok so something like this ...

drivers/tty/serial/8250/8250_early.c +11 -0
index af62131af21e..4ce6e2b57534 100644
@@ -141,7 +141,18 @@ int __init early_serial8250_setup(struct
 earlycon_device *device,
        device->con->write = early_serial8250_write;
        return 0;
 }
+
+int __init early_serial8250_mem32_setup(struct earlycon_device *device,
+                                       const char *options)
+{
+       device->port.iotype = UPIO_MEM32;
+       device->port.regshift = 2;
+
+       return early_serial8250_setup(device, options);
+}
 EARLYCON_DECLARE(uart8250, early_serial8250_setup);
 EARLYCON_DECLARE(uart, early_serial8250_setup);
 OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
 OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart",
+                   early_serial8250_mem32_setup);
Quoted 8 lines
Quoted 2 lines

Would it be possible to handle the "reg-io-width" parsing in early_serial8250_setup instead of keying it off the string?

Good point. I spent a bit of time looking at this, but I cannot see an easy way to do this unless we check for "reg-io-width" and "reg-shift" in early_init_dt_scan_chosen_serial() and pass to of_setup_earlycon(), however, I am guessing that this would not be ideal as this would happen for non-8250 devices. May be that would be ok, but I am not sure.

There's been one attempt[1] already. It had a few issues easily solved, but I haven't seen a follow-up.

Rob

[1] https://lkml.org/lkml/2015/11/30/513

author maintainer
#7 lore raw

PATCH 1/1 ARM64: tegra: Add support for Google Pixel C

Quoted 38 lines · Rob Herring
Quoted 3 lines · Jon Hunter
Quoted 1 line · Arnd Bergmann

On Thursday 07 January 2016 13:19:44 Jon Hunter wrote:

[...]

Quoted 31 lines

Ok so something like this ...

drivers/tty/serial/8250/8250_early.c +11 -0
index af62131af21e..4ce6e2b57534 100644
@@ -141,7 +141,18 @@ int __init early_serial8250_setup(struct
 earlycon_device *device,
        device->con->write = early_serial8250_write;
        return 0;
 }
+
+int __init early_serial8250_mem32_setup(struct earlycon_device *device,
+                                       const char *options)
+{
+       device->port.iotype = UPIO_MEM32;
+       device->port.regshift = 2;
+
+       return early_serial8250_setup(device, options);
+}
 EARLYCON_DECLARE(uart8250, early_serial8250_setup);
 EARLYCON_DECLARE(uart, early_serial8250_setup);
 OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
 OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
+OF_EARLYCON_DECLARE(tegra20_uart, "nvidia,tegra20-uart",
+                   early_serial8250_mem32_setup);
Quoted 3 lines

Would it be possible to handle the "reg-io-width" parsing in early_serial8250_setup instead of keying it off the string?

Quoted 8 lines
Quoted 5 lines

Good point. I spent a bit of time looking at this, but I cannot see an easy way to do this unless we check for "reg-io-width" and "reg-shift" in early_init_dt_scan_chosen_serial() and pass to of_setup_earlycon(), however, I am guessing that this would not be ideal as this would happen for non-8250 devices. May be that would be ok, but I am not sure.

There's been one attempt[1] already. It had a few issues easily solved, but I haven't seen a follow-up.

Thanks. Adding Paul.

Paul, are you planning a follow-up to your patch? Otherwise, I am happy to have crack at it. Don't we also need to read the "reg-shift"?

Cheers
Jon