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arm: ls1021atwr: Convert to use driver model TSEC driver

PATCH In review Bin Meng 6 participants 57 messages Jan 12, 2016 – Jan 29, 2016

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Bin Meng

author
#0 lore raw

cover arm: ls1021atwr: Convert to use driver model TSEC driver

This series adds driver model ethernet support to the Freescale TSEC ethernet driver and convert ls1021atwr board to use it.

Enable the support in the ls1021atwr_nor_defconfig and ls1021atwr_nor_lpuart_defconfig configurations.

Bin Meng (17):
powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
net: tsec: fsl_mdio: Fix several cosmetic issues
net: tsec: Move rx_idx and tx_idx to struct tsec_private
net: tsec: Move rxbd and txbd to struct tsec_private
net: tsec: Adjust orders to avoid forward declaration of tsec_send()
net: tsec: Use tsec_private pointer as the parameter for internal
routines
doc: dt-bindings: Describe Freescale TSEC ethernet controller
net: tsec: Add driver model ethernet support
net: tsec: Use priv->tbiaddr to initialize TBI PHY address
arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()
arm: ls1021atwr: Disable CONFIG_E1000 temporarily
arm: ls1021atwr: Convert to use driver model TSEC driver

 arch/arm/cpu/armv7/ls102xa/cpu.c              |   2 +-
 arch/arm/cpu/armv7/ls102xa/fdt.c              |  26 +-
 arch/arm/dts/ls1021a-twr.dts                  |  20 +
 arch/arm/dts/ls1021a.dtsi                     |  18 +-
 board/freescale/bsc9132qds/bsc9132qds.c       |   4 +-
 board/freescale/c29xpcie/c29xpcie.c           |   4 +-
 board/freescale/ls1021atwr/ls1021atwr.c       |   4 +-
 board/freescale/mpc8548cds/mpc8548cds.c       |   4 +-
 board/freescale/mpc8572ds/mpc8572ds.c         |   4 +-
 board/freescale/p1010rdb/p1010rdb.c           |   4 +-
 configs/ls1021atwr_nor_defconfig              |   3 +-
 configs/ls1021atwr_nor_lpuart_defconfig       |   3 +-
 doc/device-tree-bindings/net/fsl-tsec-phy.txt |  64 +++
 drivers/net/fsl_mdio.c                        |   4 +-
 drivers/net/tsec.c                            | 536 ++++++++++++++++++--------
 include/configs/ls1021atwr.h                  |   4 +
 include/fsl_mdio.h                            |   7 +-
 include/tsec.h                                |  69 ++--
 18 files changed, 546 insertions(+), 234 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/fsl-tsec-phy.txt
Signature · 1 line
1.8.2.1
author
#1 lore raw

PATCH 1/17 powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/bsc9132qds/bsc9132qds.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/bsc9132qds/bsc9132qds.c +2 -2
index 586dacc..71a7bb5 100644
@@ -227,9 +227,9 @@ int checkboard(void)
 	return 0;
 }
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	int num = 0;
@@ -250,6 +250,7 @@ int board_eth_init(bd_t *bis)
 
 	fsl_pq_mdio_init(bis, &mdio_info);
 	tsec_eth_init(bis, tsec_info, num);
+#endif
 
 	#ifdef CONFIG_PCI
 	pci_eth_init(bis);
@@ -257,7 +258,6 @@ int board_eth_init(bd_t *bis)
 
 	return 0;
 }
-#endif
 
 #define USBMUX_SEL_MASK		0xc0
 #define USBMUX_SEL_UART2	0xc0
Signature · 1 line
1.8.2.1
#2 lore raw

PATCH 1/17 powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

Hi Bin,

Quoted 24 lines · Bin Meng

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/bsc9132qds/bsc9132qds.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/bsc9132qds/bsc9132qds.c +1 -1
index 586dacc..71a7bb5 100644
@@ -227,9 +227,9 @@ int checkboard(void)
        return 0;
 }
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
        struct fsl_pq_mdio_info mdio_info;
        struct tsec_info_struct tsec_info[4];
        int num = 0;

board/freescale/bsc9132qds/bsc9132qds.c int board_eth_init(bd_t *bis) · line 256

Quoted 7 lines
board/freescale/bsc9132qds/bsc9132qds.c +1 -0
@@ -250,6 +250,7 @@ int board_eth_init(bd_t *bis)
 
        fsl_pq_mdio_init(bis, &mdio_info);
        tsec_eth_init(bis, tsec_info, num);
+#endif
 
        #ifdef CONFIG_PCI
        pci_eth_init(bis);

This is still needed even with what Stephen Warren and Simon Glass are discussing here, right?

If so...

Quoted 15 lines
board/freescale/bsc9132qds/bsc9132qds.c +0 -2
@@ -257,7 +258,6 @@ int board_eth_init(bd_t *bis)
 
        return 0;
 }
-#endif
 
 #define USBMUX_SEL_MASK                0xc0
 #define USBMUX_SEL_UART2       0xc0
--

1.8.2.1

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author
#4 lore raw

PATCH 2/17 powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

In reply to Bin Meng

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/c29xpcie/c29xpcie.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/c29xpcie/c29xpcie.c +2 -2
index f42d373..e325b4d 100644
@@ -83,9 +83,9 @@ void pci_init_board(void)
 }
 #endif /* ifdef CONFIG_PCI */
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[2];
 	int num = 0;
@@ -110,10 +110,10 @@ int board_eth_init(bd_t *bis)
 	fsl_pq_mdio_init(bis, &mdio_info);
 
 	tsec_eth_init(bis, tsec_info, num);
+#endif
 
 	return pci_eth_init(bis);
 }
-#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 void fdt_del_sec(void *blob, int offset)
Signature · 1 line
1.8.2.1
author
#7 lore raw

PATCH 3/17 powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

In reply to Bin Meng

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/mpc8572ds/mpc8572ds.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/mpc8572ds/mpc8572ds.c +2 -2
index 3f68cf4..ed6836a 100644
@@ -171,9 +171,9 @@ int board_early_init_r(void)
 	return 0;
 }
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	int num = 0;
@@ -226,10 +226,10 @@ int board_eth_init(bd_t *bis)
 	fsl_pq_mdio_init(bis, &mdio_info);
 
 	tsec_eth_init(bis, tsec_info, num);
+#endif
 
 	return pci_eth_init(bis);
 }
-#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, bd_t *bd)
Signature · 1 line
1.8.2.1
author
#10 lore raw

PATCH 4/17 powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

In reply to Bin Meng

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/mpc8548cds/mpc8548cds.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/mpc8548cds/mpc8548cds.c +2 -2
index ca9b43c..de76d36 100644
@@ -301,9 +301,9 @@ void configure_rgmii(void)
 	return;
 }
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	int num = 0;
@@ -345,10 +345,10 @@ int board_eth_init(bd_t *bis)
 
 	tsec_eth_init(bis, tsec_info, num);
 	configure_rgmii();
+#endif
 
 	return pci_eth_init(bis);
 }
-#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 void ft_pci_setup(void *blob, bd_t *bd)
Signature · 1 line
1.8.2.1
author
#13 lore raw

PATCH 5/17 powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

In reply to Bin Meng

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/p1010rdb/p1010rdb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/p1010rdb/p1010rdb.c +2 -2
index ebffe9a..1ae1540 100644
@@ -326,9 +326,9 @@ int checkboard(void)
 	return 0;
 }
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	struct cpu_type *cpu;
@@ -362,10 +362,10 @@ int board_eth_init(bd_t *bis)
 	fsl_pq_mdio_init(bis, &mdio_info);
 
 	tsec_eth_init(bis, tsec_info, num);
+#endif
 
 	return pci_eth_init(bis);
 }
-#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 void fdt_del_flexcan(void *blob)
Signature · 1 line
1.8.2.1
author
#16 lore raw

PATCH 6/17 arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

In reply to Bin Meng

The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

---

 board/freescale/ls1021atwr/ls1021atwr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/ls1021atwr/ls1021atwr.c +2 -2
index 8eaff5f..f82e567 100644
@@ -243,9 +243,9 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	int num = 0;
@@ -280,10 +280,10 @@ int board_eth_init(bd_t *bis)
 	fsl_pq_mdio_init(bis, &mdio_info);
 
 	tsec_eth_init(bis, tsec_info, num);
+#endif
 
 	return pci_eth_init(bis);
 }
-#endif
 
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 int config_serdes_mux(void)
Signature · 1 line
1.8.2.1
author
#19 lore raw

PATCH 7/17 net: tsec: fsl_mdio: Fix several cosmetic issues

In reply to Bin Meng

Clean up the tsec and fsl_mdio driver codes a little bit, by:
- Fix misuse of tab and space here and there
- Use correct multi-line comment format
- Replace license identifier to GPL-2.0+

---

 drivers/net/fsl_mdio.c |  4 ++--
 drivers/net/tsec.c     | 61 ++++++++++++++++++++++++++++----------------------
 include/fsl_mdio.h     |  7 +++---
 include/tsec.h         | 51 ++++++++++++++++++-----------------------
 4 files changed, 62 insertions(+), 61 deletions(-)
drivers/net/fsl_mdio.c +2 -2
index d6b181b..ae3d035 100644
@@ -5,6 +5,7 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #include <common.h>
 #include <miiphy.h>
 #include <phy.h>
@@ -32,8 +33,7 @@ int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr,
 	int value;
 	int timeout = 1000000;
 
-	/* Put the address of the phy, and the register
-	 * number into MIIMADD */
+	/* Put the address of the phy, and the register number into MIIMADD */
 	out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f));
 
 	/* Clear the command register, and wait */
drivers/net/tsec.c +34 -27

163 lines not on this page · raw message

include/fsl_mdio.h +4 -3
index 2137282..25678a9 100644
@@ -5,6 +5,7 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #ifndef __FSL_PHY_H__
 #define __FSL_PHY_H__
 
@@ -27,9 +28,9 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc);
 #define PHY_EXT_PAGE_ACCESS	0x1f
 
 /* MII Management Configuration Register */
-#define MIIMCFG_RESET_MGMT          0x80000000
-#define MIIMCFG_MGMT_CLOCK_SELECT   0x00000007
-#define MIIMCFG_INIT_VALUE	    0x00000003
+#define MIIMCFG_RESET_MGMT		0x80000000
+#define MIIMCFG_MGMT_CLOCK_SELECT	0x00000007
+#define MIIMCFG_INIT_VALUE		0x00000003
 
 /* MII Management Command Register */
 #define MIIMCOM_READ_CYCLE	0x00000001
include/tsec.h +22 -29

138 lines not on this page · raw message

Signature · 1 line
1.8.2.1
author
#22 lore raw

PATCH 8/17 net: tsec: Move rx_idx and tx_idx to struct tsec_private

In reply to Bin Meng

At present rx_idx and tx_idx are declared as static variables in the driver codes. To support multiple interfaces, move it to struct tsec_private.

---

 drivers/net/tsec.c | 54 ++++++++++++++++++++++++++----------------------------
 include/tsec.h     |  2 ++
 2 files changed, 28 insertions(+), 28 deletions(-)
drivers/net/tsec.c +26 -28
index 4aeb387..943c4b3 100644
@@ -23,9 +23,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define TX_BUF_CNT		2
 
-static uint rx_idx;		/* index of the current RX buffer */
-static uint tx_idx;		/* index of the current TX buffer */
-
 #ifdef __GNUC__
 static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8);
 static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8);
@@ -280,22 +277,23 @@ void redundant_init(struct eth_device *dev)
 		tsec_send(dev, (void *)pkt, sizeof(pkt));
 
 		/* Wait for buffer to be received */
-		for (t = 0; in_be16(&rxbd[rx_idx].status) & RXBD_EMPTY; t++) {
+		for (t = 0; in_be16(&rxbd[priv->rx_idx].status) & RXBD_EMPTY;
+		     t++) {
 			if (t >= 10 * TOUT_LOOP) {
 				printf("%s: tsec: rx error\n", dev->name);
 				break;
 			}
 		}
 
-		if (!memcmp(pkt, (void *)net_rx_packets[rx_idx], sizeof(pkt)))
+		if (!memcmp(pkt, net_rx_packets[priv->rx_idx], sizeof(pkt)))
 			fail = 0;
 
-		out_be16(&rxbd[rx_idx].length, 0);
+		out_be16(&rxbd[priv->rx_idx].length, 0);
 		status = RXBD_EMPTY;
-		if ((rx_idx + 1) == PKTBUFSRX)
+		if ((priv->rx_idx + 1) == PKTBUFSRX)
 			status |= RXBD_WRAP;
-		out_be16(&rxbd[rx_idx].status, status);
-		rx_idx = (rx_idx + 1) % PKTBUFSRX;
+		out_be16(&rxbd[priv->rx_idx].status, status);
+		priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
 
 		if (in_be32(&regs->ievent) & IEVENT_BSY) {
 			out_be32(&regs->ievent, IEVENT_BSY);
@@ -330,8 +328,8 @@ static void startup_tsec(struct eth_device *dev)
 	int i;
 
 	/* reset the indices to zero */
-	rx_idx = 0;
-	tx_idx = 0;
+	priv->rx_idx = 0;
+	priv->tx_idx = 0;
 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
 	uint svr;
 #endif
@@ -388,32 +386,32 @@ static int tsec_send(struct eth_device *dev, void *packet, int length)
 	int i;
 
 	/* Find an empty buffer descriptor */
-	for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) {
+	for (i = 0; in_be16(&txbd[priv->tx_idx].status) & TXBD_READY; i++) {
 		if (i >= TOUT_LOOP) {
 			debug("%s: tsec: tx buffers full\n", dev->name);
 			return result;
 		}
 	}
 
-	out_be32(&txbd[tx_idx].bufptr, (u32)packet);
-	out_be16(&txbd[tx_idx].length, length);
-	status = in_be16(&txbd[tx_idx].status);
-	out_be16(&txbd[tx_idx].status, status |
+	out_be32(&txbd[priv->tx_idx].bufptr, (u32)packet);
+	out_be16(&txbd[priv->tx_idx].length, length);
+	status = in_be16(&txbd[priv->tx_idx].status);
+	out_be16(&txbd[priv->tx_idx].status, status |
 		(TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT));
 
 	/* Tell the DMA to go */
 	out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
 
 	/* Wait for buffer to be transmitted */
-	for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) {
+	for (i = 0; in_be16(&txbd[priv->tx_idx].status) & TXBD_READY; i++) {
 		if (i >= TOUT_LOOP) {
 			debug("%s: tsec: tx error\n", dev->name);
 			return result;
 		}
 	}
 
-	tx_idx = (tx_idx + 1) % TX_BUF_CNT;
-	result = in_be16(&txbd[tx_idx].status) & TXBD_STATS;
+	priv->tx_idx = (priv->tx_idx + 1) % TX_BUF_CNT;
+	result = in_be16(&txbd[priv->tx_idx].status) & TXBD_STATS;
 
 	return result;
 }
@@ -423,26 +421,26 @@ static int tsec_recv(struct eth_device *dev)
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct tsec __iomem *regs = priv->regs;
 
-	while (!(in_be16(&rxbd[rx_idx].status) & RXBD_EMPTY)) {
-		int length = in_be16(&rxbd[rx_idx].length);
-		uint16_t status = in_be16(&rxbd[rx_idx].status);
+	while (!(in_be16(&rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
+		int length = in_be16(&rxbd[priv->rx_idx].length);
+		uint16_t status = in_be16(&rxbd[priv->rx_idx].status);
+		uchar *packet = net_rx_packets[priv->rx_idx];
 
 		/* Send the packet up if there were no errors */
 		if (!(status & RXBD_STATS))
-			net_process_received_packet(net_rx_packets[rx_idx],
-						    length - 4);
+			net_process_received_packet(packet, length - 4);
 		else
 			printf("Got error %x\n", (status & RXBD_STATS));
 
-		out_be16(&rxbd[rx_idx].length, 0);
+		out_be16(&rxbd[priv->rx_idx].length, 0);
 
 		status = RXBD_EMPTY;
 		/* Set the wrap bit if this is the last element in the list */
-		if ((rx_idx + 1) == PKTBUFSRX)
+		if ((priv->rx_idx + 1) == PKTBUFSRX)
 			status |= RXBD_WRAP;
-		out_be16(&rxbd[rx_idx].status, status);
+		out_be16(&rxbd[priv->rx_idx].status, status);
 
-		rx_idx = (rx_idx + 1) % PKTBUFSRX;
+		priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
 	}
 
 	if (in_be32(&regs->ievent) & IEVENT_BSY) {
include/tsec.h +2 -0
index f2aa11a..023f095 100644
@@ -396,6 +396,8 @@ struct tsec_private {
 	uint phyaddr;
 	char mii_devname[16];
 	u32 flags;
+	uint rx_idx;	/* index of the current RX buffer */
+	uint tx_idx;	/* index of the current TX buffer */
 };
 
 struct tsec_info_struct {
Signature · 1 line
1.8.2.1
author
#25 lore raw

PATCH 9/17 net: tsec: Move rxbd and txbd to struct tsec_private

In reply to Bin Meng

rxbd and txbd are declared static with 8 byte alignment requirement, but they can be put into struct tsec_private as well and are natually aligned to 8 byte.

---

 drivers/net/tsec.c | 69 +++++++++++++++++++++++++-----------------------------
 include/tsec.h     |  4 ++++
 2 files changed, 36 insertions(+), 37 deletions(-)
drivers/net/tsec.c +32 -37
index 943c4b3..9a3b1a9 100644
@@ -21,16 +21,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define TX_BUF_CNT		2
-
-#ifdef __GNUC__
-static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8);
-static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8);
-
-#else
-#error "rtx must be 64-bit aligned"
-#endif
-
 static int tsec_send(struct eth_device *dev, void *packet, int length);
 
 /* Default initializations for TSEC controllers. */
@@ -277,7 +267,8 @@ void redundant_init(struct eth_device *dev)
 		tsec_send(dev, (void *)pkt, sizeof(pkt));
 
 		/* Wait for buffer to be received */
-		for (t = 0; in_be16(&rxbd[priv->rx_idx].status) & RXBD_EMPTY;
+		for (t = 0;
+		     in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY;
 		     t++) {
 			if (t >= 10 * TOUT_LOOP) {
 				printf("%s: tsec: rx error\n", dev->name);
@@ -288,11 +279,11 @@ void redundant_init(struct eth_device *dev)
 		if (!memcmp(pkt, net_rx_packets[priv->rx_idx], sizeof(pkt)))
 			fail = 0;
 
-		out_be16(&rxbd[priv->rx_idx].length, 0);
+		out_be16(&priv->rxbd[priv->rx_idx].length, 0);
 		status = RXBD_EMPTY;
 		if ((priv->rx_idx + 1) == PKTBUFSRX)
 			status |= RXBD_WRAP;
-		out_be16(&rxbd[priv->rx_idx].status, status);
+		out_be16(&priv->rxbd[priv->rx_idx].status, status);
 		priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
 
 		if (in_be32(&regs->ievent) & IEVENT_BSY) {
@@ -335,26 +326,26 @@ static void startup_tsec(struct eth_device *dev)
 #endif
 
 	/* Point to the buffer descriptors */
-	out_be32(&regs->tbase, (u32)&txbd[0]);
-	out_be32(&regs->rbase, (u32)&rxbd[0]);
+	out_be32(&regs->tbase, (u32)&priv->txbd[0]);
+	out_be32(&regs->rbase, (u32)&priv->rxbd[0]);
 
 	/* Initialize the Rx Buffer descriptors */
 	for (i = 0; i < PKTBUFSRX; i++) {
-		out_be16(&rxbd[i].status, RXBD_EMPTY);
-		out_be16(&rxbd[i].length, 0);
-		out_be32(&rxbd[i].bufptr, (u32)net_rx_packets[i]);
+		out_be16(&priv->rxbd[i].status, RXBD_EMPTY);
+		out_be16(&priv->rxbd[i].length, 0);
+		out_be32(&priv->rxbd[i].bufptr, (u32)net_rx_packets[i]);
 	}
-	status = in_be16(&rxbd[PKTBUFSRX - 1].status);
-	out_be16(&rxbd[PKTBUFSRX - 1].status, status | RXBD_WRAP);
+	status = in_be16(&priv->rxbd[PKTBUFSRX - 1].status);
+	out_be16(&priv->rxbd[PKTBUFSRX - 1].status, status | RXBD_WRAP);
 
 	/* Initialize the TX Buffer Descriptors */
 	for (i = 0; i < TX_BUF_CNT; i++) {
-		out_be16(&txbd[i].status, 0);
-		out_be16(&txbd[i].length, 0);
-		out_be32(&txbd[i].bufptr, 0);
+		out_be16(&priv->txbd[i].status, 0);
+		out_be16(&priv->txbd[i].length, 0);
+		out_be32(&priv->txbd[i].bufptr, 0);
 	}
-	status = in_be16(&txbd[TX_BUF_CNT - 1].status);
-	out_be16(&txbd[TX_BUF_CNT - 1].status, status | TXBD_WRAP);
+	status = in_be16(&priv->txbd[TX_BUF_CNT - 1].status);
+	out_be16(&priv->txbd[TX_BUF_CNT - 1].status, status | TXBD_WRAP);
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
 	svr = get_svr();
@@ -386,24 +377,28 @@ static int tsec_send(struct eth_device *dev, void *packet, int length)
 	int i;
 
 	/* Find an empty buffer descriptor */
-	for (i = 0; in_be16(&txbd[priv->tx_idx].status) & TXBD_READY; i++) {
+	for (i = 0;
+	     in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
+	     i++) {
 		if (i >= TOUT_LOOP) {
 			debug("%s: tsec: tx buffers full\n", dev->name);
 			return result;
 		}
 	}
 
-	out_be32(&txbd[priv->tx_idx].bufptr, (u32)packet);
-	out_be16(&txbd[priv->tx_idx].length, length);
-	status = in_be16(&txbd[priv->tx_idx].status);
-	out_be16(&txbd[priv->tx_idx].status, status |
+	out_be32(&priv->txbd[priv->tx_idx].bufptr, (u32)packet);
+	out_be16(&priv->txbd[priv->tx_idx].length, length);
+	status = in_be16(&priv->txbd[priv->tx_idx].status);
+	out_be16(&priv->txbd[priv->tx_idx].status, status |
 		(TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT));
 
 	/* Tell the DMA to go */
 	out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
 
 	/* Wait for buffer to be transmitted */
-	for (i = 0; in_be16(&txbd[priv->tx_idx].status) & TXBD_READY; i++) {
+	for (i = 0;
+	     in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
+	     i++) {
 		if (i >= TOUT_LOOP) {
 			debug("%s: tsec: tx error\n", dev->name);
 			return result;
@@ -411,7 +406,7 @@ static int tsec_send(struct eth_device *dev, void *packet, int length)
 	}
 
 	priv->tx_idx = (priv->tx_idx + 1) % TX_BUF_CNT;
-	result = in_be16(&txbd[priv->tx_idx].status) & TXBD_STATS;
+	result = in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_STATS;
 
 	return result;
 }
@@ -421,9 +416,9 @@ static int tsec_recv(struct eth_device *dev)
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct tsec __iomem *regs = priv->regs;
 
-	while (!(in_be16(&rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
-		int length = in_be16(&rxbd[priv->rx_idx].length);
-		uint16_t status = in_be16(&rxbd[priv->rx_idx].status);
+	while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
+		int length = in_be16(&priv->rxbd[priv->rx_idx].length);
+		uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
 		uchar *packet = net_rx_packets[priv->rx_idx];
 
 		/* Send the packet up if there were no errors */
@@ -432,13 +427,13 @@ static int tsec_recv(struct eth_device *dev)
 		else
 			printf("Got error %x\n", (status & RXBD_STATS));
 
-		out_be16(&rxbd[priv->rx_idx].length, 0);
+		out_be16(&priv->rxbd[priv->rx_idx].length, 0);
 
 		status = RXBD_EMPTY;
 		/* Set the wrap bit if this is the last element in the list */
 		if ((priv->rx_idx + 1) == PKTBUFSRX)
 			status |= RXBD_WRAP;
-		out_be16(&rxbd[priv->rx_idx].status, status);
+		out_be16(&priv->rxbd[priv->rx_idx].status, status);
 
 		priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
 	}
include/tsec.h +4 -0
index 023f095..7200229 100644
@@ -387,7 +387,11 @@ struct tsec {
 #define TSEC_REDUCED	(1 << 1)	/* MAC-PHY interface uses RGMII */
 #define TSEC_SGMII	(1 << 2)	/* MAC-PHY interface uses SGMII */
 
+#define TX_BUF_CNT	2
+
 struct tsec_private {
+	struct txbd8 __iomem txbd[TX_BUF_CNT];
+	struct rxbd8 __iomem rxbd[PKTBUFSRX];
 	struct tsec __iomem *regs;
 	struct tsec_mii_mng __iomem *phyregs_sgmii;
 	struct phy_device *phydev;
Signature · 1 line
1.8.2.1
author
#28 lore raw

PATCH 10/17 net: tsec: Adjust orders to avoid forward declaration of tsec_send()

In reply to Bin Meng

Adjust static functions in a proper order so that forward declaration of tsec_send() can be avoided.

---

 drivers/net/tsec.c | 208 ++++++++++++++++++++++++++---------------------------
 1 file changed, 103 insertions(+), 105 deletions(-)
drivers/net/tsec.c +103 -105
index 9a3b1a9..ea2363e 100644
@@ -21,8 +21,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int tsec_send(struct eth_device *dev, void *packet, int length);
-
 /* Default initializations for TSEC controllers. */
 
 static struct tsec_info_struct tsec_info[] = {
@@ -221,6 +219,109 @@ static void adjust_link(struct tsec_private *priv, struct phy_device *phydev)
 			(phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
 }
 
+/*
+ * This returns the status bits of the device. The return value
+ * is never checked, and this is what the 8260 driver did, so we
+ * do the same. Presumably, this would be zero if there were no
+ * errors
+ */
+static int tsec_send(struct eth_device *dev, void *packet, int length)
+{
+	struct tsec_private *priv = (struct tsec_private *)dev->priv;
+	struct tsec __iomem *regs = priv->regs;
+	uint16_t status;
+	int result = 0;
+	int i;
+
+	/* Find an empty buffer descriptor */
+	for (i = 0;
+	     in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
+	     i++) {
+		if (i >= TOUT_LOOP) {
+			debug("%s: tsec: tx buffers full\n", dev->name);
+			return result;
+		}
+	}
+
+	out_be32(&priv->txbd[priv->tx_idx].bufptr, (u32)packet);
+	out_be16(&priv->txbd[priv->tx_idx].length, length);
+	status = in_be16(&priv->txbd[priv->tx_idx].status);
+	out_be16(&priv->txbd[priv->tx_idx].status, status |
+		(TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT));
+
+	/* Tell the DMA to go */
+	out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
+
+	/* Wait for buffer to be transmitted */
+	for (i = 0;
+	     in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
+	     i++) {
+		if (i >= TOUT_LOOP) {
+			debug("%s: tsec: tx error\n", dev->name);
+			return result;
+		}
+	}
+
+	priv->tx_idx = (priv->tx_idx + 1) % TX_BUF_CNT;
+	result = in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_STATS;
+
+	return result;
+}
+
+static int tsec_recv(struct eth_device *dev)
+{
+	struct tsec_private *priv = (struct tsec_private *)dev->priv;
+	struct tsec __iomem *regs = priv->regs;
+
+	while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
+		int length = in_be16(&priv->rxbd[priv->rx_idx].length);
+		uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
+		uchar *packet = net_rx_packets[priv->rx_idx];
+
+		/* Send the packet up if there were no errors */
+		if (!(status & RXBD_STATS))
+			net_process_received_packet(packet, length - 4);
+		else
+			printf("Got error %x\n", (status & RXBD_STATS));
+
+		out_be16(&priv->rxbd[priv->rx_idx].length, 0);
+
+		status = RXBD_EMPTY;
+		/* Set the wrap bit if this is the last element in the list */
+		if ((priv->rx_idx + 1) == PKTBUFSRX)
+			status |= RXBD_WRAP;
+		out_be16(&priv->rxbd[priv->rx_idx].status, status);
+
+		priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
+	}
+
+	if (in_be32(&regs->ievent) & IEVENT_BSY) {
+		out_be32(&regs->ievent, IEVENT_BSY);
+		out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
+	}
+
+	return -1;
+}
+
+/* Stop the interface */
+static void tsec_halt(struct eth_device *dev)
+{
+	struct tsec_private *priv = (struct tsec_private *)dev->priv;
+	struct tsec __iomem *regs = priv->regs;
+
+	clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
+	setbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
+
+	while ((in_be32(&regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC))
+			!= (IEVENT_GRSC | IEVENT_GTSC))
+		;
+
+	clrbits_be32(&regs->maccfg1, MACCFG1_TX_EN | MACCFG1_RX_EN);
+
+	/* Shut down the PHY, as needed */
+	phy_shutdown(priv->phydev);
+}
+
 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
 /*
  * When MACCFG1[Rx_EN] is enabled during system boot as part
@@ -363,109 +464,6 @@ static void startup_tsec(struct eth_device *dev)
 }
 
 /*
- * This returns the status bits of the device. The return value
- * is never checked, and this is what the 8260 driver did, so we
- * do the same. Presumably, this would be zero if there were no
- * errors
- */
-static int tsec_send(struct eth_device *dev, void *packet, int length)
-{
-	struct tsec_private *priv = (struct tsec_private *)dev->priv;
-	struct tsec __iomem *regs = priv->regs;
-	uint16_t status;
-	int result = 0;
-	int i;
-
-	/* Find an empty buffer descriptor */
-	for (i = 0;
-	     in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
-	     i++) {
-		if (i >= TOUT_LOOP) {
-			debug("%s: tsec: tx buffers full\n", dev->name);
-			return result;
-		}
-	}
-
-	out_be32(&priv->txbd[priv->tx_idx].bufptr, (u32)packet);
-	out_be16(&priv->txbd[priv->tx_idx].length, length);
-	status = in_be16(&priv->txbd[priv->tx_idx].status);
-	out_be16(&priv->txbd[priv->tx_idx].status, status |
-		(TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT));
-
-	/* Tell the DMA to go */
-	out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
-
-	/* Wait for buffer to be transmitted */
-	for (i = 0;
-	     in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
-	     i++) {
-		if (i >= TOUT_LOOP) {
-			debug("%s: tsec: tx error\n", dev->name);
-			return result;
-		}
-	}
-
-	priv->tx_idx = (priv->tx_idx + 1) % TX_BUF_CNT;
-	result = in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_STATS;
-
-	return result;
-}
-
-static int tsec_recv(struct eth_device *dev)
-{
-	struct tsec_private *priv = (struct tsec_private *)dev->priv;
-	struct tsec __iomem *regs = priv->regs;
-
-	while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
-		int length = in_be16(&priv->rxbd[priv->rx_idx].length);
-		uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
-		uchar *packet = net_rx_packets[priv->rx_idx];
-
-		/* Send the packet up if there were no errors */
-		if (!(status & RXBD_STATS))
-			net_process_received_packet(packet, length - 4);
-		else
-			printf("Got error %x\n", (status & RXBD_STATS));
-
-		out_be16(&priv->rxbd[priv->rx_idx].length, 0);
-
-		status = RXBD_EMPTY;
-		/* Set the wrap bit if this is the last element in the list */
-		if ((priv->rx_idx + 1) == PKTBUFSRX)
-			status |= RXBD_WRAP;
-		out_be16(&priv->rxbd[priv->rx_idx].status, status);
-
-		priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
-	}
-
-	if (in_be32(&regs->ievent) & IEVENT_BSY) {
-		out_be32(&regs->ievent, IEVENT_BSY);
-		out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
-	}
-
-	return -1;
-}
-
-/* Stop the interface */
-static void tsec_halt(struct eth_device *dev)
-{
-	struct tsec_private *priv = (struct tsec_private *)dev->priv;
-	struct tsec __iomem *regs = priv->regs;
-
-	clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
-	setbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
-
-	while ((in_be32(&regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC))
-			!= (IEVENT_GRSC | IEVENT_GTSC))
-		;
-
-	clrbits_be32(&regs->maccfg1, MACCFG1_TX_EN | MACCFG1_RX_EN);
-
-	/* Shut down the PHY, as needed */
-	phy_shutdown(priv->phydev);
-}
-
-/*
  * Initializes data structures and registers for the controller,
  * and brings the interface up. Returns the link status, meaning
  * that it returns success if the link is up, failure otherwise.
Signature · 1 line
1.8.2.1
author
#31 lore raw

PATCH 11/17 net: tsec: Use tsec_private pointer as the parameter for internal routines

In reply to Bin Meng

For internal routines like redundant_init(), startup_tsec() and init_phy(), change to use tsec_private pointer as the parameter.

---

 drivers/net/tsec.c | 23 +++++++++++------------
 include/tsec.h     |  1 +
 2 files changed, 12 insertions(+), 12 deletions(-)
drivers/net/tsec.c +11 -12
index ea2363e..7e8bc68 100644
@@ -328,9 +328,8 @@ static void tsec_halt(struct eth_device *dev)
  * of the eTSEC port initialization sequence,
  * the eTSEC Rx logic may not be properly initialized.
  */
-void redundant_init(struct eth_device *dev)
+void redundant_init(struct tsec_private *priv)
 {
-	struct tsec_private *priv = dev->priv;
 	struct tsec __iomem *regs = priv->regs;
 	uint t, count = 0;
 	int fail = 1;
@@ -365,14 +364,14 @@ void redundant_init(struct eth_device *dev)
 
 	do {
 		uint16_t status;
-		tsec_send(dev, (void *)pkt, sizeof(pkt));
+		tsec_send(priv->dev, (void *)pkt, sizeof(pkt));
 
 		/* Wait for buffer to be received */
 		for (t = 0;
 		     in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY;
 		     t++) {
 			if (t >= 10 * TOUT_LOOP) {
-				printf("%s: tsec: rx error\n", dev->name);
+				printf("%s: tsec: rx error\n", priv->dev->name);
 				break;
 			}
 		}
@@ -412,9 +411,8 @@ void redundant_init(struct eth_device *dev)
  * Set up the buffers and their descriptors, and bring up the
  * interface
  */
-static void startup_tsec(struct eth_device *dev)
+static void startup_tsec(struct tsec_private *priv)
 {
-	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct tsec __iomem *regs = priv->regs;
 	uint16_t status;
 	int i;
@@ -451,7 +449,7 @@ static void startup_tsec(struct eth_device *dev)
 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
 	svr = get_svr();
 	if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0))
-		redundant_init(dev);
+		redundant_init(priv);
 #endif
 	/* Enable Transmit and Receive */
 	setbits_be32(&regs->maccfg1, MACCFG1_RX_EN | MACCFG1_TX_EN);
@@ -504,7 +502,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
 	init_registers(regs);
 
 	/* Ready the device for tx/rx */
-	startup_tsec(dev);
+	startup_tsec(priv);
 
 	/* Start up the PHY */
 	ret = phy_startup(priv->phydev);
@@ -567,9 +565,8 @@ static phy_interface_t tsec_get_interface(struct tsec_private *priv)
  * properly.  If the PHY is not recognized, then return 0
  * (failure).  Otherwise, return 1
  */
-static int init_phy(struct eth_device *dev)
+static int init_phy(struct tsec_private *priv)
 {
-	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct phy_device *phydev;
 	struct tsec __iomem *regs = priv->regs;
 	u32 supported = (SUPPORTED_10baseT_Half |
@@ -588,7 +585,8 @@ static int init_phy(struct eth_device *dev)
 	if (priv->interface == PHY_INTERFACE_MODE_SGMII)
 		tsec_configure_serdes(priv);
 
-	phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface);
+	phydev = phy_connect(priv->bus, priv->phyaddr, priv->dev,
+			     priv->interface);
 	if (!phydev)
 		return 0;
 
@@ -633,6 +631,7 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info)
 	sprintf(dev->name, tsec_info->devname);
 	priv->interface = tsec_info->interface;
 	priv->bus = miiphy_get_dev_by_name(tsec_info->mii_devname);
+	priv->dev = dev;
 	dev->iobase = 0;
 	dev->priv = priv;
 	dev->init = tsec_init;
@@ -655,7 +654,7 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info)
 	clrbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
 
 	/* Try to initialize PHY here, and return */
-	return init_phy(dev);
+	return init_phy(priv);
 }
 
 /*
include/tsec.h +1 -0
index 7200229..e8b03d6 100644
@@ -402,6 +402,7 @@ struct tsec_private {
 	u32 flags;
 	uint rx_idx;	/* index of the current RX buffer */
 	uint tx_idx;	/* index of the current TX buffer */
+	struct eth_device *dev;
 };
 
 struct tsec_info_struct {
Signature · 1 line
1.8.2.1
author
#34 lore raw

PATCH 12/17 doc: dt-bindings: Describe Freescale TSEC ethernet controller

In reply to Bin Meng

Adapted from the same file name in the kernel device tree bindings documentation, to use with U-Boot.

---

 doc/device-tree-bindings/net/fsl-tsec-phy.txt | 43 +++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 doc/device-tree-bindings/net/fsl-tsec-phy.txt
doc/device-tree-bindings/net/fsl-tsec-phy.txt new file +43 -0
new file mode 100644
index 0000000..dbe91aa
@@ -0,0 +1,43 @@
+* TSEC-compatible ethernet nodes
+
+Properties:
+
+  - compatible : Should be "fsl,tsec"
+  - reg : Offset and length of the register set for the device
+  - phy-handle : See ethernet.txt file in the same directory.
+  - phy-connection-type : See ethernet.txt file in the same directory. This
+    property is only really needed if the connection is of type "rgmii-id",
+    "rgmii-rxid" and "rgmii-txid" as all other connection types are detected
+    by hardware.
+
+Example:
+	ethernet at 24000 {
+		compatible = "fsl,tsec";
+		reg = <0x24000 0x1000>;
+		phy-handle = <&phy0>;
+		phy-connection-type = "sgmii";
+	};
+
+Child nodes of the TSEC controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+
+* MDIO IO device
+
+The MDIO is a bus to which the PHY devices are connected.  For each
+device that exists on this bus, a PHY node should be created.
+
+Required properties:
+  - compatible : Should define the compatible device type for the
+    mdio. Currently supported string/device is "fsl,tsec-mdio".
+  - reg : Offset and length of the register set for the device
+
+Example:
+
+	mdio at 24520 {
+		compatible = "fsl,tsec-mdio";
+		reg = <0x24520 0x20>;
+
+		ethernet-phy at 0 {
+			reg = <0>;
+		};
+	};
Signature · 1 line
1.8.2.1
author
#37 lore raw

PATCH 13/17 net: tsec: Add driver model ethernet support

In reply to Bin Meng

This adds driver model support to Freescale TSEC ethernet driver.

---

 drivers/net/tsec.c | 186 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/tsec.h     |  10 +++
 2 files changed, 196 insertions(+)
drivers/net/tsec.c +186 -0
index 7e8bc68..18b44f6 100644
@@ -10,6 +10,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <dm.h>
 #include <malloc.h>
 #include <net.h>
 #include <command.h>
@@ -21,6 +22,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_DM_ETH
 /* Default initializations for TSEC controllers. */
 
 static struct tsec_info_struct tsec_info[] = {
@@ -46,6 +48,7 @@ static struct tsec_info_struct tsec_info[] = {
 	STD_TSEC_INFO(4),	/* TSEC4 */
 #endif
 };
+#endif /* CONFIG_DM_ETH */
 
 #define TBIANA_SETTINGS ( \
 		TBIANA_ASYMMETRIC_PAUSE \
@@ -98,7 +101,11 @@ static void tsec_configure_serdes(struct tsec_private *priv)
  * for PowerPC (tm) is usually the case) in the register holds
  * the entry.
  */
+#ifndef CONFIG_DM_ETH
 static int tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set)
+#else
+static int tsec_mcast_addr(struct udevice *dev, const u8 *mcast_mac, int set)
+#endif
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct tsec __iomem *regs = priv->regs;
@@ -225,7 +232,11 @@ static void adjust_link(struct tsec_private *priv, struct phy_device *phydev)
  * do the same. Presumably, this would be zero if there were no
  * errors
  */
+#ifndef CONFIG_DM_ETH
 static int tsec_send(struct eth_device *dev, void *packet, int length)
+#else
+static int tsec_send(struct udevice *dev, void *packet, int length)
+#endif
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct tsec __iomem *regs = priv->regs;
@@ -268,6 +279,7 @@ static int tsec_send(struct eth_device *dev, void *packet, int length)
 	return result;
 }
 
+#ifndef CONFIG_DM_ETH
 static int tsec_recv(struct eth_device *dev)
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
@@ -302,9 +314,61 @@ static int tsec_recv(struct eth_device *dev)
 
 	return -1;
 }
+#else
+static int tsec_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+	struct tsec_private *priv = (struct tsec_private *)dev->priv;
+	struct tsec __iomem *regs = priv->regs;
+	int ret = -1;
+
+	if (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
+		int length = in_be16(&priv->rxbd[priv->rx_idx].length);
+		uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
+		uint32_t buf;
+
+		/* Send the packet up if there were no errors */
+		if (!(status & RXBD_STATS)) {
+			buf = in_be32(&priv->rxbd[priv->rx_idx].bufptr);
+			*packetp = (uchar *)buf;
+			ret = length - 4;
+		} else {
+			printf("Got error %x\n", (status & RXBD_STATS));
+		}
+	}
+
+	if (in_be32(&regs->ievent) & IEVENT_BSY) {
+		out_be32(&regs->ievent, IEVENT_BSY);
+		out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
+	}
+
+	return ret;
+}
+
+static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+	struct tsec_private *priv = (struct tsec_private *)dev->priv;
+	uint16_t status;
+
+	out_be16(&priv->rxbd[priv->rx_idx].length, 0);
+
+	status = RXBD_EMPTY;
+	/* Set the wrap bit if this is the last element in the list */
+	if ((priv->rx_idx + 1) == PKTBUFSRX)
+		status |= RXBD_WRAP;
+	out_be16(&priv->rxbd[priv->rx_idx].status, status);
+
+	priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX;
+
+	return 0;
+}
+#endif
 
 /* Stop the interface */
+#ifndef CONFIG_DM_ETH
 static void tsec_halt(struct eth_device *dev)
+#else
+static void tsec_halt(struct udevice *dev)
+#endif
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct tsec __iomem *regs = priv->regs;
@@ -467,9 +531,16 @@ static void startup_tsec(struct tsec_private *priv)
  * that it returns success if the link is up, failure otherwise.
  * This allows U-Boot to find the first active controller.
  */
+#ifndef CONFIG_DM_ETH
 static int tsec_init(struct eth_device *dev, bd_t * bd)
+#else
+static int tsec_init(struct udevice *dev)
+#endif
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
+#ifdef CONFIG_DM_ETH
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+#endif
 	struct tsec __iomem *regs = priv->regs;
 	u32 tempval;
 	int ret;
@@ -489,12 +560,21 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
 	 * order (BE), MACnADDR1 is set to 0xCDAB7856 and
 	 * MACnADDR2 is set to 0x34120000.
 	 */
+#ifndef CONFIG_DM_ETH
 	tempval = (dev->enetaddr[5] << 24) | (dev->enetaddr[4] << 16) |
 		  (dev->enetaddr[3] << 8)  |  dev->enetaddr[2];
+#else
+	tempval = (pdata->enetaddr[5] << 24) | (pdata->enetaddr[4] << 16) |
+		  (pdata->enetaddr[3] << 8)  |  pdata->enetaddr[2];
+#endif
 
 	out_be32(&regs->macstnaddr1, tempval);
 
+#ifndef CONFIG_DM_ETH
 	tempval = (dev->enetaddr[1] << 24) | (dev->enetaddr[0] << 16);
+#else
+	tempval = (pdata->enetaddr[1] << 24) | (pdata->enetaddr[0] << 16);
+#endif
 
 	out_be32(&regs->macstnaddr2, tempval);
 
@@ -600,6 +680,7 @@ static int init_phy(struct tsec_private *priv)
 	return 1;
 }
 
+#ifndef CONFIG_DM_ETH
 /*
  * Initialize device structure. Returns success if PHY
  * initialization succeeded (i.e. if it recognizes the PHY)
@@ -687,3 +768,108 @@ int tsec_standard_init(bd_t *bis)
 
 	return tsec_eth_init(bis, tsec_info, ARRAY_SIZE(tsec_info));
 }
+#else /* CONFIG_DM_ETH */
+int tsec_probe(struct udevice *dev)
+{
+	struct tsec_private *priv = dev_get_priv(dev);
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct fsl_pq_mdio_info mdio_info;
+	int offset = 0;
+	int reg;
+	const char *phy_mode;
+	int ret;
+
+	pdata->iobase = (phys_addr_t)dev_get_addr(dev);
+	priv->regs = (struct tsec *)pdata->iobase;
+
+	offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,
+				       "phy-handle");
+	if (offset > 0) {
+		reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
+		priv->phyaddr = reg;
+	} else {
+		debug("phy-handle does not exist under tsec %s\n", dev->name);
+		return -ENOENT;
+	}
+
+	offset = fdt_parent_offset(gd->fdt_blob, offset);
+	if (offset > 0) {
+		reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
+		priv->phyregs_sgmii = (struct tsec_mii_mng *)(reg + 0x520);
+	} else {
+		debug("No parent node for PHY?\n");
+		return -ENOENT;
+	}
+
+	phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset,
+			       "phy-connection-type", NULL);
+	if (phy_mode)
+		pdata->phy_interface = phy_get_interface_by_name(phy_mode);
+	if (pdata->phy_interface == -1) {
+		debug("Invalid PHY interface '%s'\n", phy_mode);
+		return -EINVAL;
+	}
+	priv->interface = pdata->phy_interface;
+
+	/* Initialize flags */
+	priv->flags = TSEC_GIGABIT;
+	if (priv->interface == PHY_INTERFACE_MODE_SGMII)
+		priv->flags |= TSEC_SGMII;
+
+	mdio_info.regs = priv->phyregs_sgmii;
+	mdio_info.name = (char *)dev->name;
+	ret = fsl_pq_mdio_init(NULL, &mdio_info);
+	if (ret)
+		return ret;
+
+	/* Reset the MAC */
+	setbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
+	udelay(2);  /* Soft Reset must be asserted for 3 TX clocks */
+	clrbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
+
+	priv->dev = dev;
+	priv->bus = miiphy_get_dev_by_name(dev->name);
+
+	/* Try to initialize PHY here, and return */
+	return !init_phy(priv);
+}
+
+int tsec_remove(struct udevice *dev)
+{
+	struct tsec_private *priv = dev->priv;
+
+	free(priv->phydev);
+	mdio_unregister(priv->bus);
+	mdio_free(priv->bus);
+
+	return 0;
+}
+
+static const struct eth_ops tsec_ops = {
+	.start = tsec_init,
+	.send = tsec_send,
+	.recv = tsec_recv,
+	.free_pkt = tsec_free_pkt,
+	.stop = tsec_halt,
+#ifdef CONFIG_MCAST_TFTP
+	.mcast = tsec_mcast_addr,
+#endif
+};
+
+static const struct udevice_id tsec_ids[] = {
+	{ .compatible = "fsl,tsec" },
+	{ }
+};
+
+U_BOOT_DRIVER(eth_tsec) = {
+	.name = "tsec",
+	.id = UCLASS_ETH,
+	.of_match = tsec_ids,
+	.probe = tsec_probe,
+	.remove = tsec_remove,
+	.ops = &tsec_ops,
+	.priv_auto_alloc_size = sizeof(struct tsec_private),
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif /* CONFIG_DM_ETH */
include/tsec.h +10 -0
index e8b03d6..88ce964 100644
@@ -18,6 +18,8 @@
 #include <config.h>
 #include <phy.h>
 
+#ifndef CONFIG_DM_ETH
+
 #ifdef CONFIG_LS102XA
 #define TSEC_SIZE		0x40000
 #define TSEC_MDIO_OFFSET	0x40000
@@ -64,6 +66,8 @@
 	x.mii_devname = DEFAULT_MII_NAME;\
 }
 
+#endif /* CONFIG_DM_ETH */
+
 #define MAC_ADDR_LEN		6
 
 /* #define TSEC_TIMEOUT	1000000 */
@@ -402,7 +406,11 @@ struct tsec_private {
 	u32 flags;
 	uint rx_idx;	/* index of the current RX buffer */
 	uint tx_idx;	/* index of the current TX buffer */
+#ifndef CONFIG_DM_ETH
 	struct eth_device *dev;
+#else
+	struct udevice *dev;
+#endif
 };
 
 struct tsec_info_struct {
@@ -415,7 +423,9 @@ struct tsec_info_struct {
 	u32 flags;
 };
 
+#ifndef CONFIG_DM_ETH
 int tsec_standard_init(bd_t *bis);
 int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsec_info, int num);
+#endif
 
 #endif /* __TSEC_H */
Signature · 1 line
1.8.2.1
#38 lore raw

PATCH 13/17 net: tsec: Add driver model ethernet support

Quoted 8 lines · Bin Meng

This adds driver model support to Freescale TSEC ethernet driver.

---

 drivers/net/tsec.c | 186 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/tsec.h     |  10 +++
 2 files changed, 196 insertions(+)
author
#41 lore raw

PATCH 14/17 net: tsec: Use priv->tbiaddr to initialize TBI PHY address

In reply to Bin Meng

Add a new member 'tbiaddr' to tsec_private struct. For non-DM driver, it is initialized as CONFIG_SYS_TBIPA_VALUE, but for DM driver, we can get this from device tree. Update the bindings doc as well.

---

 doc/device-tree-bindings/net/fsl-tsec-phy.txt | 21 +++++++++++++++++++++
 drivers/net/tsec.c                            | 13 ++++++++++++-
 include/tsec.h                                |  1 +
 3 files changed, 34 insertions(+), 1 deletion(-)
doc/device-tree-bindings/net/fsl-tsec-phy.txt +21 -0
index dbe91aa..c5bf48c 100644
@@ -41,3 +41,24 @@ Example:
 			reg = <0>;
 		};
 	};
+
+* TBI Internal MDIO bus
+
+As of this writing, every tsec is associated with an internal TBI PHY.
+This PHY is accessed through the local MDIO bus.  These buses are defined
+similarly to the mdio buses.  The TBI PHYs underneath them are similar to
+normal PHYs, but the reg property is considered instructive, rather than
+descriptive.  The reg property should be chosen so it doesn't interfere
+with other PHYs on the bus.  The TBI PHYs are referred to by a "tbi-handle"
+property under the tsec node, which has a similar meaning of "phy-handle".
+
+Example:
+	ethernet at 24000 {
+		phy-handle = <&tbi1>;
+	};
+
+	mdio at 24520 {
+		tbi1: tbi-phy at 1f {
+			reg = <0x1f>;
+		};
+	};
drivers/net/tsec.c +12 -1
index 18b44f6..025e7a7 100644
@@ -658,7 +658,7 @@ static int init_phy(struct tsec_private *priv)
 		supported |= SUPPORTED_1000baseT_Full;
 
 	/* Assign a Physical address to the TBI */
-	out_be32(&regs->tbipa, CONFIG_SYS_TBIPA_VALUE);
+	out_be32(&regs->tbipa, priv->tbiaddr);
 
 	priv->interface = tsec_get_interface(priv);
 
@@ -707,6 +707,7 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info)
 	priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
 
 	priv->phyaddr = tsec_info->phyaddr;
+	priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE;
 	priv->flags = tsec_info->flags;
 
 	sprintf(dev->name, tsec_info->devname);
@@ -801,6 +802,16 @@ int tsec_probe(struct udevice *dev)
 		return -ENOENT;
 	}
 
+	offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,
+				       "tbi-handle");
+	if (offset > 0) {
+		reg = fdtdec_get_int(gd->fdt_blob, offset, "reg",
+				     CONFIG_SYS_TBIPA_VALUE);
+		priv->tbiaddr = reg;
+	} else {
+		priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE;
+	}
+
 	phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset,
 			       "phy-connection-type", NULL);
 	if (phy_mode)
include/tsec.h +1 -0
index 88ce964..fb27edf 100644
@@ -402,6 +402,7 @@ struct tsec_private {
 	phy_interface_t interface;
 	struct mii_dev *bus;
 	uint phyaddr;
+	uint tbiaddr;
 	char mii_devname[16];
 	u32 flags;
 	uint rx_idx;	/* index of the current RX buffer */
Signature · 1 line
1.8.2.1
author
#44 lore raw

PATCH 15/17 arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()

In reply to Bin Meng

eth_get_dev_by_index() is an API which is not available in driver model. Use eth_get_dev_by_name() instead, which can also simplifly the code logic a little bit.

---

 arch/arm/cpu/armv7/ls102xa/fdt.c | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)
arch/arm/cpu/armv7/ls102xa/fdt.c +6 -10
index 856abed..ae5e794 100644
@@ -30,17 +30,13 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
 	int phy_node;
 	int i = 0;
 	uint32_t ph;
+	char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
 
-	while ((dev = eth_get_dev_by_index(i++)) != NULL) {
-		if (strstr(dev->name, "eTSEC1")) {
-			strcpy(enet, "ethernet0");
-			strcpy(phy, "enet0_rgmii_phy");
-		} else if (strstr(dev->name, "eTSEC2")) {
-			strcpy(enet, "ethernet1");
-			strcpy(phy, "enet1_rgmii_phy");
-		} else if (strstr(dev->name, "eTSEC3")) {
-			strcpy(enet, "ethernet2");
-			strcpy(phy, "enet2_rgmii_phy");
+	for (; i < ARRAY_SIZE(name); i++) {
+		dev = eth_get_dev_by_name(name[i]);
+		if (dev) {
+			sprintf(enet, "ethernet%d", i);
+			sprintf(phy, "enet%d_rgmii_phy", i);
 		} else {
 			continue;
 		}
Signature · 1 line
1.8.2.1
author
#47 lore raw

PATCH 16/17 arm: ls1021atwr: Disable CONFIG_E1000 temporarily

In reply to Bin Meng

Before we switch to use driver model ethernet support, disable CONFIG_E1000 temporarily as with driver model ethernet, E1000 driver depends on driver model PCI which is not ready on this board yet.

---

 configs/ls1021atwr_nor_defconfig        | 1 -
 configs/ls1021atwr_nor_lpuart_defconfig | 1 -
 2 files changed, 2 deletions(-)
configs/ls1021atwr_nor_defconfig +0 -1
index 2b79443..ddda0b8 100644
@@ -6,5 +6,4 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr"
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_NETDEVICES=y
-CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
configs/ls1021atwr_nor_lpuart_defconfig +0 -1
index 5346359..3564736 100644
@@ -7,5 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="LPUART"
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_NETDEVICES=y
-CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
Signature · 1 line
1.8.2.1
#48 lore raw

PATCH 16/17 arm: ls1021atwr: Disable CONFIG_E1000 temporarily

Quoted 5 lines · Bin Meng

Before we switch to use driver model ethernet support, disable CONFIG_E1000 temporarily as with driver model ethernet, E1000 driver depends on driver model PCI which is not ready on this board yet.

Any idea when PCI/E1000 can be enabled?

York

author
#49 lore raw

PATCH 16/17 arm: ls1021atwr: Disable CONFIG_E1000 temporarily

Hi York,

Quoted 11 lines · York Sun
Quoted 5 lines · Bin Meng

Before we switch to use driver model ethernet support, disable CONFIG_E1000 temporarily as with driver model ethernet, E1000 driver depends on driver model PCI which is not ready on this board yet.

Any idea when PCI/E1000 can be enabled?

Next on my todo list is to convert layerscape pcie to driver model. But I suspect we should consolidate that driver with imx pcie driver first.

Regards,
Bin

#50 lore raw

PATCH 16/17 arm: ls1021atwr: Disable CONFIG_E1000 temporarily

Quoted 12 lines · Bin Meng

Hi York,

Quoted 9 lines · York Sun
Quoted 5 lines · Bin Meng

Before we switch to use driver model ethernet support, disable CONFIG_E1000 temporarily as with driver model ethernet, E1000 driver depends on driver model PCI which is not ready on this board yet.

Quoted 7 lines
Quoted 2 lines

Any idea when PCI/E1000 can be enabled?

Next on my todo list is to convert layerscape pcie to driver model. But I suspect we should consolidate that driver with imx pcie driver first.

The dilemma here is we heavily depend on the PCIe/e1000 for remote boards in our boardfarms. Once this patch is merged, we will lose network under u-boot. The network interfaces of LS1 itself are used for benchmark and other purpose. We surely can reconfigure the boards but that impacts all the auto scripts.

I would prefer to have PCIe/e1000 working first.

York

author
#51 lore raw

PATCH 16/17 arm: ls1021atwr: Disable CONFIG_E1000 temporarily

Hi York,

Quoted 21 lines · york sun
Quoted 12 lines · Bin Meng

Hi York,

Quoted 9 lines · York Sun
Quoted 5 lines · Bin Meng

Before we switch to use driver model ethernet support, disable CONFIG_E1000 temporarily as with driver model ethernet, E1000 driver depends on driver model PCI which is not ready on this board yet.

Quoted 7 lines
Quoted 2 lines

Any idea when PCI/E1000 can be enabled?

Next on my todo list is to convert layerscape pcie to driver model. But I suspect we should consolidate that driver with imx pcie driver first.

Quoted 7 lines

The dilemma here is we heavily depend on the PCIe/e1000 for remote boards in our boardfarms. Once this patch is merged, we will lose network under u-boot. The network interfaces of LS1 itself are used for benchmark and other purpose. We surely can reconfigure the boards but that impacts all the auto scripts.

I would prefer to have PCIe/e1000 working first.

OK, will include PCIe DM conversion in v2.

Regards,
Bin

author
#52 lore raw

PATCH 17/17 arm: ls1021atwr: Convert to use driver model TSEC driver

In reply to Bin Meng

Now that we have added driver model support to the TSEC driver, convert ls1021atwr board to use it.

This depends on previous DM series for ls1021atwr:
http://patchwork.ozlabs.org/patch/561855/

---

 arch/arm/cpu/armv7/ls102xa/cpu.c        |  2 +-
 arch/arm/cpu/armv7/ls102xa/fdt.c        | 10 ++++++++++
 arch/arm/dts/ls1021a-twr.dts            | 20 ++++++++++++++++++++
 arch/arm/dts/ls1021a.dtsi               | 18 ++++++++++++++++--
 board/freescale/ls1021atwr/ls1021atwr.c |  2 +-
 configs/ls1021atwr_nor_defconfig        |  2 +-
 configs/ls1021atwr_nor_lpuart_defconfig |  2 +-
 include/configs/ls1021atwr.h            |  4 ++++
 8 files changed, 54 insertions(+), 6 deletions(-)
arch/arm/cpu/armv7/ls102xa/cpu.c +1 -1
index 2f0df65..ee6b5ea 100644
@@ -297,7 +297,7 @@ int cpu_mmc_init(bd_t *bis)
 
 int cpu_eth_init(bd_t *bis)
 {
-#ifdef CONFIG_TSEC_ENET
+#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
 	tsec_standard_init(bis);
 #endif
 
arch/arm/cpu/armv7/ls102xa/fdt.c +10 -0
index ae5e794..0a4944e 100644
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
@@ -22,7 +23,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void ft_fixup_enet_phy_connect_type(void *fdt)
 {
+#ifndef CONFIG_DM_ETH
 	struct eth_device *dev;
+#else
+	struct udevice *dev;
+#endif
 	struct tsec_private *priv;
 	const char *enet_path, *phy_path;
 	char enet[16];
@@ -30,7 +35,12 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
 	int phy_node;
 	int i = 0;
 	uint32_t ph;
+#ifndef CONFIG_DM_ETH
 	char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
+#else
+	char *name[3] = { "ethernet at 2d10000", "ethernet at 2d50000",
+			  "ethernet at 2d90000" };
+#endif
 
 	for (; i < ARRAY_SIZE(name); i++) {
 		dev = eth_get_dev_by_name(name[i]);
arch/arm/dts/ls1021a-twr.dts +20 -0
index deabb12..2bfeb14 100644
@@ -57,6 +57,26 @@
 	};
 };
 
+&enet0 {
+	tbi-handle = <&tbi1>;
+	phy-handle = <&sgmii_phy2>;
+	phy-connection-type = "sgmii";
+	status = "okay";
+};
+
+&enet1 {
+	tbi-handle = <&tbi1>;
+	phy-handle = <&sgmii_phy0>;
+	phy-connection-type = "sgmii";
+	status = "okay";
+};
+
+&enet2 {
+	phy-handle = <&rgmii_phy1>;
+	phy-connection-type = "rgmii-id";
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 };
arch/arm/dts/ls1021a.dtsi +16 -2
index ee0e554..2ecb345 100644
@@ -352,13 +352,27 @@
 		};
 
 		mdio0: mdio at 2d24000 {
-			compatible = "gianfar";
-			device_type = "mdio";
+			compatible = "fsl,tsec-mdio";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x2d24000 0x4000>;
 		};
 
+		enet0: ethernet at 2d10000 {
+			compatible = "fsl,tsec";
+			reg = <0x2d10000 0x1000>;
+		};
+
+		enet1: ethernet at 2d50000 {
+			compatible = "fsl,tsec";
+			reg = <0x2d50000 0x1000>;
+		};
+
+		enet2: ethernet at 2d90000 {
+			compatible = "fsl,tsec";
+			reg = <0x2d90000 0x1000>;
+		};
+
 		usb at 8600000 {
 			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
 			reg = <0x8600000 0x1000>;
board/freescale/ls1021atwr/ls1021atwr.c +1 -1
index f82e567..d4d0cb9 100644
@@ -245,7 +245,7 @@ int board_mmc_init(bd_t *bis)
 
 int board_eth_init(bd_t *bis)
 {
-#ifdef CONFIG_TSEC_ENET
+#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	int num = 0;
configs/ls1021atwr_nor_defconfig +1 -1
index ddda0b8..1c8d2c1 100644
@@ -5,5 +5,5 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr"
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
-CONFIG_NETDEVICES=y
+CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
configs/ls1021atwr_nor_lpuart_defconfig +1 -1
index 3564736..aec5bf3 100644
@@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="LPUART"
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
-CONFIG_NETDEVICES=y
+CONFIG_DM_ETH=y
 CONFIG_FSL_LPUART=y
include/configs/ls1021atwr.h +4 -0
index 317ba62..d30050e 100644
@@ -348,6 +348,7 @@
 #define CONFIG_TSEC_ENET
 
 #ifdef CONFIG_TSEC_ENET
+#ifndef CONFIG_DM_ETH
 #define CONFIG_MII
 #define CONFIG_MII_DEFAULT_TSEC		1
 #define CONFIG_TSEC1			1
@@ -370,6 +371,9 @@
 #define TSEC3_PHYIDX			0
 
 #define CONFIG_ETHPRIME			"eTSEC1"
+#else
+#define CONFIG_ETHPRIME			"ethernet at 2d10000"
+#endif
 
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
Signature · 1 line
1.8.2.1
author
#53 lore raw

cover arm: ls1021atwr: Convert to use driver model TSEC driver

In reply to Bin Meng

Joe, York,

Quoted 39 lines · Bin Meng

This series adds driver model ethernet support to the Freescale TSEC ethernet driver and convert ls1021atwr board to use it.

Enable the support in the ls1021atwr_nor_defconfig and ls1021atwr_nor_lpuart_defconfig configurations.

Bin Meng (17):
powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
net: tsec: fsl_mdio: Fix several cosmetic issues
net: tsec: Move rx_idx and tx_idx to struct tsec_private
net: tsec: Move rxbd and txbd to struct tsec_private
net: tsec: Adjust orders to avoid forward declaration of tsec_send()
net: tsec: Use tsec_private pointer as the parameter for internal
routines
doc: dt-bindings: Describe Freescale TSEC ethernet controller
net: tsec: Add driver model ethernet support
net: tsec: Use priv->tbiaddr to initialize TBI PHY address
arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()
arm: ls1021atwr: Disable CONFIG_E1000 temporarily
arm: ls1021atwr: Convert to use driver model TSEC driver

 arch/arm/cpu/armv7/ls102xa/cpu.c              |   2 +-
 arch/arm/cpu/armv7/ls102xa/fdt.c              |  26 +-
 arch/arm/dts/ls1021a-twr.dts                  |  20 +
 arch/arm/dts/ls1021a.dtsi                     |  18 +-
 board/freescale/bsc9132qds/bsc9132qds.c       |   4 +-
 board/freescale/c29xpcie/c29xpcie.c           |   4 +-
 board/freescale/ls1021atwr/ls1021atwr.c       |   4 +-
 board/freescale/mpc8548cds/mpc8548cds.c       |   4 +-
 board/freescale/mpc8572ds/mpc8572ds.c         |   4 +-
 board/freescale/p1010rdb/p1010rdb.c           |   4 +-
 configs/ls1021atwr_nor_defconfig              |   3 +-
 configs/ls1021atwr_nor_lpuart_defconfig       |   3 +-
Quoted 9 lines
 doc/device-tree-bindings/net/fsl-tsec-phy.txt |  64 +++
 drivers/net/fsl_mdio.c                        |   4 +-
 drivers/net/tsec.c                            | 536 ++++++++++++++++++--------
 include/configs/ls1021atwr.h                  |   4 +
 include/fsl_mdio.h                            |   7 +-
 include/tsec.h                                |  69 ++--
 18 files changed, 546 insertions(+), 234 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/fsl-tsec-phy.txt

I wonder if you can post some review comments if any before I spin a v2?

Regards,
Bin

#54 lore raw

cover arm: ls1021atwr: Convert to use driver model TSEC driver

Quoted 17 lines · Bin Meng

Joe, York,

Quoted 14 lines · Bin Meng

This series adds driver model ethernet support to the Freescale TSEC ethernet driver and convert ls1021atwr board to use it.

Enable the support in the ls1021atwr_nor_defconfig and ls1021atwr_nor_lpuart_defconfig configurations.

Bin Meng (17):
powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

I think separating TSEC from PCI eth is correct.

Quoted 3 lines
Quoted 3 lines

net: tsec: fsl_mdio: Fix several cosmetic issues
net: tsec: Move rx_idx and tx_idx to struct tsec_private
net: tsec: Move rxbd and txbd to struct tsec_private

I don't see problem with above change. I didn't test them though.

Quoted 9 lines
Quoted 9 lines

net: tsec: Adjust orders to avoid forward declaration of tsec_send()
net: tsec: Use tsec_private pointer as the parameter for internal
routines
doc: dt-bindings: Describe Freescale TSEC ethernet controller
net: tsec: Add driver model ethernet support
net: tsec: Use priv->tbiaddr to initialize TBI PHY address
arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()
arm: ls1021atwr: Disable CONFIG_E1000 temporarily
arm: ls1021atwr: Convert to use driver model TSEC driver

I haven't tested your patch. Just a reminder, please keep it in mind to have "git bisect" always working, in case we need to find something later. My previous comment on disabling E1000 for ls1021atwr still stands.

York

author
#55 lore raw

cover arm: ls1021atwr: Convert to use driver model TSEC driver

Quoted 19 lines · york sun
Quoted 17 lines · Bin Meng

Joe, York,

Quoted 14 lines · Bin Meng

This series adds driver model ethernet support to the Freescale TSEC ethernet driver and convert ls1021atwr board to use it.

Enable the support in the ls1021atwr_nor_defconfig and ls1021atwr_nor_lpuart_defconfig configurations.

Bin Meng (17):
powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

Quoted 8 lines

I think separating TSEC from PCI eth is correct.

Quoted 3 lines
Quoted 3 lines

net: tsec: fsl_mdio: Fix several cosmetic issues
net: tsec: Move rx_idx and tx_idx to struct tsec_private
net: tsec: Move rxbd and txbd to struct tsec_private

I don't see problem with above change. I didn't test them though.

Thanks York.

Quoted 7 lines
Quoted 7 lines
Quoted 7 lines

net: tsec: Adjust orders to avoid forward declaration of tsec_send()
net: tsec: Use tsec_private pointer as the parameter for internal
routines
doc: dt-bindings: Describe Freescale TSEC ethernet controller
net: tsec: Add driver model ethernet support
net: tsec: Use priv->tbiaddr to initialize TBI PHY address
arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()

Hi Joe, I see this series are assigned to you. If the first 15 patches are OK, please apply it directly so that I can save some time including them in v2.

Quoted 3 lines
Quoted 2 lines
Quoted 2 lines

arm: ls1021atwr: Disable CONFIG_E1000 temporarily
arm: ls1021atwr: Convert to use driver model TSEC driver

Since York has some comments regarding to CONFIG_E1000, I will work on the remaining 2 patches in v2, together with DM PCI conversion.

Quoted 6 lines

I haven't tested your patch. Just a reminder, please keep it in mind to have "git bisect" always working, in case we need to find something later. My previous comment on disabling E1000 for ls1021atwr still stands.

York

Regards,
Bin

#56 lore raw

cover arm: ls1021atwr: Convert to use driver model TSEC driver

Hi Bin,

Quoted 39 lines · Bin Meng
Quoted 19 lines · york sun
Quoted 17 lines · Bin Meng

Joe, York,

Quoted 14 lines · Bin Meng

This series adds driver model ethernet support to the Freescale TSEC ethernet driver and convert ls1021atwr board to use it.

Enable the support in the ls1021atwr_nor_defconfig and ls1021atwr_nor_lpuart_defconfig configurations.

Bin Meng (17):
powerpc: bsc9132qds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: c29xpcie: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8572ds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
powerpc: p1010rdb: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET

Quoted 8 lines

I think separating TSEC from PCI eth is correct.

Quoted 3 lines
Quoted 3 lines

net: tsec: fsl_mdio: Fix several cosmetic issues
net: tsec: Move rx_idx and tx_idx to struct tsec_private
net: tsec: Move rxbd and txbd to struct tsec_private

I don't see problem with above change. I didn't test them though.

Thanks York.

Quoted 7 lines
Quoted 7 lines
Quoted 7 lines

net: tsec: Adjust orders to avoid forward declaration of tsec_send()
net: tsec: Use tsec_private pointer as the parameter for internal
routines
doc: dt-bindings: Describe Freescale TSEC ethernet controller
net: tsec: Add driver model ethernet support
net: tsec: Use priv->tbiaddr to initialize TBI PHY address
arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type()

Quoted 3 lines

Hi Joe, I see this series are assigned to you. If the first 15 patches are OK, please apply it directly so that I can save some time including them in v2.

OK, I have reviewed the first 15 and will take them now for build testing.

Quoted 20 lines
Quoted 3 lines
Quoted 2 lines
Quoted 2 lines

arm: ls1021atwr: Disable CONFIG_E1000 temporarily
arm: ls1021atwr: Convert to use driver model TSEC driver

Since York has some comments regarding to CONFIG_E1000, I will work on the remaining 2 patches in v2, together with DM PCI conversion.

Quoted 6 lines

I haven't tested your patch. Just a reminder, please keep it in mind to have "git bisect" always working, in case we need to find something later. My previous comment on disabling E1000 for ls1021atwr still stands.

York

Regards,
Bin
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