mmc0: Invalid maximum block size, assuming 512 bytes

DISCUSSION Mason 3 participants 9 messages Jan 19, 2016 – Feb 2, 2016 MMC, SD and SDIO

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Shawn Lin

2016-01-20 01:18 UTC #1 lore raw

Quoted 17 lines · Mason

Hello,

My SoC provides an Arasan SDIO/eMMC controller supported by the drivers/mmc/host/sdhci-of-arasan.c driver.

At init, the driver prints a warning to the console:

[    0.887301] sdhci: Secure Digital Host Controller Interface driver
[    0.893537] sdhci: Copyright(c) Pierre Ossman
[    0.897928] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.903903] sdhci-arasan 21000.mmc: No vmmc regulator found
[    0.909537] sdhci-arasan 21000.mmc: No vqmmc regulator found
[    0.915247] mmc0: Invalid maximum block size, assuming 512 bytes
[    0.953797] mmc0: SDHCI controller on 21000.mmc [21000.mmc] using ADMA
[    0.961494] sdhci-arasan 21200.mmc: No vmmc regulator found
[    0.967110] sdhci-arasan 21200.mmc: No vqmmc regulator found

Quoted 3 lines

Is "mmc0: Invalid maximum block size, assuming 512 bytes" something serious which requires investigating, in your experience?

you can look into this commit 0633f654241
From <SD host controller simplified specfication version 3.00> sdhci doesn't support blocks of 4096 bytes.

But at least check my arasan-5.1 databook, it supports 4096 from the capabilities register. So, you don't force arasan to use SDHCI_QUIRK_FORCE_BLK_SZ_2048, then sdhci core force it to be 512 bytes. Not serious problem, just a proper warn.

Quoted 18 lines

The corresponding DT is:
mmc0: mmc@21000 {
	compatible = "arasan,sdhci-8.9a";
	reg = <0x21000 0x200>;
	clock-names = "clk_xin", "clk_ahb";
	clocks = <&sdio_clk>, <&clkgen 1>;
	interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
};
Regards.
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Signature · 2 lines

Best Regards
Shawn Lin

Mason

author

2016-01-21 15:01 UTC #2 lore raw

Quoted 20 lines · Shawn Lin

Quoted 15 lines · Mason
My SoC provides an Arasan SDIO/eMMC controller supported by the drivers/mmc/host/sdhci-of-arasan.c driver.
At init, the driver prints a warning to the console:
[    0.887301] sdhci: Secure Digital Host Controller Interface driver
[    0.893537] sdhci: Copyright(c) Pierre Ossman
[    0.897928] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.903903] sdhci-arasan 21000.mmc: No vmmc regulator found
[    0.909537] sdhci-arasan 21000.mmc: No vqmmc regulator found
[    0.915247] mmc0: Invalid maximum block size, assuming 512 bytes
[    0.953797] mmc0: SDHCI controller on 21000.mmc [21000.mmc] using ADMA
[    0.961494] sdhci-arasan 21200.mmc: No vmmc regulator found
[    0.967110] sdhci-arasan 21200.mmc: No vqmmc regulator found
Quoted 2 lines
Is "mmc0: Invalid maximum block size, assuming 512 bytes" something serious which requires investigating, in your experience?

Quoted 18 lines

you can look into this commit 0633f654241
From <SD host controller simplified specfication version 3.00>
sdhci doesn't support blocks of 4096 bytes.
But at least check my arasan-5.1 databook, it supports 4096 from the capabilities register. So, you don't force arasan to use SDHCI_QUIRK_FORCE_BLK_SZ_2048, then sdhci core force it to be 512 bytes. Not serious problem, just a proper warn.
Quoted 9 lines
The corresponding DT is:
mmc0: mmc@21000 {
	compatible = "arasan,sdhci-8.9a";
	reg = <0x21000 0x200>;
	clock-names = "clk_xin", "clk_ahb";
	clocks = <&sdio_clk>, <&clkgen 1>;
	interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
};

Hello Shawn,

Thanks for pointing out SDHCI_QUIRK_FORCE_BLK_SZ_2048.

I don't think there is currently a way to enable this quirk for the Arasan controller from the device tree, right?

$ git grep SDHCI_QUIRK_FORCE_BLK_SZ_2048 drivers/mmc
drivers/mmc/host/sdhci-bcm-kona.c:              SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
drivers/mmc/host/sdhci-esdhc.h:#define ESDHC_DEFAULT_QUIRKS     (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
drivers/mmc/host/sdhci.c:       if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
drivers/mmc/host/sdhci.h:#define SDHCI_QUIRK_FORCE_BLK_SZ_2048                  (1<<20)

So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?

Regards.

Shawn Lin

2016-01-22 02:08 UTC #3 lore raw

Quoted 41 lines · Mason

Quoted 20 lines · Shawn Lin
Quoted 15 lines · Mason
My SoC provides an Arasan SDIO/eMMC controller supported by the drivers/mmc/host/sdhci-of-arasan.c driver.
At init, the driver prints a warning to the console:
[    0.887301] sdhci: Secure Digital Host Controller Interface driver
[    0.893537] sdhci: Copyright(c) Pierre Ossman
[    0.897928] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.903903] sdhci-arasan 21000.mmc: No vmmc regulator found
[    0.909537] sdhci-arasan 21000.mmc: No vqmmc regulator found
[    0.915247] mmc0: Invalid maximum block size, assuming 512 bytes
[    0.953797] mmc0: SDHCI controller on 21000.mmc [21000.mmc] using ADMA
[    0.961494] sdhci-arasan 21200.mmc: No vmmc regulator found
[    0.967110] sdhci-arasan 21200.mmc: No vqmmc regulator found
Quoted 2 lines
Is "mmc0: Invalid maximum block size, assuming 512 bytes" something serious which requires investigating, in your experience?
Quoted 18 lines
you can look into this commit 0633f654241
From <SD host controller simplified specfication version 3.00>
sdhci doesn't support blocks of 4096 bytes.
But at least check my arasan-5.1 databook, it supports 4096 from the capabilities register. So, you don't force arasan to use SDHCI_QUIRK_FORCE_BLK_SZ_2048, then sdhci core force it to be 512 bytes. Not serious problem, just a proper warn.
Quoted 9 lines
The corresponding DT is:
mmc0: mmc@21000 {
	compatible = "arasan,sdhci-8.9a";
	reg = <0x21000 0x200>;
	clock-names = "clk_xin", "clk_ahb";
	clocks = <&sdio_clk>, <&clkgen 1>;
	interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
};

Quoted 6 lines

Hello Shawn,
Thanks for pointing out SDHCI_QUIRK_FORCE_BLK_SZ_2048.
I don't think there is currently a way to enable this quirk for the Arasan controller from the device tree, right?

Right, no property available fot this.

Quoted 9 lines

$ git grep SDHCI_QUIRK_FORCE_BLK_SZ_2048 drivers/mmc
drivers/mmc/host/sdhci-bcm-kona.c:              SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
drivers/mmc/host/sdhci-esdhc.h:#define ESDHC_DEFAULT_QUIRKS     (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
drivers/mmc/host/sdhci.c:       if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
drivers/mmc/host/sdhci.h:#define SDHCI_QUIRK_FORCE_BLK_SZ_2048                  (1<<20)

So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?

It depends. If you think 512 block size if okay for you, leave it alone. Otherwise, add it in drivers/mmc/host/sdhci-of-arasan.c :)

Quoted 6 lines

Regards.

Signature · 2 lines

Best Regards
Shawn Lin

Mason

author

2016-01-22 07:17 UTC #4 lore raw

Quoted 7 lines · Shawn Lin

Quoted 2 lines · Mason
So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?
It depends. If you think 512 block size if okay for you, leave it alone. Otherwise, add it in drivers/mmc/host/sdhci-of-arasan.c :)

When I measured the read/write throughput to an attached SD card, I got around 16 MB/s, and I thought raising the block size might help with throughput?

I'll test and report back.

Regards.

Mason

author

2016-02-01 21:32 UTC #5 lore raw

Quoted 7 lines · Mason

Quoted 5 lines · Shawn Lin
Quoted 2 lines · Mason
So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?

Quoted 8 lines

Quoted 2 lines
It depends. If you think 512 block size if okay for you, leave it alone. Otherwise, add it in drivers/mmc/host/sdhci-of-arasan.c :)
When I measured the read/write throughput to an attached SD card, I got around 16 MB/s, and I thought raising the block size might help with throughput?
I'll test and report back.

Haven't had time to test yet, but I wanted to ask experienced folks what to expect when raising the block size from 512 to 2048 bytes?

I don't think it would speed up dd'ing the entire device? (Especially if we use a large block size in dd.)

Would it perhaps speed up myriads of random accesses?

Regards.

Adrian Hunter

2016-02-02 09:03 UTC #6 lore raw

Quoted 16 lines · Mason

Quoted 14 lines · Mason
Quoted 7 lines · Shawn Lin
Quoted 2 lines · Mason
So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?
It depends. If you think 512 block size if okay for you, leave it alone. Otherwise, add it in drivers/mmc/host/sdhci-of-arasan.c :)
When I measured the read/write throughput to an attached SD card, I got around 16 MB/s, and I thought raising the block size might help with throughput?

Quoted 5 lines

Quoted 1 line
I'll test and report back.
Haven't had time to test yet, but I wanted to ask experienced folks what to expect when raising the block size from 512 to 2048 bytes?

mmc block driver sets block size to 512.

What you are looking at is maximum block size. SDIO uses bigger block sizes, so it is useful for that.

Mason

author

2016-02-02 10:12 UTC #7 lore raw

Quoted 19 lines · Adrian Hunter

Quoted 18 lines · Mason
Quoted 15 lines · Mason
Quoted 7 lines · Shawn Lin
Quoted 2 lines · Mason
So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?
It depends. If you think 512 block size if okay for you, leave it alone. Otherwise, add it in drivers/mmc/host/sdhci-of-arasan.c :)
When I measured the read/write throughput to an attached SD card, I got around 16 MB/s, and I thought raising the block size might help with throughput?
I'll test and report back.

Quoted 8 lines

Quoted 3 lines
Haven't had time to test yet, but I wanted to ask experienced folks what to expect when raising the block size from 512 to 2048 bytes?
mmc block driver sets block size to 512.
What you are looking at is maximum block size. SDIO uses bigger block sizes, so it is useful for that.

You're right. I was looking at this block of code:

	/*
	 * Maximum block size. This varies from controller to controller and
	 * is specified in the capabilities register.
	 */
	if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
		mmc->max_blk_size = 2;
	} else {
		mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >>
				SDHCI_MAX_BLOCK_SHIFT;
		if (mmc->max_blk_size >= 3) {
			pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
				mmc_hostname(mmc));
			mmc->max_blk_size = 0;
		}
	}

	mmc->max_blk_size = 512 << mmc->max_blk_size;

As Shawn pointed out, this was updated by commit 0633f654241

Author: Anton Vorontsov
Date:   Tue Mar 17 00:14:03 2009 +0300

sdhci: Add quirk for forcing maximum block size to 2048 bytes

FSL eSDHC controllers can support maximum block size up to 4096 bytes, the MBL (Maximum Block Length) field in the capabilities register extended by one bit, and is set to 0x3.

But the SDHCI core doesn't support blocks of 4096 bytes, and thus forces blksz to the lowest value -- 512 bytes. With this patch we can pin up the blksz to the maximum supported block size, i.e. 2048 bytes.

But I'm wondering if the 2048-byte limitation in SDHCI core is still present?

I see some drivers apparently setting it to a higher value:

host/atmel-mci.c: mmc->max_blk_size = 32768;
host/dw_mmc.c: mmc->max_blk_size = 65536;
host/wbsd.c: mmc->max_blk_size = 4087;

Regards.

Adrian Hunter

2016-02-02 11:34 UTC #8 lore raw

Quoted 61 lines · Mason

Quoted 19 lines · Adrian Hunter
Quoted 18 lines · Mason
Quoted 15 lines · Mason
Quoted 7 lines · Shawn Lin
Quoted 2 lines · Mason
So that means I have to write code in
drivers/mmc/host/sdhci-of-arasan.c correct?
It depends. If you think 512 block size if okay for you, leave it alone. Otherwise, add it in drivers/mmc/host/sdhci-of-arasan.c :)
When I measured the read/write throughput to an attached SD card, I got around 16 MB/s, and I thought raising the block size might help with throughput?
I'll test and report back.
Quoted 8 lines
Quoted 3 lines
Haven't had time to test yet, but I wanted to ask experienced folks what to expect when raising the block size from 512 to 2048 bytes?
mmc block driver sets block size to 512.
What you are looking at is maximum block size. SDIO uses bigger block sizes, so it is useful for that.
You're right. I was looking at this block of code:
	/*
	 * Maximum block size. This varies from controller to controller and
	 * is specified in the capabilities register.
	 */
	if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
		mmc->max_blk_size = 2;
	} else {
		mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >>
				SDHCI_MAX_BLOCK_SHIFT;
		if (mmc->max_blk_size >= 3) {
			pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
				mmc_hostname(mmc));
			mmc->max_blk_size = 0;
		}
	}

	mmc->max_blk_size = 512 << mmc->max_blk_size;
As Shawn pointed out, this was updated by commit 0633f654241
Author: Anton Vorontsov
Date:   Tue Mar 17 00:14:03 2009 +0300
sdhci: Add quirk for forcing maximum block size to 2048 bytes
FSL eSDHC controllers can support maximum block size up to 4096 bytes, the MBL (Maximum Block Length) field in the capabilities register extended by one bit, and is set to 0x3.

Quoted 7 lines

But the SDHCI core doesn't support blocks of 4096 bytes, and thus forces blksz to the lowest value -- 512 bytes. With this patch we can pin up the blksz to the maximum supported block size, i.e. 2048 bytes.
But I'm wondering if the 2048-byte limitation in SDHCI core is still present?

The block size field of the Block Size register is only 12 bits, so yes.

Quoted 6 lines

I see some drivers apparently setting it to a higher value:
host/atmel-mci.c: mmc->max_blk_size = 32768;
host/dw_mmc.c: mmc->max_blk_size = 65536;
host/wbsd.c: mmc->max_blk_size = 4087;

Sure, but not SDHCI.