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ARM: Add Support for the VInCo platform

PATCH Superseded Gregory CLEMENT 3 participants 33 messages Dec 16, 2015 – Feb 19, 2016

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#0 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

---
Hi again,

Some of my fixes were not commit in my previous version.

This version should be the correct one, I also added the acked-by from Nicolas.

Sorry for not having seen it before.

Thanks,

Gregory

arch/arm/mach-at91/Kconfig | 6 ++

 board/l+g/vinco/Kconfig    |  12 +++
 board/l+g/vinco/Makefile   |   1 +
 board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
 configs/vinco_defconfig    |  13 +++
 include/configs/vinco.h    | 169 ++++++++++++++++++++++++++++++++++++
 6 files changed, 413 insertions(+)
 create mode 100644 board/l+g/vinco/Kconfig
 create mode 100644 board/l+g/vinco/Makefile
 create mode 100644 board/l+g/vinco/vinco.c
 create mode 100644 configs/vinco_defconfig
 create mode 100644 include/configs/vinco.h
arch/arm/mach-at91/Kconfig +6 -0
index c333647..3dfbb5f 100644
@@ -114,6 +114,11 @@ config TARGET_SMARTWEB
 	select CPU_ARM926EJS
 	select SUPPORT_SPL
 
+config TARGET_VINCO
+	bool "Support VINCO"
+	select CPU_V7
+	select SUPPORT_SPL
+
 endchoice
 
 config SYS_SOC
@@ -136,6 +141,7 @@ source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/egnite/ethernut5/Kconfig"
 source "board/esd/meesc/Kconfig"
+source "board/l+g/vinco/Kconfig"
 source "board/mini-box/picosam9g45/Kconfig"
 source "board/ronetix/pm9261/Kconfig"
 source "board/ronetix/pm9263/Kconfig"
board/l+g/vinco/Kconfig new file +12 -0
new file mode 100644
index 0000000..229b5ea
@@ -0,0 +1,12 @@
+if TARGET_VINCO
+
+config SYS_BOARD
+	default "vinco"
+
+config SYS_VENDOR
+	default "l+g"
+
+config SYS_CONFIG_NAME
+	default "vinco"
+
+endif
board/l+g/vinco/Makefile new file +1 -0
new file mode 100644
index 0000000..a2b8a2b
@@ -0,0 +1 @@
+obj-y += vinco.o
board/l+g/vinco/vinco.c new file +212 -0

212 lines not on this page · raw message

configs/vinco_defconfig new file +13 -0
new file mode 100644
index 0000000..7cae79b
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_VINCO=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_SYS_PROMPT="vinco => "
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
include/configs/vinco.h new file +169 -0

169 lines not on this page · raw message

Signature · 1 line
2.5.0
#1 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

Hello all,

Quoted 11 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

I sent this patch one month ago and it seems that it didn't get applied.

What is the status of this patch?

Do you have any remark about it?

Thanks,

Gregory

Quoted 492 lines

---
Hi again,

Some of my fixes were not commit in my previous version.

This version should be the correct one, I also added the acked-by from Nicolas.

Sorry for not having seen it before.

Thanks,

Gregory

arch/arm/mach-at91/Kconfig | 6 ++

 board/l+g/vinco/Kconfig    |  12 +++
 board/l+g/vinco/Makefile   |   1 +
 board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
 configs/vinco_defconfig    |  13 +++
 include/configs/vinco.h    | 169 ++++++++++++++++++++++++++++++++++++
 6 files changed, 413 insertions(+)
 create mode 100644 board/l+g/vinco/Kconfig
 create mode 100644 board/l+g/vinco/Makefile
 create mode 100644 board/l+g/vinco/vinco.c
 create mode 100644 configs/vinco_defconfig
 create mode 100644 include/configs/vinco.h
arch/arm/mach-at91/Kconfig +6 -0
index c333647..3dfbb5f 100644
@@ -114,6 +114,11 @@ config TARGET_SMARTWEB
 	select CPU_ARM926EJS
 	select SUPPORT_SPL
 
+config TARGET_VINCO
+	bool "Support VINCO"
+	select CPU_V7
+	select SUPPORT_SPL
+
 endchoice
 
 config SYS_SOC
@@ -136,6 +141,7 @@ source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/egnite/ethernut5/Kconfig"
 source "board/esd/meesc/Kconfig"
+source "board/l+g/vinco/Kconfig"
 source "board/mini-box/picosam9g45/Kconfig"
 source "board/ronetix/pm9261/Kconfig"
 source "board/ronetix/pm9263/Kconfig"
board/l+g/vinco/Kconfig new file +12 -0
new file mode 100644
index 0000000..229b5ea
@@ -0,0 +1,12 @@
+if TARGET_VINCO
+
+config SYS_BOARD
+	default "vinco"
+
+config SYS_VENDOR
+	default "l+g"
+
+config SYS_CONFIG_NAME
+	default "vinco"
+
+endif
board/l+g/vinco/Makefile new file +1 -0
new file mode 100644
index 0000000..a2b8a2b
@@ -0,0 +1 @@
+obj-y += vinco.o
board/l+g/vinco/vinco.c new file +212 -0
new file mode 100644
index 0000000..3d7af09
@@ -0,0 +1,212 @@
+/*
+ * Board file for the VInCo platform
+ * Based on the the SAMA5-EK board file
+ * Configuration settings for the VInCo platform.
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_usba_udc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/sama5d3_smc.h>
+#include <asm/arch/sama5d4.h>
+#include <atmel_hlcdc.h>
+#include <atmel_mci.h>
+#include <lcd.h>
+#include <mmc.h>
+#include <net.h>
+#include <netdev.h>
+#include <nand.h>
+#include <spi.h>
+#include <version.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_ATMEL_SPI
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
+}
+
+static void vinco_spi0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* SPI0_MISO */
+	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* SPI0_MOSI */
+	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* SPI0_SPCK */
+
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);	/* SPI0_CS0 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
+}
+#endif /* CONFIG_ATMEL_SPI */
+
+
+#ifdef CONFIG_CMD_USB
+static void vinco_usb_hw_init(void)
+{
+	at91_set_pio_output(AT91_PIO_PORTE, 11, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 12, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 10, 0);
+}
+#endif
+
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+void vinco_mci0_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTC, 5, 1);	/* MCI0 CDA */
+	at91_set_b_periph(AT91_PIO_PORTC, 6, 1);	/* MCI0 DA0 */
+	at91_set_b_periph(AT91_PIO_PORTC, 7, 1);	/* MCI0 DA1 */
+	at91_set_b_periph(AT91_PIO_PORTC, 8, 1);	/* MCI0 DA2 */
+	at91_set_b_periph(AT91_PIO_PORTC, 9, 1);	/* MCI0 DA3 */
+	at91_set_b_periph(AT91_PIO_PORTC, 10, 1);	/* MCI0 DA4 */
+	at91_set_b_periph(AT91_PIO_PORTC, 11, 1);	/* MCI0 DA5 */
+	at91_set_b_periph(AT91_PIO_PORTC, 12, 1);	/* MCI0 DA6 */
+	at91_set_b_periph(AT91_PIO_PORTC, 13, 1);	/* MCI0 DA7 */
+	at91_set_b_periph(AT91_PIO_PORTC, 4, 0);	/* MCI0 CLK */
+
+	/*
+	 * As the mci io internal pull down is too strong, so if the io needs
+	 * external pull up, the pull up resistor will be very small, if so
+	 * the power consumption will increase, so disable the interanl pull
+	 * down to save the power.
+	 */
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0);
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_MCI0);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	/* Enable power for MCI0 interface */
+	at91_set_pio_output(AT91_PIO_PORTE, 7, 1);
+
+	return atmel_mci_init((void *)ATMEL_BASE_MCI0);
+}
+#endif /* CONFIG_GENERIC_ATMEL_MCI */
+
+#ifdef CONFIG_MACB
+void vinco_macb0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTB, 0, 0);	/* ETXCK_EREFCK */
+	at91_set_a_periph(AT91_PIO_PORTB, 6, 0);	/* ERXDV */
+	at91_set_a_periph(AT91_PIO_PORTB, 8, 0);	/* ERX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 9, 0);	/* ERX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 7, 0);	/* ERXER */
+	at91_set_a_periph(AT91_PIO_PORTB, 2, 0);	/* ETXEN */
+	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* ETX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 13, 0);	/* ETX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 17, 0);	/* EMDIO */
+	at91_set_a_periph(AT91_PIO_PORTB, 16, 0);	/* EMDC */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_GMAC0);
+
+	/* Enable Phy*/
+	at91_set_pio_output(AT91_PIO_PORTE, 8, 1);
+}
+#endif
+
+static void vinco_serial3_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTE, 17, 1);	/* TXD3 */
+	at91_set_b_periph(AT91_PIO_PORTE, 16, 0);	/* RXD3 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_USART3);
+}
+
+int board_early_init_f(void)
+{
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
+	at91_periph_clk_enable(ATMEL_ID_PIOE);
+
+	vinco_serial3_hw_init();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_ATMEL_SPI
+	vinco_spi0_hw_init();
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+	vinco_mci0_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	vinco_macb0_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+	vinco_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	at91_udp_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00);
+#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	usba_udc_probe(&pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+	usb_eth_initialize(bis);
+#endif
+#endif
+
+	return rc;
+}
configs/vinco_defconfig new file +13 -0
new file mode 100644
index 0000000..7cae79b
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_VINCO=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_SYS_PROMPT="vinco => "
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
include/configs/vinco.h new file +169 -0
new file mode 100644
index 0000000..b96150e
@@ -0,0 +1,169 @@
+/*
+ * Configuration settings for the VInCo platform.
+ *
+ * Based on the settings for the SAMA5-EK board
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT gregory.clement at free-electrons.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* No NOR flash, this definition should be put before common header */
+#define CONFIG_SYS_NO_FLASH
+
+#include "at91-sama5_common.h"
+
+/* The value in the common file is too far away for the VInCo platform */
+#ifdef CONFIG_SYS_TEXT_BASE
+#undef CONFIG_SYS_TEXT_BASE
+#endif
+#define CONFIG_SYS_TEXT_BASE		0x20f00000
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_USART3
+#define	CONFIG_USART_ID			ATMEL_ID_USART3
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE		0x4000000
+
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
+
+/* SerialFlash */
+#define CONFIG_CMD_SF
+
+#ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_ATMEL_SPI0
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_BUS		0
+#define CONFIG_SF_DEFAULT_CS		0
+#define CONFIG_SF_DEFAULT_SPEED		50000000
+#define CONFIG_ENV_SPI_MAX_HZ		50000000
+#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
+#define CONFIG_ENV_SPI_MODE		(SPI_MODE_0)
+#endif
+
+
+/* MMC */
+#define CONFIG_CMD_MMC
+
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI1
+#define CONFIG_SYS_MMC_CLK_OD		500000
+
+/* For generating MMC partitions */
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_RANDOM_UUID
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_GPT
+
+#endif
+
+/* USB */
+#define CONFIG_CMD_USB
+
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
+#define CONFIG_USB_STORAGE
+#endif
+
+/* USB device */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_ATMEL_USBA
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
+
+#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/* Ethernet Hardware */
+#define CONFIG_PHYLIB
+#define CONFIG_CMD_MII
+#define CONFIG_PHY_SMSC
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_MACB_SEARCH_PHY
+
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_RNDIS
+
+
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+/* bootstrap + u-boot + env + linux in serial flash */
+#define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
+/* Use our own mapping for the VInCo platform */
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_ENV_SIZE
+
+#define CONFIG_ENV_OFFSET       0x10000
+#define CONFIG_ENV_SIZE         0x10000
+
+/* Update the bootcommand according to our mapping for the VInCo platform */
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND  "mmc dev 0 0;" \
+			    "mmc read ${loadaddr} ${k_offset} ${k_blksize};" \
+			    "mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \
+			    "bootz ${loadaddr} -  ${oftaddr}"
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS	    "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"kernel_start=0x20000\0" \
+	"kernel_size=0x800000\0" \
+	"mmcblksize=0x200\0" \
+	"oftaddr=0x21000000\0" \
+	"loadaddr=0x22000000\0" \
+	"update_uboot=tftp ${loadaddr} u-boot.bin;sf probe 0;" \
+	"sf erase 0x20000 0x4B000; sf write ${loadaddr} 0x20000 0x4B000\0" \
+	"create_partition=setexpr dtb_start ${kernel_start} + 0x400000;" \
+	"setexpr rootfs_start ${kernel_start} + ${kernel_size};" \
+	"setenv partitions 'name=kernel,size=${kernel_size}," \
+	"start=${kernel_start};name=rootfs,size=-';" \
+	"gpt write mmc 0 ${partitions} \0"\
+	"f2blk_size=setexpr fileblksize ${filesize} / ${mmcblksize};" \
+	"setexpr fileblksize ${fileblksize} + 1\0" \
+	"store_kernel=tftp ${loadaddr} zImage; run f2blk_size;" \
+	"setexpr k_blksize ${fileblksize};" \
+	"setexpr k_offset ${kernel_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${k_offset} ${fileblksize}\0" \
+	"store_dtb=tftp ${loadaddr} at91-vinco.dtb; run f2blk_size;" \
+	"setexpr dtb_blksize ${fileblksize};" \
+	"setexpr dtb_offset ${dtb_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${dtb_offset} ${fileblksize}\0" \
+	"store_rootfs=tftp ${loadaddr} vinco-gateway-image-vinco.ext4;" \
+	"setexpr rootfs_offset ${rootfs_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${rootfs_offset} ${fileblksize}\0" \
+	"bootdelay=0\0"
+
+#endif
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#endif
+
Signature · 1 line
2.5.0
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#2 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

Hi Gregory,

Quoted 13 lines · Gregory CLEMENT

Hello all,

Quoted 9 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

Quoted 4 lines
Quoted 2 lines

I sent this patch one month ago and it seems that it didn't get applied.

I'm aware of it. Since it was way after merge window close for 2016.01 it would not have been applied for this release.

Quoted 1 line

What is the status of this patch?

I'll review and eventually apply it until end of this Weekend.

Quoted 1 line

Do you have any remark about it?

Not yet ...

Excuse me for the long waiting times for atmel patches. My list has some unreplied patches back from end of November 2015. I'm looking forward to improve this in future.

Andreas

Quoted 498 lines

Thanks,

Gregory

Quoted 492 lines

---
Hi again,

Some of my fixes were not commit in my previous version.

This version should be the correct one, I also added the acked-by from Nicolas.

Sorry for not having seen it before.

Thanks,

Gregory

arch/arm/mach-at91/Kconfig | 6 ++

 board/l+g/vinco/Kconfig    |  12 +++
 board/l+g/vinco/Makefile   |   1 +
 board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
 configs/vinco_defconfig    |  13 +++
 include/configs/vinco.h    | 169 ++++++++++++++++++++++++++++++++++++
 6 files changed, 413 insertions(+)
 create mode 100644 board/l+g/vinco/Kconfig
 create mode 100644 board/l+g/vinco/Makefile
 create mode 100644 board/l+g/vinco/vinco.c
 create mode 100644 configs/vinco_defconfig
 create mode 100644 include/configs/vinco.h
arch/arm/mach-at91/Kconfig +6 -0
index c333647..3dfbb5f 100644
@@ -114,6 +114,11 @@ config TARGET_SMARTWEB
 	select CPU_ARM926EJS
 	select SUPPORT_SPL
 
+config TARGET_VINCO
+	bool "Support VINCO"
+	select CPU_V7
+	select SUPPORT_SPL
+
 endchoice
 
 config SYS_SOC
@@ -136,6 +141,7 @@ source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/egnite/ethernut5/Kconfig"
 source "board/esd/meesc/Kconfig"
+source "board/l+g/vinco/Kconfig"
 source "board/mini-box/picosam9g45/Kconfig"
 source "board/ronetix/pm9261/Kconfig"
 source "board/ronetix/pm9263/Kconfig"
board/l+g/vinco/Kconfig new file +12 -0
new file mode 100644
index 0000000..229b5ea
@@ -0,0 +1,12 @@
+if TARGET_VINCO
+
+config SYS_BOARD
+	default "vinco"
+
+config SYS_VENDOR
+	default "l+g"
+
+config SYS_CONFIG_NAME
+	default "vinco"
+
+endif
board/l+g/vinco/Makefile new file +1 -0
new file mode 100644
index 0000000..a2b8a2b
@@ -0,0 +1 @@
+obj-y += vinco.o
board/l+g/vinco/vinco.c new file +212 -0
new file mode 100644
index 0000000..3d7af09
@@ -0,0 +1,212 @@
+/*
+ * Board file for the VInCo platform
+ * Based on the the SAMA5-EK board file
+ * Configuration settings for the VInCo platform.
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_usba_udc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/sama5d3_smc.h>
+#include <asm/arch/sama5d4.h>
+#include <atmel_hlcdc.h>
+#include <atmel_mci.h>
+#include <lcd.h>
+#include <mmc.h>
+#include <net.h>
+#include <netdev.h>
+#include <nand.h>
+#include <spi.h>
+#include <version.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_ATMEL_SPI
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
+}
+
+static void vinco_spi0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* SPI0_MISO */
+	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* SPI0_MOSI */
+	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* SPI0_SPCK */
+
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);	/* SPI0_CS0 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
+}
+#endif /* CONFIG_ATMEL_SPI */
+
+
+#ifdef CONFIG_CMD_USB
+static void vinco_usb_hw_init(void)
+{
+	at91_set_pio_output(AT91_PIO_PORTE, 11, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 12, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 10, 0);
+}
+#endif
+
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+void vinco_mci0_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTC, 5, 1);	/* MCI0 CDA */
+	at91_set_b_periph(AT91_PIO_PORTC, 6, 1);	/* MCI0 DA0 */
+	at91_set_b_periph(AT91_PIO_PORTC, 7, 1);	/* MCI0 DA1 */
+	at91_set_b_periph(AT91_PIO_PORTC, 8, 1);	/* MCI0 DA2 */
+	at91_set_b_periph(AT91_PIO_PORTC, 9, 1);	/* MCI0 DA3 */
+	at91_set_b_periph(AT91_PIO_PORTC, 10, 1);	/* MCI0 DA4 */
+	at91_set_b_periph(AT91_PIO_PORTC, 11, 1);	/* MCI0 DA5 */
+	at91_set_b_periph(AT91_PIO_PORTC, 12, 1);	/* MCI0 DA6 */
+	at91_set_b_periph(AT91_PIO_PORTC, 13, 1);	/* MCI0 DA7 */
+	at91_set_b_periph(AT91_PIO_PORTC, 4, 0);	/* MCI0 CLK */
+
+	/*
+	 * As the mci io internal pull down is too strong, so if the io needs
+	 * external pull up, the pull up resistor will be very small, if so
+	 * the power consumption will increase, so disable the interanl pull
+	 * down to save the power.
+	 */
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0);
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_MCI0);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	/* Enable power for MCI0 interface */
+	at91_set_pio_output(AT91_PIO_PORTE, 7, 1);
+
+	return atmel_mci_init((void *)ATMEL_BASE_MCI0);
+}
+#endif /* CONFIG_GENERIC_ATMEL_MCI */
+
+#ifdef CONFIG_MACB
+void vinco_macb0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTB, 0, 0);	/* ETXCK_EREFCK */
+	at91_set_a_periph(AT91_PIO_PORTB, 6, 0);	/* ERXDV */
+	at91_set_a_periph(AT91_PIO_PORTB, 8, 0);	/* ERX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 9, 0);	/* ERX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 7, 0);	/* ERXER */
+	at91_set_a_periph(AT91_PIO_PORTB, 2, 0);	/* ETXEN */
+	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* ETX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 13, 0);	/* ETX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 17, 0);	/* EMDIO */
+	at91_set_a_periph(AT91_PIO_PORTB, 16, 0);	/* EMDC */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_GMAC0);
+
+	/* Enable Phy*/
+	at91_set_pio_output(AT91_PIO_PORTE, 8, 1);
+}
+#endif
+
+static void vinco_serial3_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTE, 17, 1);	/* TXD3 */
+	at91_set_b_periph(AT91_PIO_PORTE, 16, 0);	/* RXD3 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_USART3);
+}
+
+int board_early_init_f(void)
+{
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
+	at91_periph_clk_enable(ATMEL_ID_PIOE);
+
+	vinco_serial3_hw_init();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_ATMEL_SPI
+	vinco_spi0_hw_init();
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+	vinco_mci0_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	vinco_macb0_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+	vinco_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	at91_udp_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00);
+#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	usba_udc_probe(&pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+	usb_eth_initialize(bis);
+#endif
+#endif
+
+	return rc;
+}
configs/vinco_defconfig new file +13 -0
new file mode 100644
index 0000000..7cae79b
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_VINCO=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_SYS_PROMPT="vinco => "
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
include/configs/vinco.h new file +169 -0
new file mode 100644
index 0000000..b96150e
@@ -0,0 +1,169 @@
+/*
+ * Configuration settings for the VInCo platform.
+ *
+ * Based on the settings for the SAMA5-EK board
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT gregory.clement at free-electrons.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* No NOR flash, this definition should be put before common header */
+#define CONFIG_SYS_NO_FLASH
+
+#include "at91-sama5_common.h"
+
+/* The value in the common file is too far away for the VInCo platform */
+#ifdef CONFIG_SYS_TEXT_BASE
+#undef CONFIG_SYS_TEXT_BASE
+#endif
+#define CONFIG_SYS_TEXT_BASE		0x20f00000
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_USART3
+#define	CONFIG_USART_ID			ATMEL_ID_USART3
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE		0x4000000
+
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
+
+/* SerialFlash */
+#define CONFIG_CMD_SF
+
+#ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_ATMEL_SPI0
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_BUS		0
+#define CONFIG_SF_DEFAULT_CS		0
+#define CONFIG_SF_DEFAULT_SPEED		50000000
+#define CONFIG_ENV_SPI_MAX_HZ		50000000
+#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
+#define CONFIG_ENV_SPI_MODE		(SPI_MODE_0)
+#endif
+
+
+/* MMC */
+#define CONFIG_CMD_MMC
+
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI1
+#define CONFIG_SYS_MMC_CLK_OD		500000
+
+/* For generating MMC partitions */
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_RANDOM_UUID
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_GPT
+
+#endif
+
+/* USB */
+#define CONFIG_CMD_USB
+
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
+#define CONFIG_USB_STORAGE
+#endif
+
+/* USB device */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_ATMEL_USBA
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
+
+#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/* Ethernet Hardware */
+#define CONFIG_PHYLIB
+#define CONFIG_CMD_MII
+#define CONFIG_PHY_SMSC
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_MACB_SEARCH_PHY
+
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_RNDIS
+
+
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+/* bootstrap + u-boot + env + linux in serial flash */
+#define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
+/* Use our own mapping for the VInCo platform */
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_ENV_SIZE
+
+#define CONFIG_ENV_OFFSET       0x10000
+#define CONFIG_ENV_SIZE         0x10000
+
+/* Update the bootcommand according to our mapping for the VInCo platform */
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND  "mmc dev 0 0;" \
+			    "mmc read ${loadaddr} ${k_offset} ${k_blksize};" \
+			    "mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \
+			    "bootz ${loadaddr} -  ${oftaddr}"
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS	    "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"kernel_start=0x20000\0" \
+	"kernel_size=0x800000\0" \
+	"mmcblksize=0x200\0" \
+	"oftaddr=0x21000000\0" \
+	"loadaddr=0x22000000\0" \
+	"update_uboot=tftp ${loadaddr} u-boot.bin;sf probe 0;" \
+	"sf erase 0x20000 0x4B000; sf write ${loadaddr} 0x20000 0x4B000\0" \
+	"create_partition=setexpr dtb_start ${kernel_start} + 0x400000;" \
+	"setexpr rootfs_start ${kernel_start} + ${kernel_size};" \
+	"setenv partitions 'name=kernel,size=${kernel_size}," \
+	"start=${kernel_start};name=rootfs,size=-';" \
+	"gpt write mmc 0 ${partitions} \0"\
+	"f2blk_size=setexpr fileblksize ${filesize} / ${mmcblksize};" \
+	"setexpr fileblksize ${fileblksize} + 1\0" \
+	"store_kernel=tftp ${loadaddr} zImage; run f2blk_size;" \
+	"setexpr k_blksize ${fileblksize};" \
+	"setexpr k_offset ${kernel_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${k_offset} ${fileblksize}\0" \
+	"store_dtb=tftp ${loadaddr} at91-vinco.dtb; run f2blk_size;" \
+	"setexpr dtb_blksize ${fileblksize};" \
+	"setexpr dtb_offset ${dtb_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${dtb_offset} ${fileblksize}\0" \
+	"store_rootfs=tftp ${loadaddr} vinco-gateway-image-vinco.ext4;" \
+	"setexpr rootfs_offset ${rootfs_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${rootfs_offset} ${fileblksize}\0" \
+	"bootdelay=0\0"
+
+#endif
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#endif
+
Signature · 1 line
2.5.0
#3 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

Hi Andreas,

Quoted 28 lines · Andreas Bie?mann

Hi Gregory,

Quoted 13 lines · Gregory CLEMENT

Hello all,

Quoted 9 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

Quoted 4 lines
Quoted 2 lines

I sent this patch one month ago and it seems that it didn't get applied.

I'm aware of it. Since it was way after merge window close for 2016.01 it would not have been applied for this release.

Quoted 1 line

What is the status of this patch?

I'll review and eventually apply it until end of this Weekend.

Quoted 7 lines
Quoted 1 line

Do you have any remark about it?

Not yet ...

Excuse me for the long waiting times for atmel patches. My list has some unreplied patches back from end of November 2015. I'm looking forward to improve this in future.

No problem and thanks for the news :)

Gregory

Quoted 502 lines

Andreas

Quoted 498 lines

Thanks,

Gregory

Quoted 492 lines

---
Hi again,

Some of my fixes were not commit in my previous version.

This version should be the correct one, I also added the acked-by from Nicolas.

Sorry for not having seen it before.

Thanks,

Gregory

arch/arm/mach-at91/Kconfig | 6 ++

 board/l+g/vinco/Kconfig    |  12 +++
 board/l+g/vinco/Makefile   |   1 +
 board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
 configs/vinco_defconfig    |  13 +++
 include/configs/vinco.h    | 169 ++++++++++++++++++++++++++++++++++++
 6 files changed, 413 insertions(+)
 create mode 100644 board/l+g/vinco/Kconfig
 create mode 100644 board/l+g/vinco/Makefile
 create mode 100644 board/l+g/vinco/vinco.c
 create mode 100644 configs/vinco_defconfig
 create mode 100644 include/configs/vinco.h
arch/arm/mach-at91/Kconfig +6 -0
index c333647..3dfbb5f 100644
@@ -114,6 +114,11 @@ config TARGET_SMARTWEB
 	select CPU_ARM926EJS
 	select SUPPORT_SPL
 
+config TARGET_VINCO
+	bool "Support VINCO"
+	select CPU_V7
+	select SUPPORT_SPL
+
 endchoice
 
 config SYS_SOC
@@ -136,6 +141,7 @@ source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/egnite/ethernut5/Kconfig"
 source "board/esd/meesc/Kconfig"
+source "board/l+g/vinco/Kconfig"
 source "board/mini-box/picosam9g45/Kconfig"
 source "board/ronetix/pm9261/Kconfig"
 source "board/ronetix/pm9263/Kconfig"
board/l+g/vinco/Kconfig new file +12 -0
new file mode 100644
index 0000000..229b5ea
@@ -0,0 +1,12 @@
+if TARGET_VINCO
+
+config SYS_BOARD
+	default "vinco"
+
+config SYS_VENDOR
+	default "l+g"
+
+config SYS_CONFIG_NAME
+	default "vinco"
+
+endif
board/l+g/vinco/Makefile new file +1 -0
new file mode 100644
index 0000000..a2b8a2b
@@ -0,0 +1 @@
+obj-y += vinco.o
board/l+g/vinco/vinco.c new file +212 -0
new file mode 100644
index 0000000..3d7af09
@@ -0,0 +1,212 @@
+/*
+ * Board file for the VInCo platform
+ * Based on the the SAMA5-EK board file
+ * Configuration settings for the VInCo platform.
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_usba_udc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/sama5d3_smc.h>
+#include <asm/arch/sama5d4.h>
+#include <atmel_hlcdc.h>
+#include <atmel_mci.h>
+#include <lcd.h>
+#include <mmc.h>
+#include <net.h>
+#include <netdev.h>
+#include <nand.h>
+#include <spi.h>
+#include <version.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_ATMEL_SPI
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
+}
+
+static void vinco_spi0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* SPI0_MISO */
+	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* SPI0_MOSI */
+	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* SPI0_SPCK */
+
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);	/* SPI0_CS0 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
+}
+#endif /* CONFIG_ATMEL_SPI */
+
+
+#ifdef CONFIG_CMD_USB
+static void vinco_usb_hw_init(void)
+{
+	at91_set_pio_output(AT91_PIO_PORTE, 11, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 12, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 10, 0);
+}
+#endif
+
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+void vinco_mci0_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTC, 5, 1);	/* MCI0 CDA */
+	at91_set_b_periph(AT91_PIO_PORTC, 6, 1);	/* MCI0 DA0 */
+	at91_set_b_periph(AT91_PIO_PORTC, 7, 1);	/* MCI0 DA1 */
+	at91_set_b_periph(AT91_PIO_PORTC, 8, 1);	/* MCI0 DA2 */
+	at91_set_b_periph(AT91_PIO_PORTC, 9, 1);	/* MCI0 DA3 */
+	at91_set_b_periph(AT91_PIO_PORTC, 10, 1);	/* MCI0 DA4 */
+	at91_set_b_periph(AT91_PIO_PORTC, 11, 1);	/* MCI0 DA5 */
+	at91_set_b_periph(AT91_PIO_PORTC, 12, 1);	/* MCI0 DA6 */
+	at91_set_b_periph(AT91_PIO_PORTC, 13, 1);	/* MCI0 DA7 */
+	at91_set_b_periph(AT91_PIO_PORTC, 4, 0);	/* MCI0 CLK */
+
+	/*
+	 * As the mci io internal pull down is too strong, so if the io needs
+	 * external pull up, the pull up resistor will be very small, if so
+	 * the power consumption will increase, so disable the interanl pull
+	 * down to save the power.
+	 */
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0);
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_MCI0);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	/* Enable power for MCI0 interface */
+	at91_set_pio_output(AT91_PIO_PORTE, 7, 1);
+
+	return atmel_mci_init((void *)ATMEL_BASE_MCI0);
+}
+#endif /* CONFIG_GENERIC_ATMEL_MCI */
+
+#ifdef CONFIG_MACB
+void vinco_macb0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTB, 0, 0);	/* ETXCK_EREFCK */
+	at91_set_a_periph(AT91_PIO_PORTB, 6, 0);	/* ERXDV */
+	at91_set_a_periph(AT91_PIO_PORTB, 8, 0);	/* ERX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 9, 0);	/* ERX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 7, 0);	/* ERXER */
+	at91_set_a_periph(AT91_PIO_PORTB, 2, 0);	/* ETXEN */
+	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* ETX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 13, 0);	/* ETX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 17, 0);	/* EMDIO */
+	at91_set_a_periph(AT91_PIO_PORTB, 16, 0);	/* EMDC */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_GMAC0);
+
+	/* Enable Phy*/
+	at91_set_pio_output(AT91_PIO_PORTE, 8, 1);
+}
+#endif
+
+static void vinco_serial3_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTE, 17, 1);	/* TXD3 */
+	at91_set_b_periph(AT91_PIO_PORTE, 16, 0);	/* RXD3 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_USART3);
+}
+
+int board_early_init_f(void)
+{
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
+	at91_periph_clk_enable(ATMEL_ID_PIOE);
+
+	vinco_serial3_hw_init();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_ATMEL_SPI
+	vinco_spi0_hw_init();
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+	vinco_mci0_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	vinco_macb0_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+	vinco_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	at91_udp_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00);
+#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	usba_udc_probe(&pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+	usb_eth_initialize(bis);
+#endif
+#endif
+
+	return rc;
+}
configs/vinco_defconfig new file +13 -0
new file mode 100644
index 0000000..7cae79b
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_VINCO=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_SYS_PROMPT="vinco => "
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
include/configs/vinco.h new file +169 -0
new file mode 100644
index 0000000..b96150e
@@ -0,0 +1,169 @@
+/*
+ * Configuration settings for the VInCo platform.
+ *
+ * Based on the settings for the SAMA5-EK board
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT gregory.clement at free-electrons.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* No NOR flash, this definition should be put before common header */
+#define CONFIG_SYS_NO_FLASH
+
+#include "at91-sama5_common.h"
+
+/* The value in the common file is too far away for the VInCo platform */
+#ifdef CONFIG_SYS_TEXT_BASE
+#undef CONFIG_SYS_TEXT_BASE
+#endif
+#define CONFIG_SYS_TEXT_BASE		0x20f00000
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_USART3
+#define	CONFIG_USART_ID			ATMEL_ID_USART3
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE		0x4000000
+
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
+
+/* SerialFlash */
+#define CONFIG_CMD_SF
+
+#ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_ATMEL_SPI0
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_BUS		0
+#define CONFIG_SF_DEFAULT_CS		0
+#define CONFIG_SF_DEFAULT_SPEED		50000000
+#define CONFIG_ENV_SPI_MAX_HZ		50000000
+#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
+#define CONFIG_ENV_SPI_MODE		(SPI_MODE_0)
+#endif
+
+
+/* MMC */
+#define CONFIG_CMD_MMC
+
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI1
+#define CONFIG_SYS_MMC_CLK_OD		500000
+
+/* For generating MMC partitions */
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_RANDOM_UUID
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_GPT
+
+#endif
+
+/* USB */
+#define CONFIG_CMD_USB
+
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
+#define CONFIG_USB_STORAGE
+#endif
+
+/* USB device */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_ATMEL_USBA
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
+
+#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/* Ethernet Hardware */
+#define CONFIG_PHYLIB
+#define CONFIG_CMD_MII
+#define CONFIG_PHY_SMSC
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_MACB_SEARCH_PHY
+
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_RNDIS
+
+
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+/* bootstrap + u-boot + env + linux in serial flash */
+#define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
+/* Use our own mapping for the VInCo platform */
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_ENV_SIZE
+
+#define CONFIG_ENV_OFFSET       0x10000
+#define CONFIG_ENV_SIZE         0x10000
+
+/* Update the bootcommand according to our mapping for the VInCo platform */
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND  "mmc dev 0 0;" \
+			    "mmc read ${loadaddr} ${k_offset} ${k_blksize};" \
+			    "mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \
+			    "bootz ${loadaddr} -  ${oftaddr}"
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS	    "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"kernel_start=0x20000\0" \
+	"kernel_size=0x800000\0" \
+	"mmcblksize=0x200\0" \
+	"oftaddr=0x21000000\0" \
+	"loadaddr=0x22000000\0" \
+	"update_uboot=tftp ${loadaddr} u-boot.bin;sf probe 0;" \
+	"sf erase 0x20000 0x4B000; sf write ${loadaddr} 0x20000 0x4B000\0" \
+	"create_partition=setexpr dtb_start ${kernel_start} + 0x400000;" \
+	"setexpr rootfs_start ${kernel_start} + ${kernel_size};" \
+	"setenv partitions 'name=kernel,size=${kernel_size}," \
+	"start=${kernel_start};name=rootfs,size=-';" \
+	"gpt write mmc 0 ${partitions} \0"\
+	"f2blk_size=setexpr fileblksize ${filesize} / ${mmcblksize};" \
+	"setexpr fileblksize ${fileblksize} + 1\0" \
+	"store_kernel=tftp ${loadaddr} zImage; run f2blk_size;" \
+	"setexpr k_blksize ${fileblksize};" \
+	"setexpr k_offset ${kernel_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${k_offset} ${fileblksize}\0" \
+	"store_dtb=tftp ${loadaddr} at91-vinco.dtb; run f2blk_size;" \
+	"setexpr dtb_blksize ${fileblksize};" \
+	"setexpr dtb_offset ${dtb_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${dtb_offset} ${fileblksize}\0" \
+	"store_rootfs=tftp ${loadaddr} vinco-gateway-image-vinco.ext4;" \
+	"setexpr rootfs_offset ${rootfs_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${rootfs_offset} ${fileblksize}\0" \
+	"bootdelay=0\0"
+
+#endif
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#endif
+
Signature · 1 line
2.5.0
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#4 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

In reply to Gregory CLEMENT

Hi Gregory,

Quoted 177 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

---
Hi again,

Some of my fixes were not commit in my previous version.

This version should be the correct one, I also added the acked-by from Nicolas.

Sorry for not having seen it before.

Thanks,

Gregory

arch/arm/mach-at91/Kconfig | 6 ++

 board/l+g/vinco/Kconfig    |  12 +++
 board/l+g/vinco/Makefile   |   1 +
 board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
 configs/vinco_defconfig    |  13 +++
 include/configs/vinco.h    | 169 ++++++++++++++++++++++++++++++++++++
 6 files changed, 413 insertions(+)
 create mode 100644 board/l+g/vinco/Kconfig
 create mode 100644 board/l+g/vinco/Makefile
 create mode 100644 board/l+g/vinco/vinco.c
 create mode 100644 configs/vinco_defconfig
 create mode 100644 include/configs/vinco.h
arch/arm/mach-at91/Kconfig +6 -0
index c333647..3dfbb5f 100644
@@ -114,6 +114,11 @@ config TARGET_SMARTWEB
 	select CPU_ARM926EJS
 	select SUPPORT_SPL
 
+config TARGET_VINCO
+	bool "Support VINCO"
+	select CPU_V7
+	select SUPPORT_SPL
+
 endchoice
 
 config SYS_SOC
@@ -136,6 +141,7 @@ source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/egnite/ethernut5/Kconfig"
 source "board/esd/meesc/Kconfig"
+source "board/l+g/vinco/Kconfig"
 source "board/mini-box/picosam9g45/Kconfig"
 source "board/ronetix/pm9261/Kconfig"
 source "board/ronetix/pm9263/Kconfig"
board/l+g/vinco/Kconfig new file +12 -0
new file mode 100644
index 0000000..229b5ea
@@ -0,0 +1,12 @@
+if TARGET_VINCO
+
+config SYS_BOARD
+	default "vinco"
+
+config SYS_VENDOR
+	default "l+g"
+
+config SYS_CONFIG_NAME
+	default "vinco"
+
+endif
board/l+g/vinco/Makefile new file +1 -0
new file mode 100644
index 0000000..a2b8a2b
@@ -0,0 +1 @@
+obj-y += vinco.o
board/l+g/vinco/vinco.c new file +83 -0
new file mode 100644
index 0000000..3d7af09
@@ -0,0 +1,212 @@
+/*
+ * Board file for the VInCo platform
+ * Based on the the SAMA5-EK board file
+ * Configuration settings for the VInCo platform.
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_usba_udc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/sama5d3_smc.h>
+#include <asm/arch/sama5d4.h>
+#include <atmel_hlcdc.h>
+#include <atmel_mci.h>
+#include <lcd.h>
+#include <mmc.h>
+#include <net.h>
+#include <netdev.h>
+#include <nand.h>
+#include <spi.h>
+#include <version.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_ATMEL_SPI
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
+}
+
+static void vinco_spi0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* SPI0_MISO */
+	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* SPI0_MOSI */
+	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* SPI0_SPCK */
+
+	at91_set_pio_output(AT91_PIO_PORTC, 3, 1);	/* SPI0_CS0 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
+}
+#endif /* CONFIG_ATMEL_SPI */
+
+
+#ifdef CONFIG_CMD_USB
+static void vinco_usb_hw_init(void)
+{
+	at91_set_pio_output(AT91_PIO_PORTE, 11, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 12, 0);
+	at91_set_pio_output(AT91_PIO_PORTE, 10, 0);
+}
+#endif
+
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+void vinco_mci0_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTC, 5, 1);	/* MCI0 CDA */
+	at91_set_b_periph(AT91_PIO_PORTC, 6, 1);	/* MCI0 DA0 */
+	at91_set_b_periph(AT91_PIO_PORTC, 7, 1);	/* MCI0 DA1 */
+	at91_set_b_periph(AT91_PIO_PORTC, 8, 1);	/* MCI0 DA2 */
+	at91_set_b_periph(AT91_PIO_PORTC, 9, 1);	/* MCI0 DA3 */

board/l+g/vinco/vinco.c line 93

Quoted 10 lines
board/l+g/vinco/vinco.c new file +10 -0
+	at91_set_b_periph(AT91_PIO_PORTC, 10, 1);	/* MCI0 DA4 */
+	at91_set_b_periph(AT91_PIO_PORTC, 11, 1);	/* MCI0 DA5 */
+	at91_set_b_periph(AT91_PIO_PORTC, 12, 1);	/* MCI0 DA6 */
+	at91_set_b_periph(AT91_PIO_PORTC, 13, 1);	/* MCI0 DA7 */
+	at91_set_b_periph(AT91_PIO_PORTC, 4, 0);	/* MCI0 CLK */
+
+	/*
+	 * As the mci io internal pull down is too strong, so if the io needs
+	 * external pull up, the pull up resistor will be very small, if so
+	 * the power consumption will increase, so disable the interanl pull

internal

Quoted 144 lines
board/l+g/vinco/vinco.c new file +119 -0
+	 * down to save the power.
+	 */
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 4, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 5, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 6, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 7, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 8, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 9, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 10, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 11, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 12, 0);
+	at91_set_pio_pulldown(AT91_PIO_PORTC, 13, 0);
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_MCI0);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	/* Enable power for MCI0 interface */
+	at91_set_pio_output(AT91_PIO_PORTE, 7, 1);
+
+	return atmel_mci_init((void *)ATMEL_BASE_MCI0);
+}
+#endif /* CONFIG_GENERIC_ATMEL_MCI */
+
+#ifdef CONFIG_MACB
+void vinco_macb0_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTB, 0, 0);	/* ETXCK_EREFCK */
+	at91_set_a_periph(AT91_PIO_PORTB, 6, 0);	/* ERXDV */
+	at91_set_a_periph(AT91_PIO_PORTB, 8, 0);	/* ERX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 9, 0);	/* ERX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 7, 0);	/* ERXER */
+	at91_set_a_periph(AT91_PIO_PORTB, 2, 0);	/* ETXEN */
+	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* ETX0 */
+	at91_set_a_periph(AT91_PIO_PORTB, 13, 0);	/* ETX1 */
+	at91_set_a_periph(AT91_PIO_PORTB, 17, 0);	/* EMDIO */
+	at91_set_a_periph(AT91_PIO_PORTB, 16, 0);	/* EMDC */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_GMAC0);
+
+	/* Enable Phy*/
+	at91_set_pio_output(AT91_PIO_PORTE, 8, 1);
+}
+#endif
+
+static void vinco_serial3_hw_init(void)
+{
+	at91_set_b_periph(AT91_PIO_PORTE, 17, 1);	/* TXD3 */
+	at91_set_b_periph(AT91_PIO_PORTE, 16, 0);	/* RXD3 */
+
+	/* Enable clock */
+	at91_periph_clk_enable(ATMEL_ID_USART3);
+}
+
+int board_early_init_f(void)
+{
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
+	at91_periph_clk_enable(ATMEL_ID_PIOE);
+
+	vinco_serial3_hw_init();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_ATMEL_SPI
+	vinco_spi0_hw_init();
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+	vinco_mci0_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	vinco_macb0_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+	vinco_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	at91_udp_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC0, 0x00);
+#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+	usba_udc_probe(&pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+	usb_eth_initialize(bis);
+#endif
+#endif
+
+	return rc;
+}
configs/vinco_defconfig new file +13 -0
new file mode 100644
index 0000000..7cae79b
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_VINCO=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_SYS_PROMPT="vinco => "
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
include/configs/vinco.h new file +0 -0
new file mode 100644
index 0000000..b96150e

include/configs/vinco.h line 8

Quoted 8 lines
include/configs/vinco.h new file +8 -0
@@ -0,0 +1,169 @@
+/*
+ * Configuration settings for the VInCo platform.
+ *
+ * Based on the settings for the SAMA5-EK board
+ * Copyright (C) 2014 Atmel
+ *		      Bo Shen <[email protected]>
+ * Copyright (C) 2015 Free Electrons
+ *		      Gregory CLEMENT gregory.clement at free-electrons.com

Mail address in <>

Quoted 12 lines
include/configs/vinco.h new file +12 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* No NOR flash, this definition should be put before common header */
+#define CONFIG_SYS_NO_FLASH
+
+#include "at91-sama5_common.h"
+

include/configs/vinco.h line 30

Quoted 10 lines
include/configs/vinco.h new file +10 -0
+/* The value in the common file is too far away for the VInCo platform */
+#ifdef CONFIG_SYS_TEXT_BASE
+#undef CONFIG_SYS_TEXT_BASE
+#endif
+#define CONFIG_SYS_TEXT_BASE		0x20f00000
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_USART3
+#define	CONFIG_USART_ID			ATMEL_ID_USART3

Could you please directly use the DM_SERIAL here? Unfortunately no AT91 based board has this implemented yet, but the driver is prepared and it should be quiet easy.

Quoted 95 lines
include/configs/vinco.h new file +95 -0
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE		0x4000000
+
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
+
+/* SerialFlash */
+#define CONFIG_CMD_SF
+
+#ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_ATMEL_SPI0
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_BUS		0
+#define CONFIG_SF_DEFAULT_CS		0
+#define CONFIG_SF_DEFAULT_SPEED		50000000
+#define CONFIG_ENV_SPI_MAX_HZ		50000000
+#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
+#define CONFIG_ENV_SPI_MODE		(SPI_MODE_0)
+#endif
+
+
+/* MMC */
+#define CONFIG_CMD_MMC
+
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI1
+#define CONFIG_SYS_MMC_CLK_OD		500000
+
+/* For generating MMC partitions */
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_RANDOM_UUID
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_GPT
+
+#endif
+
+/* USB */
+#define CONFIG_CMD_USB
+
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
+#define CONFIG_USB_STORAGE
+#endif
+
+/* USB device */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_ATMEL_USBA
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
+
+#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/* Ethernet Hardware */
+#define CONFIG_PHYLIB
+#define CONFIG_CMD_MII
+#define CONFIG_PHY_SMSC
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_MACB_SEARCH_PHY
+
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_RNDIS
+
+
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+/* bootstrap + u-boot + env + linux in serial flash */
+#define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
+/* Use our own mapping for the VInCo platform */
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_ENV_SIZE
+
+#define CONFIG_ENV_OFFSET       0x10000
+#define CONFIG_ENV_SIZE         0x10000

include/configs/vinco.h line 135

Quoted 10 lines
include/configs/vinco.h new file +10 -0
+
+/* Update the bootcommand according to our mapping for the VInCo platform */
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND  "mmc dev 0 0;" \
+			    "mmc read ${loadaddr} ${k_offset} ${k_blksize};" \
+			    "mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \
+			    "bootz ${loadaddr} -  ${oftaddr}"
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS	    "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"

Is the lpj a leftover or is it intended?

Quoted 25 lines
include/configs/vinco.h new file +24 -0
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"kernel_start=0x20000\0" \
+	"kernel_size=0x800000\0" \
+	"mmcblksize=0x200\0" \
+	"oftaddr=0x21000000\0" \
+	"loadaddr=0x22000000\0" \
+	"update_uboot=tftp ${loadaddr} u-boot.bin;sf probe 0;" \
+	"sf erase 0x20000 0x4B000; sf write ${loadaddr} 0x20000 0x4B000\0" \
+	"create_partition=setexpr dtb_start ${kernel_start} + 0x400000;" \
+	"setexpr rootfs_start ${kernel_start} + ${kernel_size};" \
+	"setenv partitions 'name=kernel,size=${kernel_size}," \
+	"start=${kernel_start};name=rootfs,size=-';" \
+	"gpt write mmc 0 ${partitions} \0"\
+	"f2blk_size=setexpr fileblksize ${filesize} / ${mmcblksize};" \
+	"setexpr fileblksize ${fileblksize} + 1\0" \
+	"store_kernel=tftp ${loadaddr} zImage; run f2blk_size;" \
+	"setexpr k_blksize ${fileblksize};" \
+	"setexpr k_offset ${kernel_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${k_offset} ${fileblksize}\0" \
+	"store_dtb=tftp ${loadaddr} at91-vinco.dtb; run f2blk_size;" \
+	"setexpr dtb_blksize ${fileblksize};" \
+	"setexpr dtb_offset ${dtb_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${dtb_offset} ${fileblksize}\0" \

include/configs/vinco.h line 169

Quoted 10 lines
include/configs/vinco.h new file +10 -0
+	"store_rootfs=tftp ${loadaddr} vinco-gateway-image-vinco.ext4;" \
+	"setexpr rootfs_offset ${rootfs_start} / ${mmcblksize};" \
+	"mmc write ${fileaddr} ${rootfs_offset} ${fileblksize}\0" \
+	"bootdelay=0\0"
+
+#endif
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#endif
+

Andreas

#5 lore raw

v4 cover ARM: at91: improve peripheral and system clock handle functions

To reduce the duplicated code, rework the peripheral's and system's clock handle functions, use these functions to replace the clock handle code.

Changes in v4:
- due to PMC_PECR1 avaiable when has CPU_HAS_PCR, remove &pmc->pcer1 and &pmc->pcdr1.

Changes in v3:
- fix incorrectly used the indicator '&' to achieve the variable pointer of pmc->pcer and pmc->pcdr.

Changes in v2:
- fix checkpatch warning.

Wenyou Yang (5):
ARM: at91: asm/at91_pmc.h: fix trival register offset
ARM: at91: clock: add a new file to handle clock
ARM: cpu: at91: clean up peripheral clock code
board: atmel: clean up peripheral clock code
drivers: at91: clean up peripheral clock code

 arch/arm/mach-at91/Makefile                        |    1 +
 arch/arm/mach-at91/arm920t/at91rm9200_devices.c    |   13 +---
 arch/arm/mach-at91/arm920t/timer.c                 |    4 +-
 arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c |   36 +++--------
 arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c |   28 +++------
 arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c |   37 +++--------
 .../mach-at91/arm926ejs/at91sam9m10g45_devices.c   |   33 +++-------
 arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c |   40 +++---------
 arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c  |   28 +++------
 arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c  |   38 +++--------
 arch/arm/mach-at91/arm926ejs/clock.c               |    7 ---
 arch/arm/mach-at91/arm926ejs/cpu.c                 |    1 -
 arch/arm/mach-at91/arm926ejs/timer.c               |    5 +-
 arch/arm/mach-at91/armv7/clock.c                   |   26 --------
 arch/arm/mach-at91/armv7/cpu.c                     |    1 -
 arch/arm/mach-at91/armv7/timer.c                   |    1 -
 arch/arm/mach-at91/clock.c                         |   66 ++++++++++++++++++++
 arch/arm/mach-at91/include/mach/at91_pmc.h         |    8 +--
 arch/arm/mach-at91/include/mach/clk.h              |    2 +
 arch/arm/mach-at91/phy.c                           |    1 -
 arch/arm/mach-at91/sdram.c                         |    1 -
 board/atmel/at91rm9200ek/at91rm9200ek.c            |    1 -
 board/atmel/at91rm9200ek/led.c                     |    5 +-
 board/atmel/at91sam9260ek/at91sam9260ek.c          |   15 ++---
 board/atmel/at91sam9261ek/at91sam9261ek.c          |    8 +--
 board/atmel/at91sam9261ek/led.c                    |    6 +-
 board/atmel/at91sam9263ek/at91sam9263ek.c          |   23 +++----
 board/atmel/at91sam9263ek/led.c                    |    9 +--
 board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c    |   20 ++----
 board/atmel/at91sam9m10g45ek/led.c                 |    7 +--
 board/atmel/at91sam9n12ek/at91sam9n12ek.c          |    6 +-
 board/atmel/at91sam9rlek/at91sam9rlek.c            |   18 ++----
 board/atmel/at91sam9rlek/led.c                     |    7 +--
 board/atmel/at91sam9x5ek/at91sam9x5ek.c            |   10 +--
 board/atmel/sama5d2_xplained/sama5d2_xplained.c    |    1 -
 board/atmel/sama5d3_xplained/sama5d3_xplained.c    |    5 +-
 board/atmel/sama5d3xek/sama5d3xek.c                |    5 +-
 board/atmel/sama5d4_xplained/sama5d4_xplained.c    |    5 +-
 board/atmel/sama5d4ek/sama5d4ek.c                  |    5 +-
 board/bluewater/snapper9260/snapper9260.c          |   15 ++---
 board/calao/usb_a9263/usb_a9263.c                  |   11 ++--
 board/egnite/ethernut5/ethernut5.c                 |   20 +++---
 board/esd/meesc/meesc.c                            |   15 ++---
 board/mini-box/picosam9g45/led.c                   |    7 +--
 board/mini-box/picosam9g45/picosam9g45.c           |   17 ++---
 board/ronetix/pm9261/led.c                         |    7 +--
 board/ronetix/pm9261/pm9261.c                      |   22 ++-----
 board/ronetix/pm9263/led.c                         |    7 +--
 board/ronetix/pm9263/pm9263.c                      |   19 ++----
 board/ronetix/pm9g45/pm9g45.c                      |   20 ++----
 board/siemens/corvus/board.c                       |    6 +-
 board/siemens/smartweb/smartweb.c                  |    3 +-
 board/siemens/taurus/taurus.c                      |    3 +-
 drivers/net/at91_emac.c                            |    9 ++-
 drivers/usb/host/ehci-atmel.c                      |    8 ---
 drivers/usb/host/ohci-at91.c                       |   20 ++----
 56 files changed, 246 insertions(+), 496 deletions(-)
 create mode 100644 arch/arm/mach-at91/clock.c
Signature · 1 line
1.7.9.5
#6 lore raw

PATCH v4 1/5 ARM: at91: asm/at91_pmc.h: fix trival register offset

Remove unnecessary #ifdef CPU_HAS_PCR.

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/include/mach/at91_pmc.h |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)
arch/arm/mach-at91/include/mach/at91_pmc.h +2 -6
index 3f50f77..eb40194 100644
@@ -51,19 +51,15 @@ typedef struct at91_pmc {
 	u32	imr;		/* 0x6C Interrupt Mask Register */
 	u32	reserved4[4];
 	u32	pllicpr;	/* 0x80 Change Pump Current Register (SAM9) */
-	u32	reserved5[21];
+	u32	reserved5[24];
 	u32	wpmr;		/* 0xE4 Write Protect Mode Register (CAP0) */
 	u32	wpsr;		/* 0xE8 Write Protect Status Register (CAP0) */
-#ifdef CPU_HAS_PCR
-	u32	reserved6[8];
+	u32	reserved6[5];
 	u32	pcer1;		/* 0x100 Periperial Clock Enable Register 1 */
 	u32	pcdr1;		/* 0x104 Periperial Clock Disable Register 1 */
 	u32	pcsr1;		/* 0x108 Periperial Clock Status Register 1 */
 	u32	pcr;		/* 0x10c Periperial Control Register */
 	u32	ocr;		/* 0x110 Oscillator Calibration Register */
-#else
-	u32	reserved8[5];
-#endif
 } at91_pmc_t;
 
 #endif	/* end not assembly */
Signature · 1 line
1.7.9.5
#7 lore raw

PATCH v4 1/5 ARM: at91: asm/at91_pmc.h: fix trival register offset

Dear Wenyou Yang,

Quoted 5 lines · Wenyou Yang

Remove unnecessary #ifdef CPU_HAS_PCR.

Quoted 8 lines

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

arch/arm/mach-at91/include/mach/at91_pmc.h | 8 ++------

1 file changed, 2 insertions(+), 6 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#8 lore raw

PATCH v4 2/5 ARM: at91: clock: add a new file to handle clock

Dear Wenyou Yang,

Quoted 19 lines · Wenyou Yang

To reduce the duplicated code, add a new file to accommodate the peripheral's and system's clock handle code, shared with the SoCs with different ARM core.

---

Changes in v4:
- due to PMC_PECR1 avaiable when has CPU_HAS_PCR, remove &pmc->pcer1 and &pmc->pcdr1.

Changes in v3:
- fix incorrectly used the indicator '&' to achieve the variable pointer of pmc->pcer and pmc->pcdr.

Changes in v2: None

Quoted 7 lines
arch/arm/mach-at91/Makefile           |    1 +
arch/arm/mach-at91/arm926ejs/clock.c  |    7 ----
arch/arm/mach-at91/armv7/clock.c      |   26 -------------
arch/arm/mach-at91/clock.c            |   66 +++++++++++++++++++++++++++++++++
arch/arm/mach-at91/include/mach/clk.h |    2 +
5 files changed, 69 insertions(+), 33 deletions(-)

create mode 100644 arch/arm/mach-at91/clock.c

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#9 lore raw

PATCH v4 3/5 ARM: cpu: at91: clean up peripheral clock code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 11 lines · Wenyou Yang

Due to introducing the new peripheral clock handle functions, use these functions to clean up the duplicated code.

Meanwhile, remove unneeded header file include, at91_pmc.h.

---

Quoted 16 lines
arch/arm/mach-at91/arm920t/at91rm9200_devices.c    | 14 +++-----
arch/arm/mach-at91/arm920t/timer.c                 |  6 ++--
arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c | 36 +++++--------------
arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c | 28 ++++-----------
arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c | 37 +++++---------------
.../mach-at91/arm926ejs/at91sam9m10g45_devices.c   | 33 +++++-------------
arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c | 40 ++++++----------------
arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c  | 28 ++++-----------
arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c  | 38 ++++++--------------
arch/arm/mach-at91/arm926ejs/cpu.c                 |  1 -
arch/arm/mach-at91/arm926ejs/timer.c               |  5 +--
arch/arm/mach-at91/armv7/cpu.c                     |  1 -
arch/arm/mach-at91/armv7/timer.c                   |  1 -
arch/arm/mach-at91/phy.c                           |  1 -
arch/arm/mach-at91/sdram.c                         |  1 -
15 files changed, 67 insertions(+), 203 deletions(-)

applied to u-boot-atmel/master, thanks!

I had to fix the arm920t code for clean build of
at91rm9200ek boards.

Best regards,
Andreas Bie?mann

#10 lore raw

PATCH v4 4/5 board: atmel: clean up peripheral clock code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 33 lines · Wenyou Yang

Due to introducing the new peripheral clock handle functions, use these functions to reduce duplicated code.

[Rebased on current master, fixup for at91rm9200ek]

---

board/atmel/at91rm9200ek/at91rm9200ek.c         |  1 -
board/atmel/at91rm9200ek/led.c                  |  6 ++----
board/atmel/at91sam9260ek/at91sam9260ek.c       | 15 +++++----------
board/atmel/at91sam9261ek/at91sam9261ek.c       |  8 ++------
board/atmel/at91sam9261ek/led.c                 |  6 ++----
board/atmel/at91sam9263ek/at91sam9263ek.c       | 23 +++++++----------------
board/atmel/at91sam9263ek/led.c                 |  9 +++------
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 20 +++++---------------
board/atmel/at91sam9m10g45ek/led.c              |  7 ++-----
board/atmel/at91sam9n12ek/at91sam9n12ek.c       |  6 ++----
board/atmel/at91sam9rlek/at91sam9rlek.c         | 18 ++++++------------
board/atmel/at91sam9rlek/led.c                  |  7 ++-----
board/atmel/at91sam9x5ek/at91sam9x5ek.c         | 10 +++-------
board/atmel/sama5d2_xplained/sama5d2_xplained.c |  1 -
board/atmel/sama5d3_xplained/sama5d3_xplained.c |  5 ++---
board/atmel/sama5d3xek/sama5d3xek.c             |  5 ++---
board/atmel/sama5d4_xplained/sama5d4_xplained.c |  5 ++---
board/atmel/sama5d4ek/sama5d4ek.c               |  5 ++---
board/bluewater/snapper9260/snapper9260.c       | 15 +++++----------
board/calao/usb_a9263/usb_a9263.c               | 11 ++++-------
board/egnite/ethernut5/ethernut5.c              | 20 ++++++++------------
board/esd/meesc/meesc.c                         | 15 ++++++---------
board/mini-box/picosam9g45/led.c                |  7 ++-----
board/mini-box/picosam9g45/picosam9g45.c        | 17 ++++-------------
board/ronetix/pm9261/led.c                      |  7 ++-----
Quoted 8 lines
board/ronetix/pm9261/pm9261.c                   | 22 ++++++----------------
board/ronetix/pm9263/led.c                      |  7 ++-----
board/ronetix/pm9263/pm9263.c                   | 19 +++++--------------
board/ronetix/pm9g45/pm9g45.c                   | 20 ++++++--------------
board/siemens/corvus/board.c                    |  6 ++----
board/siemens/smartweb/smartweb.c               |  3 +--
board/siemens/taurus/taurus.c                   |  3 +--
32 files changed, 103 insertions(+), 226 deletions(-)

applied to u-boot-atmel/master, thanks!

I had to rebase and fix some includes for
at91rm9200ek board files.

Best regards,
Andreas Bie?mann

#11 lore raw

PATCH v4 5/5 drivers: at91: clean up peripheral clock code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 7 lines · Wenyou Yang

Due to introducing the new peripheral clock handle functions, use these functions to reduce the duplicated code.

[fixup for missing clk.h in at91_emac.c]
Quoted 5 lines

---

drivers/net/at91_emac.c       | 10 +++++-----
drivers/usb/host/ehci-atmel.c |  8 --------
drivers/usb/host/ohci-at91.c  | 20 ++++----------------
3 files changed, 9 insertions(+), 29 deletions(-)

applied to u-boot-atmel/master, thanks!

I had to add the asm/arch/clk.h in at91_emac.c for
clean build of this patch.

Best regards,
Andreas Bie?mann

#12 lore raw

PATCH v3 1/4 ARM: at91: clock: add UTMI PLL enable/disable function

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 6 lines · Wenyou Yang

To avoid the duplicated code, add the UTMI PLL handle functions, and add PMC_USB init function too.

Quoted 8 lines

---

Changes in v3: None
Changes in v2: None

arch/arm/mach-at91/clock.c | 48 +++++++++++++++++++++++++++++++++
arch/arm/mach-at91/include/mach/clk.h | 3 +++

2 files changed, 51 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#13 lore raw

PATCH v3 2/4 ARM: at91: armv7: clean up UTMI PLL handle code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 8 lines · Wenyou Yang

Due to introducing the UTMI PLL enable function, use this function to reduce the duplicated code.

---

Quoted 7 lines

Changes in v3: None
Changes in v2: None

arch/arm/mach-at91/armv7/sama5d2_devices.c |    5 +----
arch/arm/mach-at91/armv7/sama5d3_devices.c |    5 +----
arch/arm/mach-at91/armv7/sama5d4_devices.c |    5 +----
3 files changed, 3 insertions(+), 12 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#14 lore raw

PATCH v3 3/4 drivers: usb: atmel: clean up the UTMI PLL code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 8 lines · Wenyou Yang

Due to introducing the new UTMI PLL clock handle functions, use these function to reduce the duplicated code.

---

Quoted 7 lines

Changes in v3: None
Changes in v2:
- remain asm/io.h include.

drivers/usb/host/ehci-atmel.c |   38 ++++----------------------------------
drivers/usb/host/ohci-at91.c  |   20 +++++++-------------
2 files changed, 11 insertions(+), 47 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#15 lore raw

PATCH v3 4/4 board: atmel: siemens: clean up UTMI PLL code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 8 lines · Wenyou Yang

Due to introducing the new UTMI PLL clock handle functions, use the functions to reduce the duplicated code.

---

Quoted 7 lines

Changes in v3:
- collect Tested-by from Heiko Schocher.

Changes in v2: None

board/siemens/corvus/board.c | 4 +---

1 file changed, 1 insertion(+), 3 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#16 lore raw

PATCH v4 1/3 ARM: at91: clock: add PLLB enable/disable functions

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 7 lines · Wenyou Yang

To avoid the duplicated code, add the PLLB handle functions.

Quoted 5 lines

---

arch/arm/mach-at91/arm920t/clock.c    | 38 +++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/arm926ejs/clock.c  | 38 +++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/include/mach/clk.h |  2 ++
3 files changed, 78 insertions(+)

applied to u-boot-atmel/master, thanks!

I had to add the newly introduced enable/disable
functions for arm920t for clean build of later patches.

Best regards,
Andreas Bie?mann

#17 lore raw

PATCH v4 2/3 drivers: usb: ohci-at91: clean up the PLLB code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 12 lines · Wenyou Yang

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable/disable code.

---

Changes in v4: None
Changes in v3:
- collect Reviewed-by from Andreas.

Quoted 5 lines

Changes in v2:
- add return value for timeout checking at91_pllb_clk_enable/disable().

drivers/usb/host/ohci-at91.c | 22 +++++++---------------

1 file changed, 7 insertions(+), 15 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#18 lore raw

PATCH v4 3/3 board: atmel: siemens: clean up PLLB code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 11 lines · Wenyou Yang

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable code.

---

Changes in v4:
- collect Tested-by from Heiko Schocher.

Quoted 7 lines

Changes in v3: None
Changes in v2:
- collect Reviewed-by from Andreas.

board/siemens/smartweb/smartweb.c |    6 +-----
board/siemens/taurus/taurus.c     |    6 +-----
2 files changed, 2 insertions(+), 10 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#19 lore raw

PATCH v3 1/3 ARM: at91: clock: add PMC_PLLICPR init function

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 12 lines · Wenyou Yang

To avoid the duplicated code, add the PMC_PLLICPR init function.

---

Changes in v3: None
Changes in v2:
- move at91_pllicpr_init() definition to the common file, clock.c.
- fix checkpatch errors.

Quoted 4 lines
arch/arm/mach-at91/clock.c                 |    7 +++++++
arch/arm/mach-at91/include/mach/at91_pmc.h |    7 +++++++
arch/arm/mach-at91/include/mach/clk.h      |    1 +
3 files changed, 15 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#20 lore raw

PATCH v3 2/3 ARM: at91: clean up the PMC_PLLICPR init code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 6 lines · Wenyou Yang

Due to introducing the PMC_PLLICPR init function, use this function to clean up the code.

Quoted 7 lines

---

Changes in v3: None
Changes in v2: None

arch/arm/mach-at91/spl_at91.c | 5 +----

1 file changed, 1 insertion(+), 4 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#21 lore raw

PATCH v3 3/3 board: atmel: clean up the PMC_PLLICPR init code

In reply to Andreas Bießmann

Dear Wenyou Yang,

Quoted 11 lines · Wenyou Yang

Due to introducing the PMC_PLLICPR init function, use this function to clean up the code.

---

Changes in v3:
- collect Tested-by from Heiko Schocher.

Quoted 7 lines

Changes in v2: None

board/atmel/sama5d3_xplained/sama5d3_xplained.c |    4 +---
board/atmel/sama5d3xek/sama5d3xek.c             |    4 +---
board/atmel/sama5d4_xplained/sama5d4_xplained.c |    4 +---
board/atmel/sama5d4ek/sama5d4ek.c               |    4 +---
4 files changed, 4 insertions(+), 12 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#22 lore raw

[U-Boot] siemens,at91: enable features for smartweb

In reply to Andreas Bießmann

Dear "Egli, Samuel",

Quoted 13 lines · Samuel Egli

From: Matthias Michel <[email protected]>

New features for smartweb:
* switch to hush command parser
* change autoboot stop to <ESC><ESC>
* allow to write ethaddr

Quoted 4 lines

---
configs/smartweb_defconfig | 5 ++++-
include/configs/smartweb.h | 14 ++++++++++----

2 files changed, 14 insertions(+), 5 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#23 lore raw

[U-Boot] arm: at91: Add support for DENX MA5D4 SoM and EVK

In reply to Andreas Bießmann

Dear Marek Vasut,

Quoted 21 lines · Marek Vasut

Add support for DENX MA5D4 SoM and MA5D4EVK board, based on the Atmel SAMA5D4 SoC. The SoM contains the SoC, eMMC, SPI NOR, SPI CAN controllers and DRAM, the baseboard contains UART connectors, ethernet port, microSD slot, LCD header, 2x CAN connector and a lot of expansion headers.

---
V2: Remove the BDI commands, that was just a development remnant
---

arch/arm/mach-at91/Kconfig      |   6 +
board/denx/ma5d4evk/Kconfig     |  12 ++
board/denx/ma5d4evk/MAINTAINERS |   6 +
board/denx/ma5d4evk/Makefile    |   7 +
board/denx/ma5d4evk/ma5d4evk.c  | 412 ++++++++++++++++++++++++++++++++++++++++
configs/ma5d4evk_defconfig      |  11 ++
include/configs/ma5d4evk.h      | 255 +++++++++++++++++++++++++
7 files changed, 709 insertions(+)
Quoted 6 lines

create mode 100644 board/denx/ma5d4evk/Kconfig create mode 100644 board/denx/ma5d4evk/MAINTAINERS create mode 100644 board/denx/ma5d4evk/Makefile create mode 100644 board/denx/ma5d4evk/ma5d4evk.c create mode 100644 configs/ma5d4evk_defconfig create mode 100644 include/configs/ma5d4evk.h

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#24 lore raw

PATCH v2 1/1 ARM: at91: sama5d2: configure the L2 cache memory

In reply to Andreas Bießmann

Dear Samuel Mescoff,

Quoted 12 lines · Samuel Mescoff

The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache memory.
Make sure it is configured as a L2 cache memory when booting from a SPL image.

Based on the commit b5ea95ef2b5b from the at91bootstrap repository.

---

Quoted 8 lines

Changes for v2:
- removed useless #ifdef CONFIG_SAMA5D2

arch/arm/mach-at91/atmel_sfr.c                | 7 +++++++
arch/arm/mach-at91/include/mach/at91_common.h | 1 +
arch/arm/mach-at91/include/mach/sama5_sfr.h   | 1 +
arch/arm/mach-at91/spl_atmel.c                | 4 ++++
4 files changed, 13 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

#25 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

In reply to Andreas Bießmann

Dear Gregory CLEMENT,

Quoted 21 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

---

arch/arm/mach-at91/Kconfig |   6 ++
board/l+g/vinco/Kconfig    |  12 +++
board/l+g/vinco/Makefile   |   1 +
board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
configs/vinco_defconfig    |  13 +++
include/configs/vinco.h    | 168 +++++++++++++++++++++++++++++++++++
6 files changed, 412 insertions(+)
Quoted 5 lines

create mode 100644 board/l+g/vinco/Kconfig
create mode 100644 board/l+g/vinco/Makefile
create mode 100644 board/l+g/vinco/vinco.c
create mode 100644 configs/vinco_defconfig
create mode 100644 include/configs/vinco.h

applied to u-boot-atmel/master, thanks!

I had to rebase and remove an empty newline at EOF
in vinco.h.

Best regards,
Andreas Bie?mann

#26 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

Hi Andreas,

Quoted 30 lines · Andreas Bie?mann

Dear Gregory CLEMENT,

Quoted 21 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

---

arch/arm/mach-at91/Kconfig |   6 ++
board/l+g/vinco/Kconfig    |  12 +++
board/l+g/vinco/Makefile   |   1 +
board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
configs/vinco_defconfig    |  13 +++
include/configs/vinco.h    | 168 +++++++++++++++++++++++++++++++++++
6 files changed, 412 insertions(+)
Quoted 5 lines

create mode 100644 board/l+g/vinco/Kconfig
create mode 100644 board/l+g/vinco/Makefile
create mode 100644 board/l+g/vinco/vinco.c
create mode 100644 configs/vinco_defconfig
create mode 100644 include/configs/vinco.h

Quoted 4 lines

applied to u-boot-atmel/master, thanks!

I had to rebase and remove an empty newline at EOF
in vinco.h.

Thanks!

Gregory

Quoted 3 lines

Best regards,
Andreas Bie?mann

Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#27 lore raw

PATCH v3 1/1 ARM: Add Support for the VInCo platform

Hi Gregory,

just ran another complete build an realized that you missed to add an MAINTAINERS entry for the vinco files:

---8<---
abiessmann@punisher % ./tools/buildman/buildman -o /tmp/uboot-build-atmel arm avr32
WARNING: no status info for 'ds414'
WARNING: no maintainers for 'ds414'
WARNING: no status info for 'ls1043aqds_lpuart'
WARNING: no maintainers for 'ls1043aqds_lpuart'
WARNING: no status info for 'vinco'
WARNING: no maintainers for 'vinco'
WARNING: no status info for 'evb-rk3036'
WARNING: no maintainers for 'evb-rk3036'
WARNING: no status info for 'hikey'
WARNING: no maintainers for 'hikey'
WARNING: no status info for 'kylin-rk3036'
WARNING: no maintainers for 'kylin-rk3036'
Building current source for 534 boards (8 threads, 1 job per thread) --->8---

Could you please send a followup patch?

Andreas

Quoted 47 lines · Gregory CLEMENT

Hi Andreas,

Quoted 30 lines · Andreas Bie?mann

Dear Gregory CLEMENT,

Quoted 21 lines · Gregory CLEMENT

The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

---

arch/arm/mach-at91/Kconfig |   6 ++
board/l+g/vinco/Kconfig    |  12 +++
board/l+g/vinco/Makefile   |   1 +
board/l+g/vinco/vinco.c    | 212 +++++++++++++++++++++++++++++++++++++++++++++
configs/vinco_defconfig    |  13 +++
include/configs/vinco.h    | 168 +++++++++++++++++++++++++++++++++++
6 files changed, 412 insertions(+)
Quoted 5 lines

create mode 100644 board/l+g/vinco/Kconfig
create mode 100644 board/l+g/vinco/Makefile
create mode 100644 board/l+g/vinco/vinco.c
create mode 100644 configs/vinco_defconfig
create mode 100644 include/configs/vinco.h

Quoted 4 lines

applied to u-boot-atmel/master, thanks!

I had to rebase and remove an empty newline at EOF
in vinco.h.

Thanks!

Gregory

Quoted 3 lines

Best regards,
Andreas Bie?mann

#28 lore raw

PATCH v4 2/5 ARM: at91: clock: add a new file to handle clock

In reply to Wenyou Yang

To reduce the duplicated code, add a new file to accommodate the peripheral's and system's clock handle code, shared with the SoCs with different ARM core.

---

Changes in v4:
- due to PMC_PECR1 avaiable when has CPU_HAS_PCR, remove &pmc->pcer1 and &pmc->pcdr1.

Changes in v3:
- fix incorrectly used the indicator '&' to achieve the variable pointer of pmc->pcer and pmc->pcdr.

Changes in v2: None

 arch/arm/mach-at91/Makefile           |    1 +
 arch/arm/mach-at91/arm926ejs/clock.c  |    7 ----
 arch/arm/mach-at91/armv7/clock.c      |   26 -------------
 arch/arm/mach-at91/clock.c            |   66 +++++++++++++++++++++++++++++++++
 arch/arm/mach-at91/include/mach/clk.h |    2 +
 5 files changed, 69 insertions(+), 33 deletions(-)
 create mode 100644 arch/arm/mach-at91/clock.c
arch/arm/mach-at91/Makefile +1 -0
index 5b89617..d071072 100644
@@ -14,6 +14,7 @@ obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
 obj-y += spl.o
 endif
 
+obj-y += clock.o
 obj-$(CONFIG_CPU_ARM920T)	+= arm920t/
 obj-$(CONFIG_CPU_ARM926EJS)	+= arm926ejs/
 obj-$(CONFIG_CPU_V7)		+= armv7/
arch/arm/mach-at91/arm926ejs/clock.c +0 -7
index 8d6934e..c8b5e10 100644
@@ -242,10 +242,3 @@ void at91_mck_init(u32 mckr)
 	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
 		;
 }
-
-void at91_periph_clk_enable(int id)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	writel(1 << id, &pmc->pcer);
-}
arch/arm/mach-at91/armv7/clock.c +0 -26
index 41dbf16..81e9f69 100644
@@ -150,32 +150,6 @@ void at91_mck_init(u32 mckr)
 		;
 }
 
-void at91_periph_clk_enable(int id)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	u32 regval;
-
-	if (id > AT91_PMC_PCR_PID_MASK)
-		return;
-
-	regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id;
-
-	writel(regval, &pmc->pcr);
-}
-
-void at91_periph_clk_disable(int id)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	u32 regval;
-
-	if (id > AT91_PMC_PCR_PID_MASK)
-		return;
-
-	regval = AT91_PMC_PCR_CMD_WRITE | id;
-
-	writel(regval, &pmc->pcr);
-}
-
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
arch/arm/mach-at91/clock.c new file +66 -0

66 lines not on this page · raw message

arch/arm/mach-at91/include/mach/clk.h +2 -0
index ad83927..bef4e1c 100644
@@ -128,5 +128,7 @@ void at91_periph_clk_enable(int id);
 void at91_periph_clk_disable(int id);
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div);
 u32 at91_get_periph_generated_clk(u32 id);
+void at91_system_clk_enable(int sys_clk);
+void at91_system_clk_disable(int sys_clk);
 
 #endif /* __ASM_ARM_ARCH_CLK_H__ */
Signature · 1 line
1.7.9.5
#29 lore raw

PATCH v4 2/5 ARM: at91: clock: add a new file to handle clock

Quoted 6 lines · Wenyou Yang

To reduce the duplicated code, add a new file to accommodate the peripheral's and system's clock handle code, shared with the SoCs with different ARM core.

Quoted 168 lines

---

Changes in v4:
- due to PMC_PECR1 avaiable when has CPU_HAS_PCR, remove &pmc->pcer1 and &pmc->pcdr1.

Changes in v3:
- fix incorrectly used the indicator '&' to achieve the variable pointer of pmc->pcer and pmc->pcdr.

Changes in v2: None

 arch/arm/mach-at91/Makefile           |    1 +
 arch/arm/mach-at91/arm926ejs/clock.c  |    7 ----
 arch/arm/mach-at91/armv7/clock.c      |   26 -------------
 arch/arm/mach-at91/clock.c            |   66 +++++++++++++++++++++++++++++++++
 arch/arm/mach-at91/include/mach/clk.h |    2 +
 5 files changed, 69 insertions(+), 33 deletions(-)
 create mode 100644 arch/arm/mach-at91/clock.c
arch/arm/mach-at91/Makefile +1 -0
index 5b89617..d071072 100644
@@ -14,6 +14,7 @@ obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
 obj-y += spl.o
 endif
 
+obj-y += clock.o
 obj-$(CONFIG_CPU_ARM920T)	+= arm920t/
 obj-$(CONFIG_CPU_ARM926EJS)	+= arm926ejs/
 obj-$(CONFIG_CPU_V7)		+= armv7/
arch/arm/mach-at91/arm926ejs/clock.c +0 -7
index 8d6934e..c8b5e10 100644
@@ -242,10 +242,3 @@ void at91_mck_init(u32 mckr)
 	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
 		;
 }
-
-void at91_periph_clk_enable(int id)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	writel(1 << id, &pmc->pcer);
-}
arch/arm/mach-at91/armv7/clock.c +0 -26
index 41dbf16..81e9f69 100644
@@ -150,32 +150,6 @@ void at91_mck_init(u32 mckr)
 		;
 }
 
-void at91_periph_clk_enable(int id)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	u32 regval;
-
-	if (id > AT91_PMC_PCR_PID_MASK)
-		return;
-
-	regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id;
-
-	writel(regval, &pmc->pcr);
-}
-
-void at91_periph_clk_disable(int id)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	u32 regval;
-
-	if (id > AT91_PMC_PCR_PID_MASK)
-		return;
-
-	regval = AT91_PMC_PCR_CMD_WRITE | id;
-
-	writel(regval, &pmc->pcr);
-}
-
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
arch/arm/mach-at91/clock.c new file +66 -0
new file mode 100644
index 0000000..2a0308f
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Wenyou Yang <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_pmc.h>
+
+void at91_periph_clk_enable(int id)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+#ifdef CPU_HAS_PCR
+	u32 regval;
+	u32 div_value;
+
+	if (id > AT91_PMC_PCR_PID_MASK)
+		return;
+
+	writel(id, &pmc->pcr);
+
+	div_value = readl(&pmc->pcr) & AT91_PMC_PCR_DIV;
+
+	regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id | div_value;
+
+	writel(regval, &pmc->pcr);
+#else
+	writel(0x01 << id, &pmc->pcer);
+#endif
+}
+
+void at91_periph_clk_disable(int id)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+#ifdef CPU_HAS_PCR
+	u32 regval;
+
+	if (id > AT91_PMC_PCR_PID_MASK)
+		return;
+
+	regval = AT91_PMC_PCR_CMD_WRITE | id;
+
+	writel(regval, &pmc->pcr);
+#else
+	writel(0x01 << id, &pmc->pcdr);
+#endif
+}
+
+void at91_system_clk_enable(int sys_clk)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	writel(sys_clk, &pmc->scer);
+}
+
+void at91_system_clk_disable(int sys_clk)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	writel(sys_clk, &pmc->scdr);
+}
arch/arm/mach-at91/include/mach/clk.h +2 -0
index ad83927..bef4e1c 100644
@@ -128,5 +128,7 @@ void at91_periph_clk_enable(int id);
 void at91_periph_clk_disable(int id);
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div);
 u32 at91_get_periph_generated_clk(u32 id);
+void at91_system_clk_enable(int sys_clk);
+void at91_system_clk_disable(int sys_clk);
 
 #endif /* __ASM_ARM_ARCH_CLK_H__ */
#30 lore raw

PATCH v4 3/5 ARM: cpu: at91: clean up peripheral clock code

In reply to Wenyou Yang

Due to introducing the new peripheral clock handle functions, use these functions to clean up the duplicated code.

Meanwhile, remove unneeded header file include, at91_pmc.h.

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/arm920t/at91rm9200_devices.c    |   13 ++-----
 arch/arm/mach-at91/arm920t/timer.c                 |    4 +-
 arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c |   36 +++++-------------
 arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c |   28 ++++----------
 arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c |   37 +++++-------------
 .../mach-at91/arm926ejs/at91sam9m10g45_devices.c   |   33 ++++------------
 arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c |   40 +++++---------------
 arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c  |   28 ++++----------
 arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c  |   38 +++++--------------
 arch/arm/mach-at91/arm926ejs/cpu.c                 |    1 -
 arch/arm/mach-at91/arm926ejs/timer.c               |    5 +--
 arch/arm/mach-at91/armv7/cpu.c                     |    1 -
 arch/arm/mach-at91/armv7/timer.c                   |    1 -
 arch/arm/mach-at91/phy.c                           |    1 -
 arch/arm/mach-at91/sdram.c                         |    1 -
 15 files changed, 65 insertions(+), 202 deletions(-)
arch/arm/mach-at91/arm920t/at91rm9200_devices.c +3 -10
index fc54327..a340122 100644
@@ -14,7 +14,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -34,29 +33,23 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 17, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 18, PUP);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 20, PUP);		/* RXD1 */
 	at91_set_a_periph(AT91_PIO_PORTB, 21, 1);		/* TXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 22, PUP);		/* RXD2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 23, 1);		/* TXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
arch/arm/mach-at91/arm920t/timer.c +1 -3
index 6aa2994..3190961 100644
@@ -19,7 +19,6 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_tc.h>
-#include <asm/arch/at91_pmc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -31,8 +30,7 @@ int timer_init(void)
 	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
 	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 
-	/* enables TC1.0 clock */
-	writel(1 << ATMEL_ID_TC0, &pmc->pcer);	/* enable clock */
+	at91_periph_clk_enable(ATMEL_ID_TC0);
 
 	writel(0, &tc->bcr);
 	writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c +9 -27
index 5e0c0f5..912a966 100644
@@ -11,8 +11,8 @@
 #include <asm/io.h>
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91sam9_sdramc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -32,51 +32,40 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 4, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTB, 5, PUP);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 6, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTB, 7, PUP);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 8, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTB, 9, PUP);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTB, 15, 1);		/* DTXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, PUP);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 2, PUP);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@@ -106,14 +95,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 0, PUP);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 1, PUP);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 2, PUP);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
@@ -145,9 +131,7 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 #ifdef CONFIG_MACB
 void at91_macb_hw_init(void)
 {
-	/* Enable EMAC clock */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC0);
 
 	at91_set_a_periph(AT91_PIO_PORTA, 19, 0);	/* ETXCK_EREFCK */
 	at91_set_a_periph(AT91_PIO_PORTA, 17, 0);	/* ERXDV */
@@ -190,9 +174,7 @@ void at91_macb_hw_init(void)
 #if defined(CONFIG_GENERIC_ATMEL_MCI)
 void at91_mci_hw_init(void)
 {
-	/* Enable mci clock */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel(1 << ATMEL_ID_MCI, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_MCI);
 
 	at91_set_a_periph(AT91_PIO_PORTA, 8, 1);	/* MCCK */
 #if defined(CONFIG_ATMEL_MCI_PORTB)
arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c +7 -21
index a445c75..4bd4e75 100644
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -29,51 +29,40 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 8, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTC, 9, 0);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 12, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTC, 13, 0);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 14, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTC, 15, 0);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 9, 0);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 10, 1);		/* DTXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, PUP);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 2, PUP);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@@ -103,14 +92,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 30, PUP);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 31, PUP);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 29, PUP);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c +9 -28
index 6b51d5f..f3f4800 100644
@@ -13,7 +13,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -33,51 +33,40 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 26, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 27, PUP);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTD, 0, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTD, 1, PUP);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTD, 2, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTD, 3, PUP);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 30, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTC, 31, 1);		/* DTXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
 	at91_set_b_periph(AT91_PIO_PORTA, 1, PUP);	/* SPI0_MOSI */
 	at91_set_b_periph(AT91_PIO_PORTA, 2, PUP);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
@@ -107,14 +96,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 12, PUP);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 13, PUP);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
@@ -146,9 +132,7 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 #if defined(CONFIG_GENERIC_ATMEL_MCI)
 void at91_mci_hw_init(void)
 {
-	/* Enable mci clock */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel(1 << ATMEL_ID_MCI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_MCI1);
 
 	at91_set_a_periph(AT91_PIO_PORTA, 6, PUP);	/* MCI1_CK */
 
@@ -207,12 +191,9 @@ void at91_uhp_hw_init(void)
 #ifdef CONFIG_AT91_CAN
 void at91_can_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 13, 0);	/* CAN_TX */
 	at91_set_a_periph(AT91_PIO_PORTA, 14, 1);	/* CAN_RX */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_CAN, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_CAN);
 }
 #endif
arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c +8 -25
index 0e6c0da..0d83426 100644
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/io.h>
 
@@ -29,51 +29,40 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 19, 1);	/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTB, 18, PUP);	/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 4, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTB, 5, PUP);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTD, 6, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTD, 7, PUP);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTB, 13, 1);	/* DTXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 0, PUP);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 1, PUP);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 2, PUP);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
@@ -103,14 +92,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 15, PUP);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 16, PUP);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
@@ -169,8 +155,6 @@ void at91_macb_hw_init(void)
 #ifdef CONFIG_GENERIC_ATMEL_MCI
 void at91_mci_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 0, 0);	/* MCI0 CLK */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, 0);	/* MCI0 CDA */
 	at91_set_a_periph(AT91_PIO_PORTA, 2, 0);	/* MCI0 DA0 */
@@ -178,7 +162,6 @@ void at91_mci_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTA, 4, 0);	/* MCI0 DA2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 5, 0);	/* MCI0 DA3 */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_MCI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_MCI0);
 }
 #endif
arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c +10 -30
index 39f17a1..a03abfc 100644
@@ -8,8 +8,8 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
+#include <asm/arch/clk.h>
 
 unsigned int has_lcdc()
 {
@@ -18,60 +18,47 @@ unsigned int has_lcdc()
 
 void at91_serial0_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 0, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, 0);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 5, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTA, 6, 0);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 7, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 8, 0);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_serial3_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_b_periph(AT91_PIO_PORTC, 22, 1);		/* TXD3 */
 	at91_set_b_periph(AT91_PIO_PORTC, 23, 0);		/* RXD3 */
-	writel(1 << ATMEL_ID_USART3, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART3);
 }
 
 void at91_seriald_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 10, 1);		/* DTXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 9, 0);		/* DRXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 11, 0);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 12, 0);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 13, 0);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0))
 		at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
@@ -85,14 +72,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_b_periph(AT91_PIO_PORTA, 21, 0);	/* SPI1_MISO */
 	at91_set_b_periph(AT91_PIO_PORTA, 22, 0);	/* SPI1_MOSI */
 	at91_set_b_periph(AT91_PIO_PORTA, 23, 0);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0))
 		at91_set_pio_output(AT91_PIO_PORTA, 8, 1);
@@ -107,8 +91,6 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 
 void at91_mci_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 17, 0);	/* MCCK */
 	at91_set_a_periph(AT91_PIO_PORTA, 16, 0);	/* MCCDA */
 	at91_set_a_periph(AT91_PIO_PORTA, 15, 0);	/* MCDA0 */
@@ -116,14 +98,12 @@ void at91_mci_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTA, 19, 0);	/* MCDA2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 20, 0);	/* MCDA3 */
 
-	writel(1 << ATMEL_ID_HSMCI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_HSMCI0);
 }
 
 #ifdef CONFIG_LCD
 void at91_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 24, 0);	/* LCDDPWR */
 	at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDVSYNC */
 	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDHSYNC */
@@ -156,6 +136,6 @@ void at91_lcd_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTC, 22, 0);	/* LCDD22 */
 	at91_set_a_periph(AT91_PIO_PORTC, 23, 0);	/* LCDD23 */
 
-	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_LCDC);
 }
 #endif
arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c +7 -21
index 857c864..dbf9386 100644
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -29,51 +29,40 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 6, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 7, PUP);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 11, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTA, 12, PUP);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 13, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 14, PUP);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 21, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 22, 1);		/* DTXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 25, PUP);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 26, PUP);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 27, PUP);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
@@ -105,8 +94,6 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 #ifdef CONFIG_GENERIC_ATMEL_MCI
 void at91_mci_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 2, 0);        /* MCI CLK */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, 0);        /* MCI CDA */
 	at91_set_a_periph(AT91_PIO_PORTA, 0, 0);        /* MCI DA0 */
@@ -114,7 +101,6 @@ void at91_mci_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTA, 4, 0);        /* MCI DA2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 5, 0);        /* MCI DA3 */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_MCI, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_MCI);
 }
 #endif
arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c +10 -28
index 6d94572..3e4555a 100644
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/io.h>
 
@@ -64,42 +64,34 @@ char *get_cpu_name()
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 9, 0);	/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 10, 1);	/* DTXD */
 
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 0, 1);	/* TXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, 0);	/* RXD */
 
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 5, 1);	/* TXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 6, 0);	/* RXD */
 
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 7, 1);	/* TXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 8, 0);	/* RXD */
 
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_mci_hw_init(void)
@@ -112,22 +104,17 @@ void at91_mci_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTA, 19, 1);	/* MCDA2 */
 	at91_set_a_periph(AT91_PIO_PORTA, 20, 1);	/* MCDA3 */
 
-	/* Enable clock for MCI0 */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel(1 << ATMEL_ID_HSMCI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_HSMCI0);
 }
 
 #ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 11, 0);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 12, 0);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 13, 0);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0))
 		at91_set_a_periph(AT91_PIO_PORTA, 14, 0);
@@ -149,14 +136,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_b_periph(AT91_PIO_PORTA, 21, 0);	/* SPI1_MISO */
 	at91_set_b_periph(AT91_PIO_PORTA, 22, 0);	/* SPI1_MOSI */
 	at91_set_b_periph(AT91_PIO_PORTA, 23, 0);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0))
 		at91_set_b_periph(AT91_PIO_PORTA, 8, 0);
@@ -193,11 +177,9 @@ void at91_uhp_hw_init(void)
 #ifdef CONFIG_MACB
 void at91_macb_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	if (has_emac0()) {
 		/* Enable EMAC0 clock */
-		writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+		at91_periph_clk_enable(ATMEL_ID_EMAC0);
 		/* EMAC0 pins setup */
 		at91_set_a_periph(AT91_PIO_PORTB, 4, 0);	/* ETXCK */
 		at91_set_a_periph(AT91_PIO_PORTB, 3, 0);	/* ERXDV */
@@ -213,7 +195,7 @@ void at91_macb_hw_init(void)
 
 	if (has_emac1()) {
 		/* Enable EMAC1 clock */
-		writel(1 << ATMEL_ID_EMAC1, &pmc->pcer);
+		at91_periph_clk_enable(ATMEL_ID_EMAC1);
 		/* EMAC1 pins setup */
 		at91_set_b_periph(AT91_PIO_PORTC, 29, 0);	/* ETXCK */
 		at91_set_b_periph(AT91_PIO_PORTC, 28, 0);	/* ECRSDV */
arch/arm/mach-at91/arm926ejs/cpu.c +0 -1
index 990c689..9b9f8af 100644
@@ -10,7 +10,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pit.h>
 #include <asm/arch/at91_gpbr.h>
 #include <asm/arch/clk.h>
arch/arm/mach-at91/arm926ejs/timer.c +1 -4
index 31ce646..c49d306 100644
@@ -10,7 +10,6 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pit.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
 #include <div64.h>
 
@@ -38,11 +37,9 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 int timer_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 	at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
 
-	/* Enable PITC Clock */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 
 	/* Enable PITC */
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
arch/arm/mach-at91/armv7/cpu.c +0 -1
index 7843aed..1865303 100644
@@ -12,7 +12,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pit.h>
 #include <asm/arch/at91_gpbr.h>
 #include <asm/arch/clk.h>
arch/arm/mach-at91/armv7/timer.c +0 -1
index a4a3817..6f91e22 100644
@@ -13,7 +13,6 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pit.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
 #include <div64.h>
 
arch/arm/mach-at91/phy.c +0 -1
index 2cba716..ddd70f5 100644
@@ -15,7 +15,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <linux/sizes.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <watchdog.h>
 
arch/arm/mach-at91/sdram.c +0 -1
index 5758b06..1dfc74f 100644
@@ -13,7 +13,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91sam9_sdramc.h>
 #include <asm/arch/gpio.h>
 
Signature · 1 line
1.7.9.5
#31 lore raw

PATCH v4 4/5 board: atmel: clean up peripheral clock code

In reply to Wenyou Yang

Due to introducing the new peripheral clock handle functions, use these functions to reduce duplicated code.

---

Changes in v4: None
Changes in v3: None
Changes in v2:
- fix checkpatch warning.

 board/atmel/at91rm9200ek/at91rm9200ek.c         |    1 -
 board/atmel/at91rm9200ek/led.c                  |    5 +----
 board/atmel/at91sam9260ek/at91sam9260ek.c       |   15 +++++----------
 board/atmel/at91sam9261ek/at91sam9261ek.c       |    8 ++------
 board/atmel/at91sam9261ek/led.c                 |    6 ++----
 board/atmel/at91sam9263ek/at91sam9263ek.c       |   23 +++++++----------------
 board/atmel/at91sam9263ek/led.c                 |    9 +++------
 board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |   20 +++++---------------
 board/atmel/at91sam9m10g45ek/led.c              |    7 ++-----
 board/atmel/at91sam9n12ek/at91sam9n12ek.c       |    6 ++----
 board/atmel/at91sam9rlek/at91sam9rlek.c         |   18 ++++++------------
 board/atmel/at91sam9rlek/led.c                  |    7 ++-----
 board/atmel/at91sam9x5ek/at91sam9x5ek.c         |   10 +++-------
 board/atmel/sama5d2_xplained/sama5d2_xplained.c |    1 -
 board/atmel/sama5d3_xplained/sama5d3_xplained.c |    5 ++---
 board/atmel/sama5d3xek/sama5d3xek.c             |    5 ++---
 board/atmel/sama5d4_xplained/sama5d4_xplained.c |    5 ++---
 board/atmel/sama5d4ek/sama5d4ek.c               |    5 ++---
 board/bluewater/snapper9260/snapper9260.c       |   15 +++++----------
 board/calao/usb_a9263/usb_a9263.c               |   11 ++++-------
 board/egnite/ethernut5/ethernut5.c              |   20 ++++++++------------
 board/esd/meesc/meesc.c                         |   15 ++++++---------
 board/mini-box/picosam9g45/led.c                |    7 ++-----
 board/mini-box/picosam9g45/picosam9g45.c        |   17 ++++-------------
 board/ronetix/pm9261/led.c                      |    7 ++-----
 board/ronetix/pm9261/pm9261.c                   |   22 ++++++----------------
 board/ronetix/pm9263/led.c                      |    7 ++-----
 board/ronetix/pm9263/pm9263.c                   |   19 +++++--------------
 board/ronetix/pm9g45/pm9g45.c                   |   20 ++++++--------------
 board/siemens/corvus/board.c                    |    6 ++----
 board/siemens/smartweb/smartweb.c               |    3 +--
 board/siemens/taurus/taurus.c                   |    3 +--
 32 files changed, 102 insertions(+), 226 deletions(-)
board/atmel/at91rm9200ek/at91rm9200ek.c +0 -1
index 64ab572..4ca8106 100644
@@ -14,7 +14,6 @@
 #include <netdev.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/io.h>
 
board/atmel/at91rm9200ek/led.c +1 -4
index 6761b14..8b62035 100644
@@ -12,7 +12,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
 #include <status_led.h>
 
@@ -59,11 +58,9 @@ void	red_led_off(void)
 
 void coloured_LED_init (void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
 	at91_pio_t *pio = (at91_pio_t *)ATMEL_BASE_PIO;
 
-	/* Enable PIOB clock */
-	writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
 
 	/* Disable peripherals on LEDs */
 	writel(GREEN_LED | YELLOW_LED | RED_LED, &pio->piob.per);
board/atmel/at91sam9260ek/at91sam9260ek.c +5 -10
index 7f14af1..98193bf 100644
@@ -11,7 +11,7 @@
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <atmel_mci.h>
 
@@ -70,11 +70,9 @@ static void at91sam9260ek_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void at91sam9260ek_macb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
 
-	/* Enable EMAC clock */
-	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC0);
 
 	/*
 	 * Disable pull-up on:
@@ -122,12 +120,9 @@ int board_mmc_init(bd_t *bd)
 
 int board_early_init_f(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clocks for all PIOs */
-	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOC),
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	return 0;
 }
board/atmel/at91sam9261ek/at91sam9261ek.c +2 -6
index 5250474..7b7cd2c 100644
@@ -12,7 +12,6 @@
 #include <asm/arch/at91sam9261_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
@@ -35,7 +34,6 @@ static void at91sam9261ek_nand_hw_init(void)
 {
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	unsigned long csa;
 
 	/* Enable CS3 */
@@ -74,7 +72,7 @@ static void at91sam9261ek_nand_hw_init(void)
 		       AT91_SMC_MODE_TDF_CYCLE(2),
 		       &smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -161,8 +159,6 @@ void lcd_disable(void)
 
 static void at91sam9261ek_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_A_periph(AT91_PIN_PB1, 0);	/* LCDHSYNC */
 	at91_set_A_periph(AT91_PIN_PB2, 0);	/* LCDDOTCK */
 	at91_set_A_periph(AT91_PIN_PB3, 0);	/* LCDDEN */
@@ -186,7 +182,7 @@ static void at91sam9261ek_lcd_hw_init(void)
 	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
 	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
 
-	writel(AT91_PMC_HCK1, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_HCK1);
 
 	/* For 9G10EK, let U-Boot allocate the framebuffer in SDRAM */
 #ifdef CONFIG_AT91SAM9261EK
board/atmel/at91sam9261ek/led.c +2 -4
index 18a68d8..485d7ea 100644
@@ -8,17 +8,15 @@
 
 #include <common.h>
 #include <asm/arch/at91sam9261.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/at91_pio.h>
+#include <asm/arch/clk.h>
 #include <asm/io.h>
 
 void coloured_LED_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	/* Enable clock */
-	writel(ATMEL_ID_PIOA, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
 
 	at91_set_gpio_output(CONFIG_RED_LED, 1);
 	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
board/atmel/at91sam9263ek/at91sam9263ek.c +7 -16
index 927adb0..af68e10 100644
@@ -11,7 +11,6 @@
 #include <asm/arch/at91sam9263.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_matrix.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
@@ -39,7 +38,6 @@ static void at91sam9263ek_nand_hw_init(void)
 	unsigned long csa;
 	at91_smc_t    *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
 	at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
-	at91_pmc_t    *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	/* Enable CS3 */
 	csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -68,8 +66,8 @@ static void at91sam9263ek_nand_hw_init(void)
 		       AT91_SMC_MODE_TDF_CYCLE(2),
 		&smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE,
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOCDE);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -82,11 +80,9 @@ static void at91sam9263ek_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void at91sam9263ek_macb_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 	at91_pio_t	*pio	= (at91_pio_t *) ATMEL_BASE_PIO;
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
@@ -139,8 +135,6 @@ void lcd_disable(void)
 
 static void at91sam9263ek_lcd_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDHSYNC */
 	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* LCDDOTCK */
 	at91_set_a_periph(AT91_PIO_PORTC, 3, 0);	/* LCDDEN */
@@ -164,7 +158,7 @@ static void at91sam9263ek_lcd_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDD22 */
 	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDD23 */
 
-	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_LCDC);
 	gd->fb_base = ATMEL_BASE_SRAM0;
 }
 
@@ -226,12 +220,9 @@ int board_mmc_init(bd_t *bd)
 
 int board_early_init_f(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clocks for all PIOs */
-	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOCDE),
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOCDE);
 
 	at91_seriald_hw_init();
 	return 0;
board/atmel/at91sam9263ek/led.c +3 -6
index e317d99..21d81de 100644
@@ -9,16 +9,13 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91sam9263.h>
+#include <asm/arch/clk.h>
 
 void coloured_LED_init(void)
 {
-	/* Enable clock */
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-
-	writel(1 << ATMEL_ID_PIOB | 1 << ATMEL_ID_PIOCDE,
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
 
 	at91_set_gpio_output(CONFIG_RED_LED, 1);
 	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +5 -15
index 2fea56f..b67fd76 100644
@@ -12,7 +12,6 @@
 #include <asm/arch/at91sam9g45_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <lcd.h>
@@ -36,7 +35,6 @@ void at91sam9m10g45ek_nand_hw_init(void)
 {
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	unsigned long csa;
 
 	/* Enable CS3 */
@@ -63,7 +61,7 @@ void at91sam9m10g45ek_nand_hw_init(void)
 	       AT91_SMC_MODE_TDF_CYCLE(3),
 	       &smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -130,13 +128,11 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct atmel_mpddr ddr2;
 
 	ddr2_conf(&ddr2);
 
-	/* enable DDR2 clock */
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* DDRAM2 Controller initialize */
 	ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
@@ -146,9 +142,7 @@ void mem_init(void)
 #ifdef CONFIG_CMD_USB
 static void at91sam9m10g45ek_usb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
 
 	at91_set_gpio_output(AT91_PIN_PD1, 0);
 	at91_set_gpio_output(AT91_PIN_PD3, 0);
@@ -158,11 +152,9 @@ static void at91sam9m10g45ek_usb_hw_init(void)
 #ifdef CONFIG_MACB
 static void at91sam9m10g45ek_macb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
@@ -222,8 +214,6 @@ void lcd_disable(void)
 
 static void at91sam9m10g45ek_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_A_periph(AT91_PIN_PE0, 0);	/* LCDDPWR */
 	at91_set_A_periph(AT91_PIN_PE2, 0);	/* LCDCC */
 	at91_set_A_periph(AT91_PIN_PE3, 0);	/* LCDVSYNC */
@@ -255,7 +245,7 @@ static void at91sam9m10g45ek_lcd_hw_init(void)
 	at91_set_A_periph(AT91_PIN_PE29, 0);	/* LCDD22 */
 	at91_set_A_periph(AT91_PIN_PE30, 0);	/* LCDD23 */
 
-	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_LCDC);
 
 	gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE;
 }
board/atmel/at91sam9m10g45ek/led.c +2 -5
index fe98723..866052e 100644
@@ -9,15 +9,12 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9g45.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 void coloured_LED_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clock */
-	writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
 
 	at91_set_gpio_output(CONFIG_RED_LED, 1);
 	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
board/atmel/at91sam9n12ek/at91sam9n12ek.c +2 -4
index 59bc535..49e34b2 100644
@@ -10,7 +10,6 @@
 #include <asm/arch/at91sam9x5_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
@@ -208,9 +207,8 @@ void at91sam9n12ek_usb_hw_init(void)
 
 int board_early_init_f(void)
 {
-	/* Enable clocks for all PIOs */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel((1 << ATMEL_ID_PIOAB) | (1 << ATMEL_ID_PIOCD), &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOAB);
+	at91_periph_clk_enable(ATMEL_ID_PIOCD);
 
 	at91_seriald_hw_init();
 	return 0;
board/atmel/at91sam9rlek/at91sam9rlek.c +6 -12
index f995cef..9ef2864 100644
@@ -12,7 +12,6 @@
 #include <asm/arch/at91sam9rl_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
@@ -36,7 +35,6 @@ static void at91sam9rlek_nand_hw_init(void)
 {
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	unsigned long csa;
 
 	/* Enable CS3 */
@@ -64,7 +62,7 @@ static void at91sam9rlek_nand_hw_init(void)
 		AT91_SMC_MODE_TDF_CYCLE(2),
 		&smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOD, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -106,8 +104,6 @@ void lcd_disable(void)
 }
 static void at91sam9rlek_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_B_periph(AT91_PIN_PC1, 0);	/* LCDPWR */
 	at91_set_A_periph(AT91_PIN_PC5, 0);	/* LCDHSYNC */
 	at91_set_A_periph(AT91_PIN_PC6, 0);	/* LCDDOTCK */
@@ -130,7 +126,7 @@ static void at91sam9rlek_lcd_hw_init(void)
 	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
 	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
 
-	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_LCDC);
 }
 
 #ifdef CONFIG_LCD_INFO
@@ -174,12 +170,10 @@ int board_mmc_init(bd_t *bis)
 
 int board_early_init_f(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clocks for all PIOs */
-	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOC) | (1 << ATMEL_ID_PIOD),
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
 
 	return 0;
 }
board/atmel/at91sam9rlek/led.c +2 -5
index fede59c..d593aba 100644
@@ -8,16 +8,13 @@
 
 #include <common.h>
 #include <asm/arch/at91sam9rl.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/io.h>
 
 void coloured_LED_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clock */
-	writel(ATMEL_ID_PIOD, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOD);
 
 	at91_set_gpio_output(CONFIG_RED_LED, 1);
 	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
board/atmel/at91sam9x5ek/at91sam9x5ek.c +3 -7
index 1738a2b..23ca71a 100644
@@ -9,10 +9,9 @@
 #include <asm/arch/at91sam9x5_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
-#include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
 #include <lcd.h>
 #include <atmel_hlcdc.h>
 #include <atmel_mci.h>
@@ -39,7 +38,6 @@ static void at91sam9x5ek_nand_hw_init(void)
 {
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	unsigned long csa;
 
 	/* Enable CS3 */
@@ -72,7 +70,7 @@ static void at91sam9x5ek_nand_hw_init(void)
 		AT91_SMC_MODE_TDF_CYCLE(1),
 		&smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOCD, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOCD);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -141,8 +139,6 @@ void lcd_disable(void)
 
 static void at91sam9x5ek_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	if (has_lcdc()) {
 		at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDPWM */
 		at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDVSYNC */
@@ -176,7 +172,7 @@ static void at91sam9x5ek_lcd_hw_init(void)
 		at91_set_a_periph(AT91_PIO_PORTC, 22, 0);	/* LCDD22 */
 		at91_set_a_periph(AT91_PIO_PORTC, 23, 0);	/* LCDD23 */
 
-		writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+		at91_periph_clk_enable(ATMEL_ID_LCDC);
 	}
 }
 
board/atmel/sama5d2_xplained/sama5d2_xplained.c +0 -1
index 0b3397f..241c165 100644
@@ -15,7 +15,6 @@
 #include <version.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/atmel_pio4.h>
 #include <asm/arch/atmel_usba_udc.h>
 #include <asm/arch/atmel_sdhci.h>
board/atmel/sama5d3_xplained/sama5d3_xplained.c +2 -3
index 7a01149..d180b41 100644
@@ -184,14 +184,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct atmel_mpddr ddr2;
 
 	ddr2_conf(&ddr2);
 
-	/* enable MPDDR clock */
+	/* Enable MPDDR clock */
 	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* DDRAM2 Controller initialize */
 	ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2);
board/atmel/sama5d3xek/sama5d3xek.c +2 -3
index 7c95f33..777e57e 100644
@@ -443,14 +443,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct atmel_mpddr ddr2;
 
 	ddr2_conf(&ddr2);
 
-	/* enable MPDDR clock */
+	/* Enable MPDDR clock */
 	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* DDRAM2 Controller initialize */
 	ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2);
board/atmel/sama5d4_xplained/sama5d4_xplained.c +2 -3
index db45331..e95310c 100644
@@ -383,14 +383,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct atmel_mpddr ddr2;
 
 	ddr2_conf(&ddr2);
 
-	/* enable MPDDR clock */
+	/* Enable MPDDR clock */
 	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* DDRAM2 Controller initialize */
 	ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2);
board/atmel/sama5d4ek/sama5d4ek.c +2 -3
index 357b223..c92e2588 100644
@@ -379,14 +379,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct atmel_mpddr ddr2;
 
 	ddr2_conf(&ddr2);
 
-	/* enable MPDDR clock */
+	/* Enable MPDDR clock */
 	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* DDRAM2 Controller initialize */
 	ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2);
board/bluewater/snapper9260/snapper9260.c +5 -10
index 95633b0..2d1a89e 100644
@@ -15,7 +15,7 @@
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/atmel_serial.h>
 #include <net.h>
@@ -31,11 +31,9 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static void macb_hw_init(void)
 {
-	struct at91_pmc *pmc   = (struct at91_pmc  *)ATMEL_BASE_PMC;
 	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC0);
 
 	/* Disable pull-ups to prevent PHY going into test mode */
 	writel(pin_to_mask(AT91_PIN_PA14) |
@@ -108,12 +106,9 @@ static void nand_hw_init(void)
 
 int board_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable PIO clocks */
-	writel((1 << ATMEL_ID_PIOA) |
-	       (1 << ATMEL_ID_PIOB) |
-	       (1 << ATMEL_ID_PIOC), &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	/* The mach-type is the same for both Snapper 9260 and 9G20 */
 	gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
board/calao/usb_a9263/usb_a9263.c +4 -7
index 266e950..d627b24 100644
@@ -12,7 +12,7 @@
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_matrix.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm-generic/gpio.h>
 #include <asm/io.h>
@@ -43,7 +43,6 @@ static void usb_a9263_nand_hw_init(void)
 	unsigned long csa;
 	at91_smc_t *smc = (at91_smc_t *)ATMEL_BASE_SMC0;
 	at91_matrix_t *matrix = (at91_matrix_t *)ATMEL_BASE_MATRIX;
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
 
 	/* Enable CS3 */
 	csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -66,7 +65,8 @@ static void usb_a9263_nand_hw_init(void)
 	       AT91_SMC_MODE_DBW_8 |
 	       AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOCDE);
 
 	/* Configure RDY/BSY */
 	gpio_request(CONFIG_SYS_NAND_READY_PIN, "NAND ready/busy");
@@ -81,10 +81,7 @@ static void usb_a9263_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void usb_a9263_macb_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
-
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
board/egnite/ethernut5/ethernut5.c +8 -12
index 67d3984..2c8e978 100644
@@ -67,8 +67,8 @@
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_spi.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
@@ -151,12 +151,10 @@ static void ethernut5_nand_hw_init(void)
  */
 int board_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
-	/* Enable clocks for all PIOs */
-	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOC),
-		&pmc->pcer);
 	/* Set adress of boot parameters. */
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 	/* Initialize UARTs and power management. */
@@ -179,10 +177,9 @@ int board_eth_init(bd_t *bis)
 {
 	const char *devname;
 	unsigned short mode;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 
-	/* Enable on-chip EMAC clock. */
-	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC0);
+
 	/* Need to reset PHY via power management. */
 	ethernut5_phy_reset();
 	/* Set peripheral pins. */
@@ -211,10 +208,8 @@ int board_eth_init(bd_t *bis)
 #ifdef CONFIG_GENERIC_ATMEL_MCI
 int board_mmc_init(bd_t *bd)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	at91_periph_clk_enable(ATMEL_ID_MCI);
 
-	/* Enable MCI clock. */
-	writel(1 << ATMEL_ID_MCI, &pmc->pcer);
 	/* Initialize MCI hardware. */
 	at91_mci_hw_init();
 	/* Register the device. */
@@ -229,6 +224,7 @@ int board_mmc_getcd(struct mmc *mmc)
 
 #ifdef CONFIG_ATMEL_SPI
 /*
+
  * Note, that u-boot uses different code for SPI bus access. While
  * memory routines use automatic chip select control, the serial
  * flash support requires 'manual' GPIO control. Thus, we switch
board/esd/meesc/meesc.c +6 -9
index b7f9f90..fe781dc 100644
@@ -87,9 +87,8 @@ static void meesc_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void meesc_macb_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
+
 	at91_macb_hw_init();
 }
 #endif
@@ -244,12 +243,10 @@ int misc_init_r(void)
 
 int board_early_init_f(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
-	/* enable all clocks */
-	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOCDE) | (1 << ATMEL_ID_UHP),
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOCDE);
+	at91_periph_clk_enable(ATMEL_ID_UHP);
 
 	at91_seriald_hw_init();
 
board/mini-box/picosam9g45/led.c +2 -5
index dc1013a..3fb6a7b 100644
@@ -9,15 +9,12 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9g45.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 void coloured_LED_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clock */
-	writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
 
 	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
 
board/mini-box/picosam9g45/picosam9g45.c +4 -13
index afbd6ce..b768fbf 100644
@@ -17,7 +17,6 @@
 #include <asm/arch/at91sam9g45_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <lcd.h>
@@ -80,15 +79,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
 	struct atmel_mpddr ddr2;
 	unsigned long csa;
 
 	ddr2_conf(&ddr2);
 
-	/* enable DDR2 clock */
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* Chip select 1 is for DDR2/SDRAM */
 	csa = readl(&mat->ebicsa);
@@ -105,9 +102,7 @@ void mem_init(void)
 #ifdef CONFIG_CMD_USB
 static void picosam9g45_usb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
 
 	at91_set_gpio_output(AT91_PIN_PD1, 0);
 	at91_set_gpio_output(AT91_PIN_PD3, 0);
@@ -117,11 +112,9 @@ static void picosam9g45_usb_hw_init(void)
 #ifdef CONFIG_MACB
 static void picosam9g45_macb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
@@ -181,8 +174,6 @@ void lcd_disable(void)
 
 static void picosam9g45_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_A_periph(AT91_PIN_PE0, 0);	/* LCDDPWR */
 	at91_set_A_periph(AT91_PIN_PE2, 0);	/* LCDCC */
 	at91_set_A_periph(AT91_PIN_PE3, 0);	/* LCDVSYNC */
@@ -214,7 +205,7 @@ static void picosam9g45_lcd_hw_init(void)
 	at91_set_A_periph(AT91_PIN_PE29, 0);	/* LCDD22 */
 	at91_set_A_periph(AT91_PIN_PE30, 0);	/* LCDD23 */
 
-	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_LCDC);
 
 	gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE;
 }
board/ronetix/pm9261/led.c +2 -5
index cc4c2a0..53e353a 100644
@@ -9,15 +9,12 @@
 
 #include <common.h>
 #include <asm/gpio.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 void coloured_LED_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clock */
-	writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	gpio_direction_output(CONFIG_RED_LED, 1);
 	gpio_direction_output(CONFIG_GREEN_LED, 1);
board/ronetix/pm9261/pm9261.c +6 -16
index b96f745..3cc01cb 100644
@@ -14,7 +14,6 @@
 #include <asm/gpio.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_matrix.h>
 #include <asm/arch/clk.h>
@@ -41,7 +40,6 @@ static void pm9261_nand_hw_init(void)
 	unsigned long csa;
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 
 	/* Enable CS3 */
 	csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -69,9 +67,8 @@ static void pm9261_nand_hw_init(void)
 		AT91_SMC_MODE_TDF_CYCLE(2),
 		&smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOA |
-		1 << ATMEL_ID_PIOC,
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	/* Configure RDY/BSY */
 	gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
@@ -89,7 +86,6 @@ static void pm9261_nand_hw_init(void)
 static void pm9261_dm9000_hw_init(void)
 {
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 
 	/* Configure SMC CS2 for DM9000 */
 	writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
@@ -110,7 +106,7 @@ static void pm9261_dm9000_hw_init(void)
 		&smc->cs[2].mode);
 
 	/* Configure Interrupt pin as input, no pull-up */
-	writel(1 << ATMEL_ID_PIOA, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
 	at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
 }
 #endif
@@ -145,8 +141,6 @@ void lcd_disable(void)
 
 static void pm9261_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 1, 0);	/* LCDHSYNC */
 	at91_set_a_periph(AT91_PIO_PORTB, 2, 0);	/* LCDDOTCK */
 	at91_set_a_periph(AT91_PIO_PORTB, 3, 0);	/* LCDDEN */
@@ -170,7 +164,7 @@ static void pm9261_lcd_hw_init(void)
 	at91_set_b_periph(AT91_PIO_PORTB, 27, 0);	/* LCDD22 */
 	at91_set_b_periph(AT91_PIO_PORTB, 28, 0);	/* LCDD23 */
 
-	writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */
+	at91_system_clk_enable(AT91_PMC_HCK1);
 
 	gd->fb_base = ATMEL_BASE_SRAM;
 }
@@ -224,12 +218,8 @@ void lcd_show_board_info(void)
 
 int board_early_init_f(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clocks for some PIOs */
-	writel(1 << ATMEL_ID_PIOA |
-		1 << ATMEL_ID_PIOC,
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	at91_seriald_hw_init();
 
board/ronetix/pm9263/led.c +2 -5
index bfc2310..8025a20 100644
@@ -9,15 +9,12 @@
 
 #include <common.h>
 #include <asm/gpio.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 void coloured_LED_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clock */
-	writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
 
 	gpio_direction_output(CONFIG_RED_LED, 1);
 	gpio_direction_output(CONFIG_GREEN_LED, 1);
board/ronetix/pm9263/pm9263.c +5 -14
index 1b00f08..276ff80 100644
@@ -14,7 +14,6 @@
 #include <asm/gpio.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_matrix.h>
 #include <asm/arch/clk.h>
@@ -78,8 +77,6 @@ static void pm9263_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void pm9263_macb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	/*
 	 * PB27 enables the 50MHz oscillator for Ethernet PHY
 	 * 1 - enable
@@ -88,8 +85,7 @@ static void pm9263_macb_hw_init(void)
 	at91_set_pio_output(AT91_PIO_PORTB, 27, 1);
 	at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
@@ -231,8 +227,6 @@ static int pm9263_lcd_hw_psram_init(void)
 
 static void pm9263_lcd_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* LCDVSYNC */
 	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDHSYNC */
 	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* LCDDOTCK */
@@ -257,7 +251,7 @@ static void pm9263_lcd_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDD22 */
 	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDD23 */
 
-	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_LCDC);
 
 	/* Power Control */
 	at91_set_pio_output(AT91_PIO_PORTA, 22, 1);
@@ -323,12 +317,9 @@ void lcd_show_board_info(void)
 
 int board_early_init_f(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clocks for all PIOs */
-	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOCDE),
-		&pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOCDE);
 
 	at91_seriald_hw_init();
 
board/ronetix/pm9g45/pm9g45.c +6 -14
index efc4133..c2707e0 100644
@@ -17,7 +17,6 @@
 #include <asm/gpio.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_matrix.h>
 #include <asm/arch/gpio.h>
@@ -39,7 +38,6 @@ static void pm9g45_nand_hw_init(void)
 	unsigned long csa;
 	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
 	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 
 	/* Enable CS3 */
 	csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -63,7 +61,7 @@ static void pm9g45_nand_hw_init(void)
 		AT91_SMC_MODE_TDF_CYCLE(3),
 		&smc->cs[3].mode);
 
-	writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 #ifdef CONFIG_SYS_NAND_READY_PIN
 	/* Configure RDY/BSY */
@@ -78,8 +76,6 @@ static void pm9g45_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void pm9g45_macb_hw_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
 	/*
 	 * PD2 enables the 50MHz oscillator for Ethernet PHY
 	 * 1 - enable
@@ -88,8 +84,7 @@ static void pm9g45_macb_hw_init(void)
 	at91_set_pio_output(AT91_PIO_PORTD, 2, 1);
 	at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
 
 	/*
 	 * Disable pull-up on:
@@ -114,13 +109,10 @@ static void pm9g45_macb_hw_init(void)
 
 int board_early_init_f(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	/* Enable clocks for all PIOs */
-	writel((1 << ATMEL_ID_PIOA) |
-		(1 << ATMEL_ID_PIOB) |
-		(1 << ATMEL_ID_PIOC) |
-		(1 << ATMEL_ID_PIODE), &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_PIOA);
+	at91_periph_clk_enable(ATMEL_ID_PIOB);
+	at91_periph_clk_enable(ATMEL_ID_PIOC);
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
 
 	at91_seriald_hw_init();
 
board/siemens/corvus/board.c +2 -4
index 28985b8..8729fe9 100644
@@ -17,7 +17,6 @@
 #include <asm/arch/at91sam9g45_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
@@ -147,13 +146,11 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	struct atmel_mpddr ddr2;
 
 	ddr2_conf(&ddr2);
 
-	/* enable DDR2 clock */
-	writel(AT91_PMC_DDR, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_DDR);
 
 	/* DDRAM2 Controller initialize */
 	ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
@@ -214,6 +211,7 @@ void at91_udp_hw_init(void)
 
 	/* Enable UPLL clock */
 	writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr);
+
 	/* Enable UDPHS clock */
 	at91_periph_clk_enable(ATMEL_ID_UDPHS);
 }
board/siemens/smartweb/smartweb.c +1 -2
index d82f1b7..e7ee65c 100644
@@ -22,7 +22,6 @@
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_spi.h>
 #include <spi.h>
 #include <asm/arch/clk.h>
@@ -126,7 +125,7 @@ void at91_udp_hw_init(void)
 	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
 	at91_periph_clk_enable(ATMEL_ID_UDP);
 
-	writel(AT91SAM926x_PMC_UDP, &pmc->scer);
+	at91_system_clk_enable(AT91SAM926x_PMC_UDP);
 }
 
 struct at91_udc_data board_udc_data  = {
board/siemens/taurus/taurus.c +1 -2
index 72c5e60..9374064 100644
@@ -18,7 +18,6 @@
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/at91sam9_sdramc.h>
@@ -300,7 +299,7 @@ void at91_udp_hw_init(void)
 	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
 	at91_periph_clk_enable(ATMEL_ID_UDP);
 
-	writel(AT91SAM926x_PMC_UDP, &pmc->scer);
+	at91_system_clk_enable(AT91SAM926x_PMC_UDP);
 }
 
 struct at91_udc_data board_udc_data  = {
Signature · 1 line
1.7.9.5
#32 lore raw

PATCH v4 5/5 drivers: at91: clean up peripheral clock code

In reply to Wenyou Yang

Due to introducing the new peripheral clock handle functions, use these functions to reduce the duplicated code.

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/net/at91_emac.c       |    9 ++++-----
 drivers/usb/host/ehci-atmel.c |    8 --------
 drivers/usb/host/ohci-at91.c  |   20 ++++----------------
 3 files changed, 8 insertions(+), 29 deletions(-)
drivers/net/at91_emac.c +4 -5
index 2659592..178dfaa 100644
@@ -12,7 +12,6 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_emac.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
 #include <net.h>
 #include <netdev.h>
@@ -321,7 +320,6 @@ static int at91emac_init(struct eth_device *netdev, bd_t *bd)
 	emac_device *dev;
 	at91_emac_t *emac;
 	at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	emac = (at91_emac_t *) netdev->iobase;
 	dev = (emac_device *) netdev->priv;
@@ -347,7 +345,8 @@ static int at91emac_init(struct eth_device *netdev, bd_t *bd)
 	writel(value, &pio->piob.pdr);
 	writel(value, &pio->piob.bsr);
 
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
+
 	writel(readl(&emac->ctl) | AT91_EMAC_CTL_CSR, &emac->ctl);
 
 	/* Init Ethernet buffers */
@@ -452,10 +451,10 @@ static int at91emac_recv(struct eth_device *netdev)
 static int at91emac_write_hwaddr(struct eth_device *netdev)
 {
 	at91_emac_t *emac;
-	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 	emac = (at91_emac_t *) netdev->iobase;
 
-	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_EMAC);
+
 	debug_cond(DEBUG_AT91EMAC,
 		"init MAC-ADDR %02x:%02x:%02x:%02x:%02x:%02x\n",
 		netdev->enetaddr[5], netdev->enetaddr[4], netdev->enetaddr[3],
drivers/usb/host/ehci-atmel.c +0 -8
index 9a8f004..a33fb49 100644
@@ -40,11 +40,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	}
 
 	/* Enable USB Host clock */
-#ifdef CPU_HAS_PCR
 	at91_periph_clk_enable(ATMEL_ID_UHPHS);
-#else
-	writel(1 << ATMEL_ID_UHPHS, &pmc->pcer);
-#endif
 
 	*hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI;
 	*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
@@ -59,11 +55,7 @@ int ehci_hcd_stop(int index)
 	ulong start_time, tmp_time;
 
 	/* Disable USB Host Clock */
-#ifdef CPU_HAS_PCR
 	at91_periph_clk_disable(ATMEL_ID_UHPHS);
-#else
-	writel(1 << ATMEL_ID_UHPHS, &pmc->pcdr);
-#endif
 
 	start_time = get_timer(0);
 	/* Disable UTMI PLL */
drivers/usb/host/ohci-at91.c +4 -16
index 820e2e5..da85111 100644
@@ -37,17 +37,11 @@ int usb_cpu_init(void)
 	writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
 #endif
 
-	/* Enable USB host clock. */
-#ifdef CPU_HAS_PCR
 	at91_periph_clk_enable(ATMEL_ID_UHP);
-#else
-	writel(1 << ATMEL_ID_UHP, &pmc->pcer);
-#endif
 
+	at91_system_clk_enable(ATMEL_PMC_UHP);
 #if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
-	writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
-#else
-	writel(ATMEL_PMC_UHP, &pmc->scer);
+	at91_system_clk_enable(AT91_PMC_HCK0);
 #endif
 
 	return 0;
@@ -57,17 +51,11 @@ int usb_cpu_stop(void)
 {
 	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
 
-	/* Disable USB host clock. */
-#ifdef CPU_HAS_PCR
 	at91_periph_clk_disable(ATMEL_ID_UHP);
-#else
-	writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
-#endif
 
+	at91_system_clk_disable(ATMEL_PMC_UHP);
 #if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
-	writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
-#else
-	writel(ATMEL_PMC_UHP, &pmc->scdr);
+	at91_system_clk_disable(AT91_PMC_HCK0);
 #endif
 
 #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
Signature · 1 line
1.7.9.5