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imx: mx6sx: Fix issue in LCDIF clock enablement

PATCH New Ye Li 2 participants 6 messages Jan 26, 2016 – Feb 2, 2016 Arm (32-bit)

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Ye Li

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#0 lore raw

PATCH 1/2 imx: mx6sx: Fix issue in LCDIF clock enablement

Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always enter the -EINVAL return.

Signed-off-by Ye Li <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +2 -2
index 27a3f2f..007204d 100644
@@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr)
 	u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
 
 	if (is_cpu_type(MXC_CPU_MX6SX)) {
-		if ((base_addr == LCDIF1_BASE_ADDR) ||
-		    (base_addr == LCDIF2_BASE_ADDR)) {
+		if ((base_addr != LCDIF1_BASE_ADDR) &&
+		    (base_addr != LCDIF2_BASE_ADDR)) {
 			puts("Wrong LCD interface!\n");
 			return -EINVAL;
 		}
Signature · 1 line
1.7.4.1
author
#1 lore raw

PATCH 2/2 imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation

The checking with max frequency supported is not correct, because the temp is calculated by max pre and post dividers. We can decrease any divider to meet the max frequency limitation. Actually, the calculation below the codes is doing this way to find best pre and post dividers.

Signed-off-by Ye Li <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -4
index 007204d..88380a6 100644
@@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
 	}
 
 	temp = freq * max_pred * max_postd;
-	if (temp > max) {
-		puts("Please decrease freq, too large!\n");
-		return;
-	}
 	if (temp < min) {
 		/*
 		 * Register: PLL_VIDEO
Signature · 1 line
1.7.4.1
#2 lore raw

PATCH 2/2 imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation

Quoted 16 lines · Ye Li

The checking with max frequency supported is not correct, because the temp is calculated by max pre and post dividers. We can decrease any divider to meet the max frequency limitation. Actually, the calculation below the codes is doing this way to find best pre and post dividers.

Signed-off-by Ye Li <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -0
index 007204d..88380a6 100644

arch/arm/cpu/armv7/mx6/clock.c void mxs_set_lcdclk(u32 base_addr, u32 freq) · line 643

Quoted 10 lines
arch/arm/cpu/armv7/mx6/clock.c +0 -4
@@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
 	}
 
 	temp = freq * max_pred * max_postd;
-	if (temp > max) {
-		puts("Please decrease freq, too large!\n");
-		return;
-	}
 	if (temp < min) {
 		/*
 		 * Register: PLL_VIDEO
Reviewed-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#3 lore raw

PATCH 2/2 imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation

In reply to Ye Li
Quoted 16 lines · Ye Li

The checking with max frequency supported is not correct, because the temp is calculated by max pre and post dividers. We can decrease any divider to meet the max frequency limitation. Actually, the calculation below the codes is doing this way to find best pre and post dividers.

Signed-off-by Ye Li <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -0
index 007204d..88380a6 100644

arch/arm/cpu/armv7/mx6/clock.c void mxs_set_lcdclk(u32 base_addr, u32 freq) · line 643

Quoted 10 lines
arch/arm/cpu/armv7/mx6/clock.c +0 -4
@@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
 	}
 
 	temp = freq * max_pred * max_postd;
-	if (temp > max) {
-		puts("Please decrease freq, too large!\n");
-		return;
-	}
 	if (temp < min) {
 		/*
 		 * Register: PLL_VIDEO

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#4 lore raw

PATCH 1/2 imx: mx6sx: Fix issue in LCDIF clock enablement

In reply to Ye Li
Quoted 14 lines · Ye Li

Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always enter the -EINVAL return.

Signed-off-by Ye Li <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -0
index 27a3f2f..007204d 100644

arch/arm/cpu/armv7/mx6/clock.c int enable_lcdif_clock(u32 base_addr) · line 749

Quoted 10 lines
arch/arm/cpu/armv7/mx6/clock.c +2 -2
@@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr)
 	u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
 
 	if (is_cpu_type(MXC_CPU_MX6SX)) {
-		if ((base_addr == LCDIF1_BASE_ADDR) ||
-		    (base_addr == LCDIF2_BASE_ADDR)) {
+		if ((base_addr != LCDIF1_BASE_ADDR) &&
+		    (base_addr != LCDIF2_BASE_ADDR)) {
 			puts("Wrong LCD interface!\n");
 			return -EINVAL;
 		}
Reviewed-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#5 lore raw

PATCH 1/2 imx: mx6sx: Fix issue in LCDIF clock enablement

In reply to Ye Li
Quoted 14 lines · Ye Li

Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always enter the -EINVAL return.

Signed-off-by Ye Li <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +0 -0
index 27a3f2f..007204d 100644

arch/arm/cpu/armv7/mx6/clock.c int enable_lcdif_clock(u32 base_addr) · line 749

Quoted 10 lines
arch/arm/cpu/armv7/mx6/clock.c +2 -2
@@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr)
 	u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
 
 	if (is_cpu_type(MXC_CPU_MX6SX)) {
-		if ((base_addr == LCDIF1_BASE_ADDR) ||
-		    (base_addr == LCDIF2_BASE_ADDR)) {
+		if ((base_addr != LCDIF1_BASE_ADDR) &&
+		    (base_addr != LCDIF2_BASE_ADDR)) {
 			puts("Wrong LCD interface!\n");
 			return -EINVAL;
 		}

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================