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ARM: at91: add PLLB handle functions

PATCH Superseded Wenyou Yang 4 participants 9 messages Jan 27, 2016

Subsystems (5)
Arm (32-bit) USB Arm sub-architectures Arm/Microchip (AT91) SoC support +1 more subsystems

v2 of 4 Superseded Latest is v4 →

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Wenyou Yang

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#0 lore raw

v2 cover ARM: at91: add PLLB handle functions

To reduce the duplicated code, add PLLB enable/disable functions, replace the UTMI PLL handle code with these functions.

It is based on the following patch set.
[PATCH 0/5] ARM: at91: improve peripheral and system clock handle functions [PATCH 0/4] ARM: at91: add UTMI PLL handle functions

Changes in v2:
- add return value for timeout checking at91_pllb_clk_enable/disable().
- collect Reviewed-by from Andreas.

Wenyou Yang (3):
ARM: at91: clock: add PLLB enable/disable functions
drivers: usb: ohci-at91: clean up the PLLB code
board: atmel: siemens: clean up PLLB code

 arch/arm/mach-at91/arm926ejs/clock.c  |   38 +++++++++++++++++++++++++++++++++
 arch/arm/mach-at91/include/mach/clk.h |    2 ++
 board/siemens/smartweb/smartweb.c     |    6 +-----
 board/siemens/taurus/taurus.c         |    6 +-----
 drivers/usb/host/ohci-at91.c          |   22 ++++++-------------
 5 files changed, 49 insertions(+), 25 deletions(-)
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH v2 1/3 ARM: at91: clock: add PLLB enable/disable functions

To avoid the duplicated code, add the PLLB handle functions.

Signed-off-by Wenyou Yang <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>

---

Changes in v2: None

 arch/arm/mach-at91/arm926ejs/clock.c  |   38 +++++++++++++++++++++++++++++++++
 arch/arm/mach-at91/include/mach/clk.h |    2 ++
 2 files changed, 40 insertions(+)
arch/arm/mach-at91/arm926ejs/clock.c +38 -0
index c8b5e10..c8d24ae 100644
@@ -18,6 +18,8 @@
 # error You need to define CONFIG_AT91FAMILY in your board config!
 #endif
 
+#define EN_PLLB_TIMEOUT	500
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static unsigned long at91_css_to_rate(unsigned long css)

@@ -242,3 +244,39 @@ void at91_mck_init(u32 mckr)
 	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
 		;
 }
+
+int at91_pllb_clk_enable(u32 pllbr)
+{
+	struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+	ulong start_time, tmp_time;
+
+	start_time = get_timer(0);
+	writel(pllbr, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
+		tmp_time = get_timer(0);
+		if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+			printf("ERROR: failed to enable PLLB\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+int at91_pllb_clk_disable(void)
+{
+	struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+	ulong start_time, tmp_time;
+
+	start_time = get_timer(0);
+	writel(0, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) {
+		tmp_time = get_timer(0);
+		if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+			printf("ERROR: failed to disable PLLB\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
arch/arm/mach-at91/include/mach/clk.h +2 -0
index b2604ef..64dec52 100644
@@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
 int at91_upll_clk_enable(void);
 int at91_upll_clk_disable(void);
 void at91_usb_clk_init(u32 value);
+int at91_pllb_clk_enable(u32 pllbr);
+int at91_pllb_clk_disable(void);
 
 #endif /* __ASM_ARM_ARCH_CLK_H__ */
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH v2 1/3 ARM: at91: clock: add PLLB enable/disable functions

Hello Wenyou,

Am 27.01.2016 um 03:04 schrieb Wenyou Yang:

Quoted 11 lines

To avoid the duplicated code, add the PLLB handle functions.

Signed-off-by Wenyou Yang <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>

---

Changes in v2: None

  arch/arm/mach-at91/arm926ejs/clock.c  |   38 +++++++++++++++++++++++++++++++++
  arch/arm/mach-at91/include/mach/clk.h |    2 ++
  2 files changed, 40 insertions(+)

Tested on the smartweb board, so:

Tested-by Heiko Schocher <[email protected]>

bye,
Heiko

[1] testlog
http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/48/steps/shell/logs/tbotlog

Quoted 67 lines
arch/arm/mach-at91/arm926ejs/clock.c +38 -0
index c8b5e10..c8d24ae 100644
@@ -18,6 +18,8 @@
  # error You need to define CONFIG_AT91FAMILY in your board config!
  #endif
 
+#define EN_PLLB_TIMEOUT	500
+
  DECLARE_GLOBAL_DATA_PTR;
 
  static unsigned long at91_css_to_rate(unsigned long css)

@@ -242,3 +244,39 @@ void at91_mck_init(u32 mckr)
  	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  		;
  }
+
+int at91_pllb_clk_enable(u32 pllbr)
+{
+	struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+	ulong start_time, tmp_time;
+
+	start_time = get_timer(0);
+	writel(pllbr, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
+		tmp_time = get_timer(0);
+		if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+			printf("ERROR: failed to enable PLLB\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+int at91_pllb_clk_disable(void)
+{
+	struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+	ulong start_time, tmp_time;
+
+	start_time = get_timer(0);
+	writel(0, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) {
+		tmp_time = get_timer(0);
+		if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+			printf("ERROR: failed to disable PLLB\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
arch/arm/mach-at91/include/mach/clk.h +2 -0
index b2604ef..64dec52 100644
@@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
  int at91_upll_clk_enable(void);
  int at91_upll_clk_disable(void);
  void at91_usb_clk_init(u32 value);
+int at91_pllb_clk_enable(u32 pllbr);
+int at91_pllb_clk_disable(void);
 
  #endif /* __ASM_ARM_ARCH_CLK_H__ */
Signature · 2 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
#3 lore raw

PATCH v2 1/3 ARM: at91: clock: add PLLB enable/disable functions

Hello Heiko,

Thank you for your test.

Quoted 102 lines

-----Original Message-----
From: Heiko Schocher [mailto:hs at denx.de]
Sent: 2016?1?27? 14:31
To: Yang, Wenyou <[email protected]>
Cc: U-Boot Mailing List <[email protected]>
Subject: Re: [U-Boot] [PATCH v2 1/3] ARM: at91: clock: add PLLB enable/disable functions

Hello Wenyou,

Am 27.01.2016 um 03:04 schrieb Wenyou Yang:

Quoted 9 lines

To avoid the duplicated code, add the PLLB handle functions.

Signed-off-by Wenyou Yang <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>

---

Changes in v2: None

  arch/arm/mach-at91/arm926ejs/clock.c  |   38

+++++++++++++++++++++++++++++++++

Quoted 2 lines
  arch/arm/mach-at91/include/mach/clk.h |    2 ++
  2 files changed, 40 insertions(+)

Tested on the smartweb board, so:

Tested-by Heiko Schocher <[email protected]>

bye,
Heiko

[1] testlog
http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/48/steps/shell/logs/tb
otlog

Quoted 67 lines
arch/arm/mach-at91/arm926ejs/clock.c +39 -0
index c8b5e10..c8d24ae 100644
@@ -18,6 +18,8 @@
  # error You need to define CONFIG_AT91FAMILY in your board config!
  #endif
 
+#define EN_PLLB_TIMEOUT	500
+
  DECLARE_GLOBAL_DATA_PTR;
 
  static unsigned long at91_css_to_rate(unsigned long css) @@ -242,3
+244,39 @@ void at91_mck_init(u32 mckr)
  	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  		;
  }
+
+int at91_pllb_clk_enable(u32 pllbr)
+{
+	struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+	ulong start_time, tmp_time;
+
+	start_time = get_timer(0);
+	writel(pllbr, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
+		tmp_time = get_timer(0);
+		if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+			printf("ERROR: failed to enable PLLB\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+int at91_pllb_clk_disable(void)
+{
+	struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+	ulong start_time, tmp_time;
+
+	start_time = get_timer(0);
+	writel(0, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) {
+		tmp_time = get_timer(0);
+		if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+			printf("ERROR: failed to disable PLLB\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
arch/arm/mach-at91/include/mach/clk.h +2 -0
index b2604ef..64dec52 100644
@@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
  int at91_upll_clk_enable(void);
  int at91_upll_clk_disable(void);
  void at91_usb_clk_init(u32 value);
+int at91_pllb_clk_enable(u32 pllbr);
+int at91_pllb_clk_disable(void);
Quoted 6 lines

arch/arm/mach-at91/include/mach/clk.h void at91_system_clk_disable(int sys_clk); · line 139

Quoted 2 lines
arch/arm/mach-at91/include/mach/clk.h +0 -0
  #endif /* __ASM_ARM_ARCH_CLK_H__ */

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Best Regards,
Wenyou Yang

author
#4 lore raw

PATCH v2 2/3 drivers: usb: ohci-at91: clean up the PLLB code

In reply to Wenyou Yang

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable/disable code.

Signed-off-by Wenyou Yang <[email protected]>

---

Changes in v2:
- add return value for timeout checking at91_pllb_clk_enable/disable().

 drivers/usb/host/ohci-at91.c |   22 +++++++---------------
 1 file changed, 7 insertions(+), 15 deletions(-)
drivers/usb/host/ohci-at91.c +7 -15
index 6ae6959..e030a0a 100644
@@ -9,20 +9,14 @@
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
 
 int usb_cpu_init(void)
 {
-	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
-	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	if (at91_pllb_clk_enable(get_pllb_init()))
+		return -1;
+
 #ifdef CONFIG_AT91SAM9N12
 	at91_usb_clk_init(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2);
 #endif

@@ -45,8 +39,6 @@ int usb_cpu_init(void)
 
 int usb_cpu_stop(void)
 {
-	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	at91_periph_clk_disable(ATMEL_ID_UHP);
 
 	at91_system_clk_disable(ATMEL_PMC_UHP);

@@ -58,10 +50,10 @@ int usb_cpu_stop(void)
 #ifdef CONFIG_AT91SAM9N12
 	at91_usb_clk_init(0);
 #endif
-	/* Disable PLLB */
-	writel(0, &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
-		;
+
+	if (at91_pllb_clk_disable())
+		return -1;
+
 #elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
 	if (at91_upll_clk_disable())
 		return -1;
Signature · 1 line
1.7.9.5
#5 lore raw

PATCH v2 2/3 drivers: usb: ohci-at91: clean up the PLLB code

Hello Wenyou,

Am 27.01.2016 um 03:04 schrieb Wenyou Yang:

Quoted 11 lines

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable/disable code.

Signed-off-by Wenyou Yang <[email protected]>

---

Changes in v2:
- add return value for timeout checking at91_pllb_clk_enable/disable().

  drivers/usb/host/ohci-at91.c |   22 +++++++---------------
  1 file changed, 7 insertions(+), 15 deletions(-)

Tested on the smartweb board, so:

Tested-by Heiko Schocher <[email protected]>

bye,
Heiko

[1] testlog
http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/48/steps/shell/logs/tbotlog

Quoted 54 lines
drivers/usb/host/ohci-at91.c +7 -15
index 6ae6959..e030a0a 100644
@@ -9,20 +9,14 @@
 
  #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
  #include <asm/arch/clk.h>
 
  int usb_cpu_init(void)
  {
-	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
  #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
-	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	if (at91_pllb_clk_enable(get_pllb_init()))
+		return -1;
+
  #ifdef CONFIG_AT91SAM9N12
  	at91_usb_clk_init(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2);
  #endif

@@ -45,8 +39,6 @@ int usb_cpu_init(void)
 
  int usb_cpu_stop(void)
  {
-	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
  	at91_periph_clk_disable(ATMEL_ID_UHP);
 
  	at91_system_clk_disable(ATMEL_PMC_UHP);

@@ -58,10 +50,10 @@ int usb_cpu_stop(void)
  #ifdef CONFIG_AT91SAM9N12
  	at91_usb_clk_init(0);
  #endif
-	/* Disable PLLB */
-	writel(0, &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
-		;
+
+	if (at91_pllb_clk_disable())
+		return -1;
+
  #elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
  	if (at91_upll_clk_disable())
  		return -1;
Signature · 2 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
#6 lore raw

PATCH v2 2/3 drivers: usb: ohci-at91: clean up the PLLB code

In reply to Wenyou Yang
Quoted 4 lines · Wenyou Yang

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable/disable code.

Signed-off-by Wenyou Yang <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>
Quoted 61 lines

---

Changes in v2:
- add return value for timeout checking at91_pllb_clk_enable/disable().

 drivers/usb/host/ohci-at91.c |   22 +++++++---------------
 1 file changed, 7 insertions(+), 15 deletions(-)
drivers/usb/host/ohci-at91.c +7 -15
index 6ae6959..e030a0a 100644
@@ -9,20 +9,14 @@
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
 
 int usb_cpu_init(void)
 {
-	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
-	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	if (at91_pllb_clk_enable(get_pllb_init()))
+		return -1;
+
 #ifdef CONFIG_AT91SAM9N12
 	at91_usb_clk_init(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2);
 #endif

@@ -45,8 +39,6 @@ int usb_cpu_init(void)
 
 int usb_cpu_stop(void)
 {
-	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	at91_periph_clk_disable(ATMEL_ID_UHP);
 
 	at91_system_clk_disable(ATMEL_PMC_UHP);

@@ -58,10 +50,10 @@ int usb_cpu_stop(void)
 #ifdef CONFIG_AT91SAM9N12
 	at91_usb_clk_init(0);
 #endif
-	/* Disable PLLB */
-	writel(0, &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
-		;
+
+	if (at91_pllb_clk_disable())
+		return -1;
+
 #elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
 	if (at91_upll_clk_disable())
 		return -1;
author
#7 lore raw

PATCH v2 3/3 board: atmel: siemens: clean up PLLB code

In reply to Wenyou Yang

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable code.

Signed-off-by Wenyou Yang <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>

---

Changes in v2:
- collect Reviewed-by from Andreas.

 board/siemens/smartweb/smartweb.c |    6 +-----
 board/siemens/taurus/taurus.c     |    6 +-----
 2 files changed, 2 insertions(+), 10 deletions(-)
board/siemens/smartweb/smartweb.c +1 -5
index e7ee65c..47a60a7 100644
@@ -115,12 +115,8 @@ static void smartweb_macb_hw_init(void)
 
 void at91_udp_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	at91_pllb_clk_enable(get_pllb_init());
 
 	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
 	at91_periph_clk_enable(ATMEL_ID_UDP);
board/siemens/taurus/taurus.c +1 -5
index 9374064..b0385d8 100644
@@ -289,12 +289,8 @@ void spi_cs_deactivate(struct spi_slave *slave)
 
 void at91_udp_hw_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
-
 	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	at91_pllb_clk_enable(get_pllb_init());
 
 	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
 	at91_periph_clk_enable(ATMEL_ID_UDP);
Signature · 1 line
1.7.9.5
#8 lore raw

PATCH v2 3/3 board: atmel: siemens: clean up PLLB code

Hello Wenyou,

Am 27.01.2016 um 03:04 schrieb Wenyou Yang:

Quoted 5 lines

Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable code.

Signed-off-by Wenyou Yang <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>
Quoted 8 lines

---

Changes in v2:
- collect Reviewed-by from Andreas.

  board/siemens/smartweb/smartweb.c |    6 +-----
  board/siemens/taurus/taurus.c     |    6 +-----
  2 files changed, 2 insertions(+), 10 deletions(-)

Tested on the smartweb board, so:

Tested-by Heiko Schocher <[email protected]>

bye,
Heiko

[1] testlog
http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/48/steps/shell/logs/tbotlog

Quoted 38 lines
board/siemens/smartweb/smartweb.c +1 -5
index e7ee65c..47a60a7 100644
@@ -115,12 +115,8 @@ static void smartweb_macb_hw_init(void)
 
  void at91_udp_hw_init(void)
  {
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
-
  	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	at91_pllb_clk_enable(get_pllb_init());
 
  	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
  	at91_periph_clk_enable(ATMEL_ID_UDP);
board/siemens/taurus/taurus.c +1 -5
index 9374064..b0385d8 100644
@@ -289,12 +289,8 @@ void spi_cs_deactivate(struct spi_slave *slave)
 
  void at91_udp_hw_init(void)
  {
-	at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
-
  	/* Enable PLLB */
-	writel(get_pllb_init(), &pmc->pllbr);
-	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
-		;
+	at91_pllb_clk_enable(get_pllb_init());
 
  	/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
  	at91_periph_clk_enable(ATMEL_ID_UDP);
Signature · 2 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany