Initial Microchip PIC32MZ[DA] Support

Add Microchip PIC32MZ[DA] SoC family support.

Signed-off-by Purna Chandra Mandal <[email protected]>

---

Changes in v4:
- drop forcing DM_SERIAL, PIC32_SERIAL, PIC32_PINCTRL in mach-pic32/Kconfig
- drop extra include
- rename clock compatible to "pic32mzda-clk" from "pic32mzda_clk".
- fix typo 'clock-cells' to '#clock-cells'

Changes in v3:
- drop forcing CONFIG_MIPS_BOOT_* selection in mach-pic32/Kconfig
- indent assembly instructions in delay slot
- made GPIO-nodes child of pinctrl-node in devicetree
- replace pic32_ioremap() with ioremap()

Changes in v2:
- drop board_early_init_f
- use macro LEAF(), END() for lowlevel_init
- move initialization of board_init_f() argument to common start.S
- move initdram() from board/microchip/ to mach-pic32/cpu.c
- remove MIPS virtual address in favor physical one in dts file

 arch/mips/dts/pic32mzda.dtsi              | 153 ++++++++++++++++++++++++++++++
 arch/mips/mach-pic32/Kconfig              |  17 +++-
 arch/mips/mach-pic32/Makefile             |   2 +-
 arch/mips/mach-pic32/cpu.c                | 143 ++++++++++++++++++++++++++++
 arch/mips/mach-pic32/include/mach/pic32.h |   3 +
 arch/mips/mach-pic32/lowlevel_init.S      |  27 ++++++
 arch/mips/mach-pic32/reset.c              |  36 +++++++
 7 files changed, 379 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/dts/pic32mzda.dtsi
 create mode 100644 arch/mips/mach-pic32/lowlevel_init.S
 create mode 100644 arch/mips/mach-pic32/reset.c

arch/mips/dts/pic32mzda.dtsi new file +153 -0

new file mode 100644
index 0000000..c67cfa9
@@ -0,0 +1,153 @@
+/*
+ * Copyright 2015 Microchip Technology, Inc.
+ * Purna Chandra Mandal, <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/microchip,clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "microchip,pic32mzda", "microchip,pic32mz";
+
+	aliases {
+		gpio0 = &gpioA;
+		gpio1 = &gpioB;
+		gpio2 = &gpioC;
+		gpio3 = &gpioD;
+		gpio4 = &gpioE;
+		gpio5 = &gpioF;
+		gpio6 = &gpioG;
+		gpio7 = &gpioH;
+		gpio8 = &gpioJ;
+		gpio9 = &gpioK;
+	};
+
+	cpus {
+		cpu at 0 {
+			compatible = "mips,mips14kc";
+		};
+	};
+
+	clock: clk at 1f801200 {
+		compatible = "microchip,pic32mzda-clk";
+		reg = <0x1f801200 0x1000>;
+		#clock-cells = <1>;
+	};
+
+	uart1: serial at 1f822000 {
+		compatible = "microchip,pic32mzda-uart";
+		reg = <0x1f822000 0x50>;
+		interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+		clocks = <&clock PB2CLK>;
+	};
+
+	uart2: serial at 1f822200 {
+		compatible = "microchip,pic32mzda-uart";
+		reg = <0x1f822200 0x50>;
+		interrupts = <145 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clock PB2CLK>;
+		status = "disabled";
+	};
+
+	uart6: serial at 1f822a00 {
+		compatible = "microchip,pic32mzda-uart";
+		reg = <0x1f822a00 0x50>;
+		interrupts = <188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clock PB2CLK>;
+		status = "disabled";
+	};
+
+	evic: interrupt-controller at 1f810000 {
+		compatible = "microchip,pic32mzda-evic";
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		reg = <0x1f810000 0x1000>;
+	};
+
+	pinctrl: pinctrl at 1f801400 {
+		compatible = "microchip,pic32mzda-pinctrl";
+		reg = <0x1f801400 0x100>, /* in  */
+		      <0x1f801500 0x200>, /* out */
+		      <0x1f860000 0xa00>; /* port */
+		reg-names = "ppsin","ppsout","port";
+		status = "disabled";
+
+		ranges = <0 0x1f860000 0xa00>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		gpioA: gpio0 at 0 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x000 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioB: gpio1 at 100 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x100 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioC: gpio2 at 200 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x200 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioD: gpio3 at 300 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x300 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioE: gpio4 at 400 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x400 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioF: gpio5 at 500 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x500 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioG: gpio6 at 600 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x600 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioH: gpio7 at 700 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x700 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioJ: gpio8 at 800 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x800 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		gpioK: gpio9 at 900 {
+			compatible = "microchip,pic32mzda-gpio";
+			reg = <0x900 0x48>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};

arch/mips/mach-pic32/Kconfig +16 -1

index c1cc5e3..f636266 100644
@@ -2,6 +2,21 @@ menu "Microchip PIC32 platforms"
 	depends on MACH_PIC32
 
 config SYS_SOC
-	default "none"
+	default "pic32mzda" if SOC_PIC32MZDA
+
+choice
+	prompt "PIC32 SoC select"
+
+config SOC_PIC32MZDA
+	bool "Microchip PIC32MZ[DA] family"
+	select SUPPORTS_LITTLE_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select SUPPORTS_CPU_MIPS32_R2
+	select MIPS_L1_CACHE_SHIFT_4
+	select SYS_MIPS_CACHE_INIT_RAM_LOAD
+	help
+	  This supports Microchip PIC32MZ[DA] family of microcontrollers.
+
+endchoice
 
 endmenu

arch/mips/mach-pic32/Makefile +1 -1

index cb42607..e321e65 100644
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
-obj-y = cpu.o
+obj-y = cpu.o lowlevel_init.o reset.o
\ No newline at end of file

arch/mips/mach-pic32/cpu.c +143 -0

index 58fd3ab..f2ee911 100644
@@ -6,8 +6,151 @@
  *
  */
 #include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <mach/pic32.h>
+#include <mach/ddr.h>
+#include <dt-bindings/clock/microchip,clock.h>
 
+/* Flash prefetch */
+#define PRECON          0x00
+
+/* Flash ECCCON */
+#define ECC_MASK	0x03
+#define ECC_SHIFT	4
+
+#define CLK_MHZ(x)	((x) / 1000000)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static ulong clk_get_cpu_rate(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
+	if (ret) {
+		panic("uclass-clk: device not found\n");
+		return 0;
+	}
+
+	return clk_get_rate(dev);
+}
+
+/* initialize prefetch module related to cpu_clk */
+static void prefetch_init(void)
+{
+	struct pic32_reg_atomic *regs;
+	const void __iomem *base;
+	int v, nr_waits;
+	ulong rate;
+
+	/* cpu frequency in MHZ */
+	rate = clk_get_cpu_rate() / 1000000;
+
+	/* get flash ECC type */
+	base = pic32_get_syscfg_base();
+	v = (readl(base + CFGCON) >> ECC_SHIFT) & ECC_MASK;
+
+	if (v < 2) {
+		if (rate < 66)
+			nr_waits = 0;
+		else if (rate < 133)
+			nr_waits = 1;
+		else
+			nr_waits = 2;
+	} else {
+		if (rate <= 83)
+			nr_waits = 0;
+		else if (rate <= 166)
+			nr_waits = 1;
+		else
+			nr_waits = 2;
+	}
+
+	regs = ioremap(PREFETCH_BASE + PRECON, sizeof(*regs));
+	writel(nr_waits, &regs->raw);
+
+	/* Enable prefetch for all */
+	writel(0x30, &regs->set);
+	iounmap(regs);
+}
+
+/* arch specific CPU init after DM */
+int arch_cpu_init_dm(void)
+{
+	/* flash prefetch */
+	prefetch_init();
+	return 0;
+}
+
+/* Un-gate DDR2 modules (gated by default) */
+static void ddr2_pmd_ungate(void)
+{
+	void __iomem *regs;
+
+	regs = pic32_get_syscfg_base();
+	writel(0, regs + PMD7);
+}
+
+/* initialize the DDR2 Controller and DDR2 PHY */
 phys_size_t initdram(int board_type)
 {
+	ddr2_pmd_ungate();
+	ddr2_phy_init();
+	ddr2_ctrl_init();
+	return ddr2_calculate_size();
+}
+
+int misc_init_r(void)
+{
+	set_io_port_base(0);
+	return 0;
+}
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+const char *get_core_name(void)
+{
+	u32 proc_id;
+	const char *str;
+
+	proc_id = read_c0_prid();
+	switch (proc_id) {
+	case 0x19e28:
+		str = "PIC32MZ[DA]";
+		break;
+	default:
+		str = "UNKNOWN";
+	}
+
+	return str;
+}
+#endif
+#ifdef CONFIG_CMD_CLK
+int soc_clk_dump(void)
+{
+	int i, ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
+	if (ret) {
+		printf("clk-uclass not found\n");
+		return ret;
+	}
+
+	printf("PLL Speed: %lu MHz\n",
+	       CLK_MHZ(clk_get_periph_rate(dev, PLLCLK)));
+	printf("CPU Speed: %lu MHz\n", CLK_MHZ(clk_get_rate(dev)));
+	printf("MPLL Speed: %lu MHz\n",
+	       CLK_MHZ(clk_get_periph_rate(dev, MPLL)));
+
+	for (i = PB1CLK; i <= PB7CLK; i++)
+		printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
+		       CLK_MHZ(clk_get_periph_rate(dev, i)));
+
+	for (i = REF1CLK; i <= REF5CLK; i++)
+		printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
+		       CLK_MHZ(clk_get_periph_rate(dev, i)));
 	return 0;
 }
+#endif

arch/mips/mach-pic32/include/mach/pic32.h +3 -0

index 7e41810..16bfacf 100644
@@ -73,4 +73,7 @@ static inline void __iomem *pic32_get_syscfg_base(void)
 	return (void __iomem *)CKSEG1ADDR(PIC32_CFG_BASE);
 }
 
+/* Core */
+const char *get_core_name(void);
+
 #endif	/* __PIC32_REGS_H__ */

arch/mips/mach-pic32/lowlevel_init.S new file +27 -0

new file mode 100644
index 0000000..e37bebb
@@ -0,0 +1,27 @@
+/*
+ * (c) 2015 Purna Chandra Mandal <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+*/
+
+#include <config.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/asm.h>
+
+LEAF(lowlevel_init)
+	/*
+	 * Establish Cause
+	 * (set IV bit)
+	 */
+	li	t1, 0x00800000
+	mtc0	t1, CP0_CAUSE
+
+	/* Establish Wired (and Random) */
+	mtc0	zero, CP0_WIRED
+	 nop
+
+	jr	ra
+	 nop
+	END(lowlevel_init)

arch/mips/mach-pic32/reset.c new file +36 -0

new file mode 100644
index 0000000..66c6833
@@ -0,0 +1,36 @@
+/*
+ * (c) 2015 Purna Chandra Mandal <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <mach/pic32.h>
+
+/* SYSKEY */
+#define UNLOCK_KEY1	0xaa996655
+#define UNLOCK_KEY2	0x556699aa
+#define LOCK_KEY	0
+
+#define RSWRST          0x1250
+
+void _machine_restart(void)
+{
+	void __iomem *base;
+
+	base = pic32_get_syscfg_base();
+
+	/* unlock sequence */
+	writel(LOCK_KEY, base + SYSKEY);
+	writel(UNLOCK_KEY1, base + SYSKEY);
+	writel(UNLOCK_KEY2, base + SYSKEY);
+
+	/* soft reset */
+	writel(0x1, base + RSWRST);
+	(void) readl(base + RSWRST);
+
+	while (1)
+		;
+}

This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller.

Signed-off-by Purna Chandra Mandal <[email protected]>

---

Changes in v4:
- create defconfig by 'make savedefconfig'
- drop explicit SYS_BAUDRATE_TABLE in favor of default one

Changes in v3:
- drop SKIP_LOWLEVEL_INIT, GBL_DATA_OFFSET from config header
- move CMD_MEMTEST, CMD_MEMINFO to defconfig
- increase SYS_MALLOC_F_LEN to 0x600
- use auto-generated defconfig - no hand edit

Changes in v2:
- move CONFIG_SYS_TEXT_BASE (from board/*/config.mk) to include/configs/<board>.h

 arch/mips/dts/Makefile                |  2 +-
 arch/mips/dts/pic32mzda_sk.dts        | 38 ++++++++++++++
 arch/mips/mach-pic32/Kconfig          | 13 +++++
 board/microchip/pic32mzda/Kconfig     | 13 +++++
 board/microchip/pic32mzda/MAINTAINERS |  6 +++
 board/microchip/pic32mzda/Makefile    |  7 +++
 board/microchip/pic32mzda/README      | 22 +++++++++
 board/microchip/pic32mzda/pic32mzda.c | 31 ++++++++++++
 configs/pic32mzdask_defconfig         | 30 +++++++++++
 include/configs/pic32mzdask.h         | 93 +++++++++++++++++++++++++++++++++++
 10 files changed, 254 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/pic32mzda_sk.dts
 create mode 100644 board/microchip/pic32mzda/Kconfig
 create mode 100644 board/microchip/pic32mzda/MAINTAINERS
 create mode 100644 board/microchip/pic32mzda/Makefile
 create mode 100644 board/microchip/pic32mzda/README
 create mode 100644 board/microchip/pic32mzda/pic32mzda.c
 create mode 100644 configs/pic32mzdask_defconfig
 create mode 100644 include/configs/pic32mzdask.h

arch/mips/dts/Makefile +1 -1

index 47b6eb5..b513918 100644
@@ -2,7 +2,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-dtb-y +=
+dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 
 targets += $(dtb-y)
 

arch/mips/dts/pic32mzda_sk.dts new file +38 -0

new file mode 100644
index 0000000..99e7f64
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2015 Purna Chandra Mandal, purna.mandal at microchip.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "pic32mzda.dtsi"
+
+/ {
+	model = "Microchip PIC32MZDASK";
+	compatible = "microchip,pic32mzdask", "microchip,pic32mzda";
+
+	aliases {
+		console = &uart2;
+		serial0 = &uart2;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&clock {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};

arch/mips/mach-pic32/Kconfig +13 -0

index f636266..2e38bb7 100644
@@ -19,4 +19,17 @@ config SOC_PIC32MZDA
 
 endchoice
 
+choice
+	prompt "Board select"
+
+config TARGET_PIC32MZDASK
+	bool "Microchip PIC32MZ[DA] Starter Kit"
+	depends on SOC_PIC32MZDA
+	help
+	  This supports Microchip PIC32MZ[DA] Starter Kit.
+
+endchoice
+
+source "board/microchip/pic32mzda/Kconfig"
+
 endmenu

board/microchip/pic32mzda/Kconfig new file +13 -0

new file mode 100644
index 0000000..8acb393
@@ -0,0 +1,13 @@
+
+if TARGET_PIC32MZDASK
+
+config SYS_BOARD
+	default "pic32mzda"
+
+config SYS_VENDOR
+	default "microchip"
+
+config SYS_CONFIG_NAME
+	default "pic32mzdask"
+
+endif

board/microchip/pic32mzda/MAINTAINERS new file +6 -0

new file mode 100644
index 0000000..c934f1a
@@ -0,0 +1,6 @@
+PIC32MZDASK BOARD
+M:	Purna Chandra Mandal <[email protected]>
+S:	Maintained
+F:	board/microchip/pic32mzda/
+F:	include/configs/pic32mzdask.h
+F:	configs/pic32mzdask_defconfig

board/microchip/pic32mzda/Makefile new file +7 -0

new file mode 100644
index 0000000..3629530
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015
+# Purna Chandra Mandal, purna.mandal at microchip.com.
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+obj-y := pic32mzda.o

board/microchip/pic32mzda/README new file +22 -0

new file mode 100644
index 0000000..91d16ab
@@ -0,0 +1,22 @@
+/*
+ * (c) 2015 Purna Chandra Mandal <[email protected]>
+ */
+
+PIC32MZ[DA] Starter Kit
+----------------------------------------
+PIC32MZ[DA] Starter Kit is based on PIC32MZ[DA] family of micro-controller.
+This family is powered by MIPS M14KEC 32bit general purpose core and has
+advanced microcontroller features and peripherals.
+
+This processor boots with proprietary stage1 bootloader running from internal
+boot-flash. Stage1 bootloader inturns locates and jumps to U-Boot programmed
+on internal program-flash. Finally U-Boot loads OS image (along with other
+required files for booting) from either uSD card, or ethernet, or from USB
+storage.
+
+To boot Linux following three files are mandatory - uEnv.txt (custom U-Boot
+environment file), uImage, *.dtb (platform device-tree-blob file).
+
+U-Boot jumps to Linux using UHI specification.
+
+Visit http://microchip.com for details.

board/microchip/pic32mzda/pic32mzda.c new file +31 -0

new file mode 100644
index 0000000..afe2ab8
@@ -0,0 +1,31 @@
+/*
+ * Microchip PIC32MZ[DA] Starter Kit board
+ *
+ * Copyright (C) 2015, Microchip Technology Inc.
+ * Purna Chandra Mandal <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <clk.h>
+#include <mach/pic32.h>
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+	ulong rate = 0;
+	struct udevice *dev;
+
+	printf("Core: %s\n", get_core_name());
+
+	if (!uclass_get_device(UCLASS_CLK, 0, &dev)) {
+		rate = clk_get_rate(dev);
+		printf("CPU Speed: %lu MHz\n", rate / 1000000);
+	}
+
+	return 0;
+}
+#endif

configs/pic32mzdask_defconfig new file +30 -0

new file mode 100644
index 0000000..1c968fc
@@ -0,0 +1,30 @@
+CONFIG_MIPS=y
+CONFIG_SYS_MALLOC_F_LEN=0x600
+CONFIG_DM_SERIAL=y
+CONFIG_DM_GPIO=y
+CONFIG_MACH_PIC32=y
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="dask # "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_SAVEENV is not set
+CONFIG_LOOPW=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_TIME=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_SYS_VSNPRINTF=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_REGEX=y
+CONFIG_CMD_DHRYSTONE=y

include/configs/pic32mzdask.h new file +93 -0

new file mode 100644
index 0000000..5ba2a19
@@ -0,0 +1,93 @@
+/*
+ * (c) 2015 Purna Chandra Mandal <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Microchip PIC32MZ[DA] Starter Kit.
+ */
+
+#ifndef __PIC32MZDASK_CONFIG_H
+#define __PIC32MZDASK_CONFIG_H
+
+/* System Configuration */
+#define CONFIG_SYS_TEXT_BASE		0x9d004000 /* .text */
+#define CONFIG_DISPLAY_BOARDINFO
+
+/*--------------------------------------------
+ * CPU configuration
+ */
+/* CPU Timer rate */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	100000000
+
+/* Cache Configuration */
+#define CONFIG_SYS_MIPS_CACHE_MODE	CONF_CM_CACHABLE_NONCOHERENT
+
+/*----------------------------------------------------------------------
+ * Memory Layout
+ */
+#define CONFIG_SYS_SRAM_BASE		0x80000000
+#define CONFIG_SYS_SRAM_SIZE		0x00080000 /* 512K */
+
+/* Initial RAM for temporary stack, global data */
+#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
+#define CONFIG_SYS_INIT_RAM_ADDR	\
+	(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
+
+/* SDRAM Configuration (for final code, data, stack, heap) */
+#define CONFIG_SYS_SDRAM_BASE		0x88000000
+#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(4 << 10)
+#define CONFIG_STACKSIZE		(4 << 10) /* regular stack */
+
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN		(192 << 10)
+
+#define CONFIG_SYS_LOAD_ADDR		0x88500000 /* default load address */
+#define CONFIG_SYS_ENV_ADDR		0x88300000
+
+/* Memory Test */
+#define CONFIG_SYS_MEMTEST_START	0x88000000
+#define CONFIG_SYS_MEMTEST_END		0x88080000
+
+/*----------------------------------------------------------------------
+ * Commands
+ */
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_CMD_CLK
+
+/*-------------------------------------------------
+ * FLASH configuration
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*------------------------------------------------------------
+ * Console Configuration
+ */
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_CBSIZE		1024 /* Console I/O Buffer Size   */
+#define CONFIG_SYS_MAXARGS		16   /* max number of command args*/
+#define CONFIG_SYS_PBSIZE		\
+		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_CMDLINE_EDITING		1
+
+/*
+ * Handover flattened device tree (dtb file) to Linux kernel
+ */
+#define CONFIG_OF_LIBFDT	1
+
+/* -------------------------------------------------
+ * Environment
+ */
+#define CONFIG_ENV_IS_NOWHERE	1
+#define CONFIG_ENV_SIZE		0x4000
+
+/* ---------------------------------------------------------------------
+ * Board boot configuration
+ */
+#define CONFIG_TIMESTAMP	/* Print image info with timestamp */
+#define CONFIG_BOOTDELAY	5 /* autoboot after X seconds     */
+#undef	CONFIG_BOOTARGS
+
+#endif	/* __PIC32MZDASK_CONFIG_H */

Am 28.01.2016 um 11:00 schrieb Purna Chandra Mandal:

Quoted 4 lines

This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller.

Signed-off-by Purna Chandra Mandal <[email protected]>

Reviewed-by Daniel Schwierzeck <[email protected]>

Quoted 360 lines

---

Changes in v4:
- create defconfig by 'make savedefconfig'
- drop explicit SYS_BAUDRATE_TABLE in favor of default one

Changes in v3:
- drop SKIP_LOWLEVEL_INIT, GBL_DATA_OFFSET from config header
- move CMD_MEMTEST, CMD_MEMINFO to defconfig
- increase SYS_MALLOC_F_LEN to 0x600
- use auto-generated defconfig - no hand edit

Changes in v2:
- move CONFIG_SYS_TEXT_BASE (from board/*/config.mk) to include/configs/<board>.h

 arch/mips/dts/Makefile                |  2 +-
 arch/mips/dts/pic32mzda_sk.dts        | 38 ++++++++++++++
 arch/mips/mach-pic32/Kconfig          | 13 +++++
 board/microchip/pic32mzda/Kconfig     | 13 +++++
 board/microchip/pic32mzda/MAINTAINERS |  6 +++
 board/microchip/pic32mzda/Makefile    |  7 +++
 board/microchip/pic32mzda/README      | 22 +++++++++
 board/microchip/pic32mzda/pic32mzda.c | 31 ++++++++++++
 configs/pic32mzdask_defconfig         | 30 +++++++++++
 include/configs/pic32mzdask.h         | 93 +++++++++++++++++++++++++++++++++++
 10 files changed, 254 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/pic32mzda_sk.dts
 create mode 100644 board/microchip/pic32mzda/Kconfig
 create mode 100644 board/microchip/pic32mzda/MAINTAINERS
 create mode 100644 board/microchip/pic32mzda/Makefile
 create mode 100644 board/microchip/pic32mzda/README
 create mode 100644 board/microchip/pic32mzda/pic32mzda.c
 create mode 100644 configs/pic32mzdask_defconfig
 create mode 100644 include/configs/pic32mzdask.h

arch/mips/dts/Makefile +1 -1

index 47b6eb5..b513918 100644
@@ -2,7 +2,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-dtb-y +=
+dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 
 targets += $(dtb-y)
 

arch/mips/dts/pic32mzda_sk.dts new file +38 -0

new file mode 100644
index 0000000..99e7f64
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2015 Purna Chandra Mandal, purna.mandal at microchip.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "pic32mzda.dtsi"
+
+/ {
+	model = "Microchip PIC32MZDASK";
+	compatible = "microchip,pic32mzdask", "microchip,pic32mzda";
+
+	aliases {
+		console = &uart2;
+		serial0 = &uart2;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&clock {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};

arch/mips/mach-pic32/Kconfig +13 -0

index f636266..2e38bb7 100644
@@ -19,4 +19,17 @@ config SOC_PIC32MZDA
 
 endchoice
 
+choice
+	prompt "Board select"
+
+config TARGET_PIC32MZDASK
+	bool "Microchip PIC32MZ[DA] Starter Kit"
+	depends on SOC_PIC32MZDA
+	help
+	  This supports Microchip PIC32MZ[DA] Starter Kit.
+
+endchoice
+
+source "board/microchip/pic32mzda/Kconfig"
+
 endmenu

board/microchip/pic32mzda/Kconfig new file +13 -0

new file mode 100644
index 0000000..8acb393
@@ -0,0 +1,13 @@
+
+if TARGET_PIC32MZDASK
+
+config SYS_BOARD
+	default "pic32mzda"
+
+config SYS_VENDOR
+	default "microchip"
+
+config SYS_CONFIG_NAME
+	default "pic32mzdask"
+
+endif

board/microchip/pic32mzda/MAINTAINERS new file +6 -0

new file mode 100644
index 0000000..c934f1a
@@ -0,0 +1,6 @@
+PIC32MZDASK BOARD
+M:	Purna Chandra Mandal <[email protected]>
+S:	Maintained
+F:	board/microchip/pic32mzda/
+F:	include/configs/pic32mzdask.h
+F:	configs/pic32mzdask_defconfig

board/microchip/pic32mzda/Makefile new file +7 -0

new file mode 100644
index 0000000..3629530
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015
+# Purna Chandra Mandal, purna.mandal at microchip.com.
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+obj-y := pic32mzda.o

board/microchip/pic32mzda/README new file +22 -0

new file mode 100644
index 0000000..91d16ab
@@ -0,0 +1,22 @@
+/*
+ * (c) 2015 Purna Chandra Mandal <[email protected]>
+ */
+
+PIC32MZ[DA] Starter Kit
+----------------------------------------
+PIC32MZ[DA] Starter Kit is based on PIC32MZ[DA] family of micro-controller.
+This family is powered by MIPS M14KEC 32bit general purpose core and has
+advanced microcontroller features and peripherals.
+
+This processor boots with proprietary stage1 bootloader running from internal
+boot-flash. Stage1 bootloader inturns locates and jumps to U-Boot programmed
+on internal program-flash. Finally U-Boot loads OS image (along with other
+required files for booting) from either uSD card, or ethernet, or from USB
+storage.
+
+To boot Linux following three files are mandatory - uEnv.txt (custom U-Boot
+environment file), uImage, *.dtb (platform device-tree-blob file).
+
+U-Boot jumps to Linux using UHI specification.
+
+Visit http://microchip.com for details.

board/microchip/pic32mzda/pic32mzda.c new file +31 -0

new file mode 100644
index 0000000..afe2ab8
@@ -0,0 +1,31 @@
+/*
+ * Microchip PIC32MZ[DA] Starter Kit board
+ *
+ * Copyright (C) 2015, Microchip Technology Inc.
+ * Purna Chandra Mandal <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <clk.h>
+#include <mach/pic32.h>
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+	ulong rate = 0;
+	struct udevice *dev;
+
+	printf("Core: %s\n", get_core_name());
+
+	if (!uclass_get_device(UCLASS_CLK, 0, &dev)) {
+		rate = clk_get_rate(dev);
+		printf("CPU Speed: %lu MHz\n", rate / 1000000);
+	}
+
+	return 0;
+}
+#endif

configs/pic32mzdask_defconfig new file +30 -0

new file mode 100644
index 0000000..1c968fc
@@ -0,0 +1,30 @@
+CONFIG_MIPS=y
+CONFIG_SYS_MALLOC_F_LEN=0x600
+CONFIG_DM_SERIAL=y
+CONFIG_DM_GPIO=y
+CONFIG_MACH_PIC32=y
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="dask # "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_SAVEENV is not set
+CONFIG_LOOPW=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_TIME=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_SYS_VSNPRINTF=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_REGEX=y
+CONFIG_CMD_DHRYSTONE=y

include/configs/pic32mzdask.h new file +93 -0

new file mode 100644
index 0000000..5ba2a19
@@ -0,0 +1,93 @@
+/*
+ * (c) 2015 Purna Chandra Mandal <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Microchip PIC32MZ[DA] Starter Kit.
+ */
+
+#ifndef __PIC32MZDASK_CONFIG_H
+#define __PIC32MZDASK_CONFIG_H
+
+/* System Configuration */
+#define CONFIG_SYS_TEXT_BASE		0x9d004000 /* .text */
+#define CONFIG_DISPLAY_BOARDINFO
+
+/*--------------------------------------------
+ * CPU configuration
+ */
+/* CPU Timer rate */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	100000000
+
+/* Cache Configuration */
+#define CONFIG_SYS_MIPS_CACHE_MODE	CONF_CM_CACHABLE_NONCOHERENT
+
+/*----------------------------------------------------------------------
+ * Memory Layout
+ */
+#define CONFIG_SYS_SRAM_BASE		0x80000000
+#define CONFIG_SYS_SRAM_SIZE		0x00080000 /* 512K */
+
+/* Initial RAM for temporary stack, global data */
+#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
+#define CONFIG_SYS_INIT_RAM_ADDR	\
+	(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
+
+/* SDRAM Configuration (for final code, data, stack, heap) */
+#define CONFIG_SYS_SDRAM_BASE		0x88000000
+#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(4 << 10)
+#define CONFIG_STACKSIZE		(4 << 10) /* regular stack */
+
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN		(192 << 10)
+
+#define CONFIG_SYS_LOAD_ADDR		0x88500000 /* default load address */
+#define CONFIG_SYS_ENV_ADDR		0x88300000
+
+/* Memory Test */
+#define CONFIG_SYS_MEMTEST_START	0x88000000
+#define CONFIG_SYS_MEMTEST_END		0x88080000
+
+/*----------------------------------------------------------------------
+ * Commands
+ */
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_CMD_CLK
+
+/*-------------------------------------------------
+ * FLASH configuration
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*------------------------------------------------------------
+ * Console Configuration
+ */
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_CBSIZE		1024 /* Console I/O Buffer Size   */
+#define CONFIG_SYS_MAXARGS		16   /* max number of command args*/
+#define CONFIG_SYS_PBSIZE		\
+		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_CMDLINE_EDITING		1
+
+/*
+ * Handover flattened device tree (dtb file) to Linux kernel
+ */
+#define CONFIG_OF_LIBFDT	1
+
+/* -------------------------------------------------
+ * Environment
+ */
+#define CONFIG_ENV_IS_NOWHERE	1
+#define CONFIG_ENV_SIZE		0x4000
+
+/* ---------------------------------------------------------------------
+ * Board boot configuration
+ */
+#define CONFIG_TIMESTAMP	/* Print image info with timestamp */
+#define CONFIG_BOOTDELAY	5 /* autoboot after X seconds     */
+#undef	CONFIG_BOOTARGS
+
+#endif	/* __PIC32MZDASK_CONFIG_H */

Add SMSC LAN8740 Phy support required for PIC32MZDA devices.

Signed-off-by Purna Chandra Mandal <[email protected]>

Reviewed-by Tom Rini <[email protected]>

Reviewed-by Daniel Schwierzeck <[email protected]>

This patch series adds support for Microchip PIC32MZ[DA] MIPS microcontroller platform. All drivers required to boot from MMC uSD card and network are included in it; clock, pinctrl, gpio, DDR2, serial, SDHCI, ethernet.
This series been tested on PIC32MZ[DA] Starter Kit.

This series is generated on u-boot/master branch. A tree with these changes is available at [1].

[1] https://github.com/purna-mandal/u-boot/tree/pic32-upstream-v4
[0] https://github.com/purna-mandal/u-boot/tree/pic32-upstream-v3

Changes in v4:
- update kconfig dependency and default selection
- drop ioremap failure check
- gpio: return -EPERM if the pin is found in analog mode
- gpio: drop desc->offset setting in _gpio_xlate()
- serial: update comment for _pending_input().
- serial: rename UART_RX_OERR to UART_RX_OVER.
- serial: DEBUG_UART_PIC32 now depends on PIC32_SERIAL
- serial: extract clock-id from device-tree
- drop forcing DM_SERIAL, PIC32_SERIAL, PIC32_PINCTRL in mach-pic32/Kconfig
- drop extra includes
- rename clock compatible to "pic32mzda-clk" from "pic32mzda_clk".
- fix typo 'clock-cells' to '#clock-cells'
- create defconfig by 'make savedefconfig'
- drop explicit SYS_BAUDRATE_TABLE in favor of default one
- add CD errata under SDHCI_QUIRK_NO_CD
- eth: drop _dcache_flush/invalidate() helpers for flush/invalidate_dcache_range().

Changes in v3:
- drop empty choice in mach-pic32/Kconfig
- add pic32_get_syscfg_base()
- rename clk-pic32.c to clk_pic32.c
- update clock binding documentation
- replace pic32_ioremap() with ioremap()
- separate MPLL initialization constants
- read register base from device-tree
- add/update comments to explain how pinctrl'r works.
- replace pic32_ioremap() with ioremap().
- add check on dev_get_addr()
- remove ofdata_to_platdata, and replace platdata with priv
- remove special handling of '\r' as being handled by serial-uclass
- remove loop to wait for space in tx buffer before pumping char
- annotating fixed table with const
- fix camel-case in ddr2 timing parameters
- fix cmd index parameter of host_load_cmd().
- fix compilation warning
- drop forcing CONFIG_MIPS_BOOT_* selection in mach-pic32/Kconfig
- indent assembly instructions in delay slot
- made GPIO-nodes child of pinctrl-node in devicetree
- replace pic32_ioremap() with ioremap()
- drop SKIP_LOWLEVEL_INIT, GBL_DATA_OFFSET from config header
- move CMD_MEMTEST, CMD_MEMINFO to defconfig
- increase SYS_MALLOC_F_LEN to 0x600
- use auto-generated defconfig - no hand edit
- remove ofdata_to_platdata, and replace platdata with priv
- replace pic32_ioremap() with ioremap()
- use distro boot commands from config_distro_bootcmd.h
- separate old booting logic as legacy_bootcmd
- merge wrappers with eth operation callbacks
- read phy address from device-tree
- rename functions (e.g. _eth_xyz() with pic32_eth_xyz())

Changes in v2:
- move PIC32 specific headers to arch/mips/mach-pic32/include/mach/
- define register-base as physical address
- drop CONFIG_PIC32_SUPPORTS_FDT_BOOT
- add mpll get clock rate
- add pinconf routine for configuring pin property
- fix missing/corrupted chars during baud rate change
- remove loop until any char is avaialbale in getc()
- move ddr2 initialization from board/microchip/ to drivers/ddr/microchip
- drop board_early_init_f
- use macro LEAF(), END() for lowlevel_init
- move initialization of board_init_f() argument to common start.S
- move initdram() from board/microchip/ to mach-pic32/cpu.c
- remove MIPS virtual address in favor physical one in dts file
- move CONFIG_SYS_TEXT_BASE (from board/*/config.mk) to include/configs/<board>.h
- drop sdhci shared bus configuration (for shared interrupt, clock pins)
- drop shared bus (shared pin selection) configuration.
- replace unbounded loop with wait_for_bit()
- replace register access as readl/writel(base + offset)
- translate (dts provided) physical address to MIPS kseg1 address before use

Andrei Pistirica (1):
drivers: mmc: add driver for Microchip PIC32 SDHCI controller.

Paul Thacker (1):
drivers: serial: add driver for Microchip PIC32 UART controller.

Purna Chandra Mandal (11):
MIPS: initial infrastructure for Microchip PIC32 architecture
drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.
drivers: pinctrl: Add pinctrl driver for Microchip PIC32.
drivers: gpio: add driver for Microchip PIC32 GPIO controller.
drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
MIPS: Add support for Microchip PIC32MZ[DA] SoC family.
board: Add Microchip PIC32MZ[DA]-Starter-Kit board.
board: add SDHCI support for PIC32MZDASK board.
drivers: net: phy: add SMSC LAN8740 Phy support.
drivers: net: Add ethernet driver for Microchip PIC32.
board: Enable ethernet, tftpboot support to pic32mzdask board.

 arch/mips/Kconfig                                  |   6 +
 arch/mips/Makefile                                 |   1 +
 arch/mips/dts/Makefile                             |   2 +-
 arch/mips/dts/pic32mzda.dtsi                       | 174 ++++++
 arch/mips/dts/pic32mzda_sk.dts                     |  55 ++
 arch/mips/mach-pic32/Kconfig                       |  35 ++
 arch/mips/mach-pic32/Makefile                      |   7 +
 arch/mips/mach-pic32/cpu.c                         | 156 ++++++
 arch/mips/mach-pic32/include/mach/ddr.h            |  32 ++
 arch/mips/mach-pic32/include/mach/pic32.h          |  79 +++
 arch/mips/mach-pic32/lowlevel_init.S               |  27 +
 arch/mips/mach-pic32/reset.c                       |  36 ++
 board/microchip/pic32mzda/Kconfig                  |  13 +
 board/microchip/pic32mzda/MAINTAINERS              |   6 +
 board/microchip/pic32mzda/Makefile                 |   7 +
 board/microchip/pic32mzda/README                   |  22 +
 board/microchip/pic32mzda/pic32mzda.c              |  31 ++
 configs/pic32mzdask_defconfig                      |  34 ++
 .../clock/microchip,pic32-clock.txt                |  33 ++
 .../serial/microchip,pic32-uart.txt                |   5 +
 drivers/Makefile                                   |   1 +
 drivers/clk/Makefile                               |   1 +
 drivers/clk/clk_pic32.c                            | 433 +++++++++++++++
 drivers/ddr/microchip/Makefile                     |   6 +
 drivers/ddr/microchip/ddr2.c                       | 278 ++++++++++
 drivers/ddr/microchip/ddr2_regs.h                  | 148 +++++
 drivers/ddr/microchip/ddr2_timing.h                |  65 +++
 drivers/gpio/Kconfig                               |   7 +
 drivers/gpio/Makefile                              |   2 +-
 drivers/gpio/pic32_gpio.c                          | 174 ++++++
 drivers/mmc/Kconfig                                |   6 +
 drivers/mmc/Makefile                               |   2 +-
 drivers/mmc/pic32_sdhci.c                          |  58 ++
 drivers/mmc/sdhci.c                                |   7 +
 drivers/net/Kconfig                                |   8 +
 drivers/net/Makefile                               |   1 +
 drivers/net/phy/smsc.c                             |  10 +
 drivers/net/pic32_eth.c                            | 605 +++++++++++++++++++++
 drivers/net/pic32_eth.h                            | 164 ++++++
 drivers/net/pic32_mdio.c                           | 121 +++++
 drivers/pinctrl/Kconfig                            |  10 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/pinctrl_pic32.c                    | 363 +++++++++++++
 drivers/serial/Kconfig                             |  15 +
 drivers/serial/Makefile                            |   1 +
 drivers/serial/serial_pic32.c                      | 198 +++++++
 include/configs/pic32mzdask.h                      | 168 ++++++
 include/dt-bindings/clock/microchip,clock.h        |  29 +
 48 files changed, 3640 insertions(+), 3 deletions(-)
 create mode 100644 arch/mips/dts/pic32mzda.dtsi
 create mode 100644 arch/mips/dts/pic32mzda_sk.dts
 create mode 100644 arch/mips/mach-pic32/Kconfig
 create mode 100644 arch/mips/mach-pic32/Makefile
 create mode 100644 arch/mips/mach-pic32/cpu.c
 create mode 100644 arch/mips/mach-pic32/include/mach/ddr.h
 create mode 100644 arch/mips/mach-pic32/include/mach/pic32.h
 create mode 100644 arch/mips/mach-pic32/lowlevel_init.S
 create mode 100644 arch/mips/mach-pic32/reset.c
 create mode 100644 board/microchip/pic32mzda/Kconfig
 create mode 100644 board/microchip/pic32mzda/MAINTAINERS
 create mode 100644 board/microchip/pic32mzda/Makefile
 create mode 100644 board/microchip/pic32mzda/README
 create mode 100644 board/microchip/pic32mzda/pic32mzda.c
 create mode 100644 configs/pic32mzdask_defconfig
 create mode 100644 doc/device-tree-bindings/clock/microchip,pic32-clock.txt
 create mode 100644 doc/device-tree-bindings/serial/microchip,pic32-uart.txt
 create mode 100644 drivers/clk/clk_pic32.c
 create mode 100644 drivers/ddr/microchip/Makefile
 create mode 100644 drivers/ddr/microchip/ddr2.c
 create mode 100644 drivers/ddr/microchip/ddr2_regs.h
 create mode 100644 drivers/ddr/microchip/ddr2_timing.h
 create mode 100644 drivers/gpio/pic32_gpio.c
 create mode 100644 drivers/mmc/pic32_sdhci.c
 create mode 100644 drivers/net/pic32_eth.c
 create mode 100644 drivers/net/pic32_eth.h
 create mode 100644 drivers/net/pic32_mdio.c
 create mode 100644 drivers/pinctrl/pinctrl_pic32.c
 create mode 100644 drivers/serial/serial_pic32.c
 create mode 100644 include/configs/pic32mzdask.h
 create mode 100644 include/dt-bindings/clock/microchip,clock.h

--
1.8.3.1