UniPhier SD/eMMC controller driver
Subsystems (3)
v2 cover UniPhier SD/eMMC controller driver
Masahiro Yamada (3):
mmc: uniphier: add driver for UniPhier SD/MMC host controller
ARM: uniphier: enable UniPhier SD/MMC host driver
ARM: dts: uniphier: add SD/MMC host controller nodes
arch/arm/Kconfig | 1 + arch/arm/dts/uniphier-ph1-ld4-ref.dts | 4 + arch/arm/dts/uniphier-ph1-ld4.dtsi | 25 + arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 4 + arch/arm/dts/uniphier-ph1-pro4-ref.dts | 8 + arch/arm/dts/uniphier-ph1-pro4.dtsi | 37 ++ arch/arm/dts/uniphier-ph1-pro5-4kbox.dts | 8 + arch/arm/dts/uniphier-ph1-pro5.dtsi | 24 + arch/arm/dts/uniphier-ph1-sld3-ref.dts | 4 + arch/arm/dts/uniphier-ph1-sld3.dtsi | 19 + arch/arm/dts/uniphier-ph1-sld8-ref.dts | 4 + arch/arm/dts/uniphier-ph1-sld8.dtsi | 25 + arch/arm/dts/uniphier-pinctrl.dtsi | 15 + arch/arm/dts/uniphier-proxstream2-gentil.dts | 4 + arch/arm/dts/uniphier-proxstream2-vodka.dts | 4 + arch/arm/dts/uniphier-proxstream2.dtsi | 24 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_pro4_defconfig | 1 + configs/uniphier_pro5_defconfig | 1 + configs/uniphier_pxs2_ld6b_defconfig | 1 + configs/uniphier_sld3_defconfig | 1 + doc/README.uniphier | 1 + drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/uniphier-sd.c | 721 +++++++++++++++++++++++++++ include/configs/uniphier.h | 4 + 26 files changed, 948 insertions(+) create mode 100644 drivers/mmc/uniphier-sd.c
Signature · 1 line
1.9.1
PATCH v2 1/3 mmc: uniphier: add driver for UniPhier SD/MMC host controller
Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family.
Signed-off-by Masahiro Yamada <[email protected]>
---
Changes in v2:
- Fix the divisor bug on the older IP (on PH1-LD4, PH1-sLD8, PH1-Pro4)
- Increase time out because "mmc erase" can sometimes take long
- Move HOST_MODE register setting to uniphier_sd_init() because this register does not need setting multipule times.
doc/README.uniphier | 1 + drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/uniphier-sd.c | 721 ++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 729 insertions(+) create mode 100644 drivers/mmc/uniphier-sd.c
doc/README.uniphier +1 -0
@@ -93,6 +93,7 @@ Supported devices - UART (on-chip) - NAND + - SD/eMMC - USB 2.0 (EHCI) - USB 3.0 (xHCI) - LAN (on-board SMSC9118)
drivers/mmc/Kconfig +6 -0
@@ -37,4 +37,10 @@ config PIC32_SDHCI help Support for Microchip PIC32 SDHCI controller. +config MMC_UNIPHIER + bool "UniPhier SD/MMC Host Controller support" + depends on ARCH_UNIPHIER + help + This selects support for the SD/MMC Host Controller on UniPhier SoCs. + endmenu
drivers/mmc/Makefile +1 -0
@@ -41,6 +41,7 @@ obj-$(CONFIG_SH_SDHI) += sh_sdhi.o obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o +obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o ifdef CONFIG_SPL_BUILD
drivers/mmc/uniphier-sd.c new file +721 -0
721 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v2 1/3 mmc: uniphier: add driver for UniPhier SD/MMC host controller
Quoted 4 lines · Masahiro Yamada
Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family.
Signed-off-by Masahiro Yamada <[email protected]>
?? ????,
[...]
Quoted 8 lines
drivers/mmc/uniphier-sd.c new file +8
-0+#include <common.h> +#include <clk.h> +#include <fdtdec.h> +#include <mapmem.h> +#include <mmc.h> +#include <dm/device.h> +#include <linux/compat.h> +#include <linux/io.h>
drivers/mmc/uniphier-sd.c line 24
Quoted 10 lines
drivers/mmc/uniphier-sd.c new file +10
-0+#include <asm/unaligned.h> +#include <asm/dma-mapping.h> + +#define pr_err printf +#define pr_warn printf +#ifdef DEBUG +#define pr_debug printf +#else +#define pr_debug (...) +#endif
This should go into include/ somewhere, your driver shouldn't be a platform abstraction library.
Quoted 3 lines
drivers/mmc/uniphier-sd.c new file +3
-0+DECLARE_GLOBAL_DATA_PTR ; + +#define UNIPHIER_SD_CMD 0x000/* command */
[...]
drivers/mmc/uniphier-sd.c line 197
Quoted 5 lines
drivers/mmc/uniphier-sd.c new file +5
-0+static int uniphier_sd_wait_irq (struct uniphier_sd_priv *priv, +unsigned int reg,u32 flag) +{ +long wait =1000000 ; +int ret;
Replace this with wait_for_bit() please .
Quoted 15 lines
drivers/mmc/uniphier-sd.c new file +15
-0+while (!(readl (priv->regbase + reg) & flag)) { +if (wait-- <0 ) { +pr_err ("timeout\n" ); +return -ETIMEDOUT ; + } + + ret =uniphier_sd_check_error (priv); +if (ret) +return ret; + +udelay (1 ); + } + +return 0 ; +}
[...]
drivers/mmc/uniphier-sd.c line 302
Quoted 12 lines
drivers/mmc/uniphier-sd.c new file +12
-0+static void uniphier_sd_dma_start (struct uniphier_sd_priv *priv, +dma_addr_t dma_addr) +{ +u32 tmp; + +writel (0 , priv->regbase +UNIPHIER_SD_DMA_INFO1 ); +writel (0 , priv->regbase +UNIPHIER_SD_DMA_INFO2 ); + +/* enable DMA */ + tmp =readl (priv->regbase +UNIPHIER_SD_EXTMODE ); + tmp |=UNIPHIER_SD_EXTMODE_DMA_EN ; +writel (tmp, priv->regbase +UNIPHIER_SD_EXTMODE );
I'd say, use setbits_le32(), but could it be that this driver is kept in sync with Linux ?
Quoted 4 lines
drivers/mmc/uniphier-sd.c new file +4
-0+writel (dma_addr &U32_MAX , priv->regbase +UNIPHIER_SD_DMA_ADDR_L ); + +/* suppress the warning "right shift count >= width of type" */ + dma_addr >>=min_t (int,32 ,8 *sizeof (dma_addr));
drivers/mmc/uniphier-sd.c line 317
Quoted 10 lines
drivers/mmc/uniphier-sd.c new file +10
-0+ +writel (dma_addr &U32_MAX , priv->regbase +UNIPHIER_SD_DMA_ADDR_H ); + +writel (UNIPHIER_SD_DMA_CTL_START , priv->regbase +UNIPHIER_SD_DMA_CTL ); +} + +static int uniphier_sd_dma_wait_irq (struct uniphier_sd_priv *priv,u32 flag, +unsigned int blocks) +{ +long wait =1000000 +10 * blocks;
wait_for_bit() again.
Quoted 6 lines
drivers/mmc/uniphier-sd.c new file +6
-0+while (!(readl (priv->regbase +UNIPHIER_SD_DMA_INFO1 ) & flag)) { +if (wait-- <0 ) { +pr_err ("timeout during DMA\n" ); +return -ETIMEDOUT ; + } +
drivers/mmc/uniphier-sd.c line 334
Quoted 10 lines
drivers/mmc/uniphier-sd.c new file +10
-0+udelay (10 ); + } + +if (readl (priv->regbase +UNIPHIER_SD_DMA_INFO2 )) { +pr_err ("error during DMA\n" ); +return -EIO ; + } + +return 0 ; +}
??
PATCH v2 1/3 mmc: uniphier: add driver for UniPhier SD/MMC host controller
Hi Marek,
2016-02-10 22:45 GMT+09:00 Marek Vasut <[email protected]>:
Quoted 23 lines · Masahiro Yamada
Quoted 4 lines
Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family.
Signed-off-by Masahiro Yamada <[email protected]>?? ????,
[...]
Quoted 13 lines
drivers/mmc/uniphier-sd.c new file +13
-0+#include <common.h> +#include <clk.h> +#include <fdtdec.h> +#include <mapmem.h> +#include <mmc.h> +#include <dm/device.h> +#include <linux/compat.h> +#include <linux/io.h> +#include <asm/unaligned.h> +#include <asm/dma-mapping.h> + +#define pr_err printf +#define pr_warn printf
Quoted 8 lines
drivers/mmc/uniphier-sd.c line 24
Quoted 5 lines
drivers/mmc/uniphier-sd.c new file +5
-0+#ifdef DEBUG +#define pr_debug printf +#else +#define pr_debug (...) +#endif This should go into
include/somewhere, your driver shouldn't be a platform abstraction library.
Fixed in v3.
Quoted 7 lines
drivers/mmc/uniphier-sd.c line 197
Quoted 5 lines
drivers/mmc/uniphier-sd.c new file +5
-0+static int uniphier_sd_wait_irq (struct uniphier_sd_priv *priv, +unsigned int reg,u32 flag) +{ +long wait =1000000 ; +int ret;Replace this with
wait_for_bit()please .
It cannot check error during the loop.
I want to check the error flags in the loop because no reason to wait for the time-out if some error happens.
Quoted 18 lines
Quoted 15 lines
drivers/mmc/uniphier-sd.c new file +15
-0+while (!(readl (priv->regbase + reg) & flag)) { +if (wait-- <0 ) { +pr_err ("timeout\n" ); +return -ETIMEDOUT ; + } + + ret =uniphier_sd_check_error (priv); +if (ret) +return ret; + +udelay (1 ); + } + +return 0 ; +}[...]
Quoted 15 lines
drivers/mmc/uniphier-sd.c line 302
Quoted 12 lines
drivers/mmc/uniphier-sd.c new file +12
-0+static void uniphier_sd_dma_start (struct uniphier_sd_priv *priv, +dma_addr_t dma_addr) +{ +u32 tmp; + +writel (0 , priv->regbase +UNIPHIER_SD_DMA_INFO1 ); +writel (0 , priv->regbase +UNIPHIER_SD_DMA_INFO2 ); + +/* enable DMA */ + tmp =readl (priv->regbase +UNIPHIER_SD_EXTMODE ); + tmp |=UNIPHIER_SD_EXTMODE_DMA_EN ; +writel (tmp, priv->regbase +UNIPHIER_SD_EXTMODE );I'd say, use
setbits_le32(), but could it be that this driver is kept in sync with Linux ?
Yes, I am developing the MMC driver for Linux as well as U-Boot at the same time.
This is the U-Boot counter-part,
although the Linux one has not been upstreamed yet.
It can save my time to copy-paste code snippets between the two.
I want to sync as much code as possible.
Signature · 2 lines
Best Regards Masahiro Yamada
PATCH v2 1/3 mmc: uniphier: add driver for UniPhier SD/MMC host controller
Quoted 1 line · Masahiro Yamada
Hi Marek,
Hi!
[...]
Quoted 9 lines
Quoted 7 lines
drivers/mmc/uniphier-sd.c line 197
Quoted 5 lines
drivers/mmc/uniphier-sd.c new file +5
-0+static int uniphier_sd_wait_irq (struct uniphier_sd_priv *priv, +unsigned int reg,u32 flag) +{ +long wait =1000000 ; +int ret;Replace this with
wait_for_bit()please .
Quoted 5 lines
It cannot check error during the loop.
I want to check the error flags in the loop because no reason to wait for the time-out if some error happens.
You have a point there.
I wonder if it'd make sense to extend the wait_for_bit with some callback maybe ?
Quoted 37 lines
Quoted 18 lines
Quoted 15 lines
drivers/mmc/uniphier-sd.c new file +15
-0+while (!(readl (priv->regbase + reg) & flag)) { +if (wait-- <0 ) { +pr_err ("timeout\n" ); +return -ETIMEDOUT ; + } + + ret =uniphier_sd_check_error (priv); +if (ret) +return ret; + +udelay (1 ); + } + +return 0 ; +}[...]
Quoted 15 lines
drivers/mmc/uniphier-sd.c line 302
Quoted 12 lines
drivers/mmc/uniphier-sd.c new file +12
-0+static void uniphier_sd_dma_start (struct uniphier_sd_priv *priv, +dma_addr_t dma_addr) +{ +u32 tmp; + +writel (0 , priv->regbase +UNIPHIER_SD_DMA_INFO1 ); +writel (0 , priv->regbase +UNIPHIER_SD_DMA_INFO2 ); + +/* enable DMA */ + tmp =readl (priv->regbase +UNIPHIER_SD_EXTMODE ); + tmp |=UNIPHIER_SD_EXTMODE_DMA_EN ; +writel (tmp, priv->regbase +UNIPHIER_SD_EXTMODE );I'd say, use
setbits_le32(), but could it be that this driver is kept in sync with Linux ?Yes, I am developing the MMC driver for Linux as well as U-Boot at the same time.
Quoted 6 lines
This is the U-Boot counter-part,
although the Linux one has not been upstreamed yet.It can save my time to copy-paste code snippets between the two.
I want to sync as much code as possible.
Understood, thanks!
PATCH v2 2/3 ARM: uniphier: enable UniPhier SD/MMC host driver
In reply to Masahiro YamadaEnable the driver in all UniPhier defconfig files and add some needed defines to the common files.
Signed-off-by Masahiro Yamada <[email protected]>
---
Changes in v2: None
arch/arm/Kconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_pro4_defconfig | 1 + configs/uniphier_pro5_defconfig | 1 + configs/uniphier_pxs2_ld6b_defconfig | 1 + configs/uniphier_sld3_defconfig | 1 + include/configs/uniphier.h | 4 ++++ 7 files changed, 10 insertions(+)
arch/arm/Kconfig +1 -0
@@ -699,6 +699,7 @@ config ARCH_UNIPHIER select SPL_DM select DM_SERIAL select DM_I2C + select DM_MMC help Support for UniPhier SoC family developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation)
configs/uniphier_ld4_sld8_defconfig +1 -0
@@ -19,6 +19,7 @@ CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_SIMPLE_BUS=y +CONFIG_MMC_UNIPHIER=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
configs/uniphier_pro4_defconfig +1 -0
@@ -18,6 +18,7 @@ CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_SIMPLE_BUS=y +CONFIG_MMC_UNIPHIER=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
configs/uniphier_pro5_defconfig +1 -0
@@ -18,6 +18,7 @@ CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_SIMPLE_BUS=y +CONFIG_MMC_UNIPHIER=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
configs/uniphier_pxs2_ld6b_defconfig +1 -0
@@ -19,6 +19,7 @@ CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_SIMPLE_BUS=y +CONFIG_MMC_UNIPHIER=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
configs/uniphier_sld3_defconfig +1 -0
@@ -16,6 +16,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_UNIPHIER=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
include/configs/uniphier.h +4 -0
@@ -146,6 +146,10 @@#define CONFIG_FAT_WRITE #define CONFIG_DOS_PARTITION +/* SD/MMC */ +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +/* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
Signature · 1 line
1.9.1
PATCH v2 3/3 ARM: dts: uniphier: add SD/MMC host controller nodes
In reply to Masahiro YamadaThis host controller is available for all UniPhier SoCs.
Signed-off-by Masahiro Yamada <[email protected]>
---
Changes in v2: None
arch/arm/dts/uniphier-ph1-ld4-ref.dts | 4 +++ arch/arm/dts/uniphier-ph1-ld4.dtsi | 25 +++++++++++++++++++ arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 4 +++ arch/arm/dts/uniphier-ph1-pro4-ref.dts | 8 ++++++ arch/arm/dts/uniphier-ph1-pro4.dtsi | 37 ++++++++++++++++++++++++++++ arch/arm/dts/uniphier-ph1-pro5-4kbox.dts | 8 ++++++ arch/arm/dts/uniphier-ph1-pro5.dtsi | 24 ++++++++++++++++++ arch/arm/dts/uniphier-ph1-sld3-ref.dts | 4 +++ arch/arm/dts/uniphier-ph1-sld3.dtsi | 19 ++++++++++++++ arch/arm/dts/uniphier-ph1-sld8-ref.dts | 4 +++ arch/arm/dts/uniphier-ph1-sld8.dtsi | 25 +++++++++++++++++++ arch/arm/dts/uniphier-pinctrl.dtsi | 15 +++++++++++ arch/arm/dts/uniphier-proxstream2-gentil.dts | 4 +++ arch/arm/dts/uniphier-proxstream2-vodka.dts | 4 +++ arch/arm/dts/uniphier-proxstream2.dtsi | 24 ++++++++++++++++++ 15 files changed, 209 insertions(+)
arch/arm/dts/uniphier-ph1-ld4-ref.dts +4 -0
@@ -51,6 +51,10 @@ status = "okay"; }; +&sd { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-ph1-ld4.dtsi +25 -0
@@ -108,6 +108,31 @@ clock-frequency = <100000>; }; + sd: sdhc at 5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x200>; + interrupts = <0 76 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_1v8>; + clocks = <&mio 0>; + bus-width = <4>; + }; + + emmc: sdhc at 5a500000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a500000 0x200>; + interrupts = <0 78 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_emmc>; + pinctrl-1 = <&pinctrl_emmc_1v8>; + clocks = <&mio 1>; + bus-width = <8>; + non-removable; + }; + usb0: usb at 5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled";
arch/arm/dts/uniphier-ph1-ld6b-ref.dts +4 -0
@@ -53,6 +53,10 @@ status = "okay"; }; +&sd { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-ph1-pro4-ref.dts +8 -0
@@ -54,6 +54,14 @@ status = "okay"; }; +&sd { + status = "okay"; +}; + +&sd1 { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-ph1-pro4.dtsi +37 -0
@@ -140,6 +140,43 @@ clock-frequency = <400000>; }; + sd: sdhc at 5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x200>; + interrupts = <0 76 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_1v8>; + clocks = <&mio 0>; + bus-width = <4>; + }; + + emmc: sdhc at 5a500000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a500000 0x200>; + interrupts = <0 78 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_emmc>; + pinctrl-1 = <&pinctrl_emmc_1v8>; + clocks = <&mio 1>; + bus-width = <8>; + non-removable; + }; + + sd1: sdhc at 5a600000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a600000 0x200>; + interrupts = <0 85 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_sd1>; + pinctrl-1 = <&pinctrl_sd1_1v8>; + clocks = <&mio 2>; + bus-width = <4>; + }; + usb2: usb at 5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled";
arch/arm/dts/uniphier-ph1-pro5-4kbox.dts +8 -0
@@ -47,6 +47,14 @@ status = "okay"; }; +&emmc { + status = "okay"; +}; + +&sd { + status = "okay"; +}; + /* for U-Boot only */ / { soc {
arch/arm/dts/uniphier-ph1-pro5.dtsi +24 -0
@@ -152,6 +152,30 @@ clock-frequency = <400000>; }; + emmc: sdhc at 68400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x68400000 0x800>; + interrupts = <0 78 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emmc>; + clocks = <&mio 1>; + bus-width = <8>; + non-removable; + }; + + sd: sdhc at 68800000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x68800000 0x800>; + interrupts = <0 76 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_1v8>; + clocks = <&mio 0>; + bus-width = <4>; + }; + usb0: usb at 65a00000 { compatible = "socionext,uniphier-xhci", "generic-xhci"; status = "disabled";
arch/arm/dts/uniphier-ph1-sld3-ref.dts +4 -0
@@ -52,6 +52,10 @@ status = "okay"; }; +&sd { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-ph1-sld3.dtsi +19 -0
@@ -186,6 +186,25 @@ clocks = <&sysctrl 10>, <&sysctrl 18>; }; + emmc: sdhc at 5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x200>; + interrupts = <0 78 4>; + clocks = <&mio 1>; + bus-width = <8>; + non-removable; + }; + + sd: sdhc at 5a500000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a500000 0x200>; + interrupts = <0 76 4>; + clocks = <&mio 0>; + bus-width = <4>; + }; + usb0: usb at 5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled";
arch/arm/dts/uniphier-ph1-sld8-ref.dts +4 -0
@@ -51,6 +51,10 @@ status = "okay"; }; +&sd { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-ph1-sld8.dtsi +25 -0
@@ -108,6 +108,31 @@ clock-frequency = <100000>; }; + sd: sdhc at 5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x200>; + interrupts = <0 76 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_1v8>; + clocks = <&mio 0>; + bus-width = <4>; + }; + + emmc: sdhc at 5a500000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + interrupts = <0 78 4>; + reg = <0x5a500000 0x200>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_emmc>; + pinctrl-1 = <&pinctrl_emmc_1v8>; + clocks = <&mio 1>; + bus-width = <8>; + non-removable; + }; + usb0: usb at 5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled";
arch/arm/dts/uniphier-pinctrl.dtsi +15 -0
@@ -12,6 +12,11 @@ function = "emmc"; }; + pinctrl_emmc_1v8: emmc_grp_1v8 { + groups = "emmc", "emmc_dat8"; + function = "emmc"; + }; + pinctrl_i2c0: i2c0_grp { groups = "i2c0"; function = "i2c0";
@@ -37,11 +42,21 @@ function = "sd"; }; + pinctrl_sd_1v8: sd_grp_1v8 { + groups = "sd"; + function = "sd"; + }; + pinctrl_sd1: sd1_grp { groups = "sd1"; function = "sd1"; }; + pinctrl_sd1_1v8: sd1_grp_1v8 { + groups = "sd1"; + function = "sd1"; + }; + pinctrl_uart0: uart0_grp { groups = "uart0"; function = "uart0";
arch/arm/dts/uniphier-proxstream2-gentil.dts +4 -0
@@ -41,6 +41,10 @@ status = "okay"; }; +&emmc { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-proxstream2-vodka.dts +4 -0
@@ -41,6 +41,10 @@ status = "okay"; }; +&emmc { + status = "okay"; +}; + &usb0 { status = "okay"; };
arch/arm/dts/uniphier-proxstream2.dtsi +24 -0
@@ -163,6 +163,30 @@ clock-frequency = <400000>; }; + emmc: sdhc at 5a000000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a000000 0x800>; + interrupts = <0 78 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emmc>; + clocks = <&mio 1>; + bus-width = <8>; + non-removable; + }; + + sd: sdhc at 5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x800>; + interrupts = <0 76 4>; + pinctrl-names = "default", "1.8v"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_1v8>; + clocks = <&mio 0>; + bus-width = <4>; + }; + usb0: usb at 65a00000 { compatible = "socionext,uniphier-xhci", "generic-xhci"; status = "disabled";
Signature · 1 line
1.9.1