arm: socfpga: Enable ethernet PHY configuration to RGMII again

PATCH New Stefan Roese 3 participants 6 messages Feb 11, 2016 – Feb 12, 2016

Subsystems (3)

Arm (32-bit) Arm sub-architectures Arm/socfpga architecture

lore

Share & tools

lore

Stefan Roese

author

2016-02-11 15:45 UTC #0 lore raw

PATCH 1/1 arm: socfpga: Enable ethernet PHY configuration to RGMII again

With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver model], cpu_eth_init() is not called on SoCFPGA any more. Since this function configures the internal PHY interface to RGMII (via the physel_X bits), its still needed. So lets rename this function and call it in arch_early_init_r().

Tested on socfpga_sr1500.

Signed-off-by Stefan Roese <[email protected]>

Cc Simon Glass <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Marek Vasut <[email protected]>

---
 arch/arm/mach-socfpga/misc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

arch/arm/mach-socfpga/misc.c +5 -1

index 9b43b92..2b1cd4a 100644
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id)
 	socfpga_per_reset(reset, 0);
 }
 
-int cpu_eth_init(bd_t *bis)
+static int dwmac_eth_init(void)
 {
 	const void *fdt = gd->fdt_blob;
 	struct fdtdec_phandle_args args;

@@ -363,6 +363,10 @@ int arch_early_init_r(void)
 	socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
 #endif
 
+#ifdef CONFIG_ETH_DESIGNWARE
+	dwmac_eth_init();
+#endif
+
 	return 0;
 }

Signature · 1 line

2.7.1

Marek Vasut

2016-02-11 15:49 UTC #1 lore raw

PATCH 1/1 arm: socfpga: Enable ethernet PHY configuration to RGMII again

Quoted 21 lines · Stefan Roese

With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver model], cpu_eth_init() is not called on SoCFPGA any more. Since this function configures the internal PHY interface to RGMII (via the physel_X bits), its still needed. So lets rename this function and call it in arch_early_init_r().
Tested on socfpga_sr1500.
Signed-off-by Stefan Roese <[email protected]>
Cc Simon Glass <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Marek Vasut <[email protected]>
---
 arch/arm/mach-socfpga/misc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm/mach-socfpga/misc.c +0 -0
index 9b43b92..2b1cd4a 100644

arch/arm/mach-socfpga/misc.c static void dwmac_deassert_reset(const unsigned int of_reset_id) · line 105

Quoted 2 lines

arch/arm/mach-socfpga/misc.c +0 -0

@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id)
 	socfpga_per_reset(reset, 0);
 }

I just sent and applied very similar patch, can you try u-boot-socfpga/master and see if it works for you?

Thanks!

Stefan Roese

author

2016-02-11 15:54 UTC #2 lore raw

PATCH 1/1 arm: socfpga: Enable ethernet PHY configuration to RGMII again

Quoted 17 lines · Marek Vasut

Quoted 16 lines · Stefan Roese
With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver model], cpu_eth_init() is not called on SoCFPGA any more. Since this function configures the internal PHY interface to RGMII (via the physel_X bits), its still needed. So lets rename this function and call it in arch_early_init_r().
Tested on socfpga_sr1500.
Signed-off-by Stefan Roese <[email protected]>
Cc Simon Glass <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Marek Vasut <[email protected]>
---
  arch/arm/mach-socfpga/misc.c | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)

Quoted 10 lines

arch/arm/mach-socfpga/misc.c static void dwmac_deassert_reset(const unsigned int of_reset_id) · line 105
Quoted 7 lines
arch/arm/mach-socfpga/misc.c +0 -0
index 9b43b92..2b1cd4a 100644
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id)
  	socfpga_per_reset(reset, 0);
  }
I just sent and applied very similar patch, can you try u-boot-socfpga/master and see if it works for you?

Done and works just fine. So please feel free to upstream your patch version.

Thanks,
Stefan

Simon Glass

2016-02-11 20:28 UTC #3 lore raw

PATCH 1/1 arm: socfpga: Enable ethernet PHY configuration to RGMII again

Hi,

Quoted 34 lines · Stefan Roese

Quoted 19 lines · Marek Vasut
Quoted 17 lines · Stefan Roese
With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver model], cpu_eth_init() is not called on SoCFPGA any more. Since this function configures the internal PHY interface to RGMII (via the physel_X bits), its still needed. So lets rename this function and call it in arch_early_init_r().
Tested on socfpga_sr1500.
Signed-off-by Stefan Roese <[email protected]>
Cc Simon Glass <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Marek Vasut <[email protected]>
---
  arch/arm/mach-socfpga/misc.c | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)
Quoted 12 lines
arch/arm/mach-socfpga/misc.c static void dwmac_deassert_reset(const unsigned int · line 106
Quoted 8 lines
arch/arm/mach-socfpga/misc.c +0 -0
index 9b43b92..2b1cd4a 100644
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int
 of_reset_id)
        socfpga_per_reset(reset, 0);
  }
I just sent and applied very similar patch, can you try u-boot-socfpga/master and see if it works for you?

Quoted 2 lines

Done and works just fine. So please feel free to upstream your patch version.

Can this be done in the driver? You have a device tree representation I think. If you are using the compat list in fdtdec.c then it suggests that you need a driver.

Regards,
Simon

Marek Vasut

2016-02-11 20:58 UTC #4 lore raw

PATCH 1/1 arm: socfpga: Enable ethernet PHY configuration to RGMII again

Quoted 37 lines · Simon Glass

Hi,
Quoted 34 lines · Stefan Roese
Quoted 31 lines · Marek Vasut
Quoted 22 lines · Stefan Roese
With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver model], cpu_eth_init() is not called on SoCFPGA any more. Since this function configures the internal PHY interface to RGMII (via the physel_X bits), its still needed. So lets rename this function and call it in arch_early_init_r().
Tested on socfpga_sr1500.
Signed-off-by Stefan Roese <[email protected]>
Cc Simon Glass <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Marek Vasut <[email protected]>
---
  arch/arm/mach-socfpga/misc.c | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm/mach-socfpga/misc.c +0 -0
index 9b43b92..2b1cd4a 100644
arch/arm/mach-socfpga/misc.c static void dwmac_deassert_reset(const unsigned int · line 106
Quoted 3 lines
arch/arm/mach-socfpga/misc.c +0 -0
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int
 of_reset_id)
        socfpga_per_reset(reset, 0);
  }
I just sent and applied very similar patch, can you try u-boot-socfpga/master and see if it works for you?

Quoted 6 lines

Quoted 2 lines
Done and works just fine. So please feel free to upstream your patch version.
Can this be done in the driver? You have a device tree representation I think. If you are using the compat list in fdtdec.c then it suggests that you need a driver.

Does u-boot DM already have the ability to handle resets of various IP blocks on the chip ? I don't think so, so for now I'll opt for fixing this breakage.

Simon Glass

2016-02-12 00:10 UTC #5 lore raw

PATCH 1/1 arm: socfpga: Enable ethernet PHY configuration to RGMII again

Hi Marek,

Quoted 41 lines · Marek Vasut

Quoted 40 lines · Simon Glass
Hi,
Quoted 36 lines · Stefan Roese
Quoted 19 lines · Marek Vasut
Quoted 17 lines · Stefan Roese
With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver model], cpu_eth_init() is not called on SoCFPGA any more. Since this function configures the internal PHY interface to RGMII (via the physel_X bits), its still needed. So lets rename this function and call it in arch_early_init_r().
Tested on socfpga_sr1500.
Signed-off-by Stefan Roese <[email protected]>
Cc Simon Glass <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Marek Vasut <[email protected]>
---
  arch/arm/mach-socfpga/misc.c | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)
Quoted 12 lines
arch/arm/mach-socfpga/misc.c static void dwmac_deassert_reset(const unsigned int · line 106
Quoted 8 lines
arch/arm/mach-socfpga/misc.c +0 -0
index 9b43b92..2b1cd4a 100644
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int
 of_reset_id)
        socfpga_per_reset(reset, 0);
  }
I just sent and applied very similar patch, can you try u-boot-socfpga/master and see if it works for you?
Done and works just fine. So please feel free to upstream your patch version.

Quoted 8 lines

Quoted 3 lines
Can this be done in the driver? You have a device tree representation I think. If you are using the compat list in fdtdec.c then it suggests that you need a driver.
Does u-boot DM already have the ability to handle resets of various IP blocks on the chip ? I don't think so, so for now I'll opt for fixing this breakage.

OK I see what you mean. We might need to rename the current UCLASS_RESET to make room for this.

Regards,
Simon