test/py: Add option to skip SPL signature checking
PATCH v3 1/1 test/py: Add option to skip SPL signature checking
Provide user option to skip SPL signature verification for cases where u-boot is build with SPL support but full U-Boot is also verified without SPL.
If you want to support this feature please add env__spl_skipped = True to your boardenv configuration file.
For example Xilinx Zynq is using this feature where the same U-Boot binary is checked with SPL and without SPL(with FSBL).
---
Changes in v3:
- Remove Stephen's lines
- Fix my misundersting what Stephen was asking for. Use diferent variable name but use origin env__spl_skipped board variable name which was renamed in v2.
Changes in v2:
- nits in commit message
- Rename to env_spl_skipped from env__spl_skipped
test/py/u_boot_console_base.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
test/py/u_boot_console_base.py +3 -1
@@ -307,7 +307,9 @@ class ConsoleBase(object): config_spl = bcfg.get('config_spl', 'n') == 'y' config_spl_serial_support = bcfg.get('config_spl_serial_support', 'n') == 'y' - if config_spl and config_spl_serial_support: + env_spl_skipped = self.config.env.get('env__spl_skipped', + False) + if config_spl and config_spl_serial_support and not env_spl_skipped: m = self.p.expect([pattern_u_boot_spl_signon] + self.bad_patterns) if m != 0:
Signature · 1 line
1.9.1
PATCH v3 1/1 test/py: Add option to skip SPL signature checking
Quoted 5 lines · Michal Simek
Provide user option to skip SPL signature verification for cases where
u-boot is build with SPL support but full U-Boot is also verified without SPL.
Quoted 7 lines
If you want to support this feature please add
env__spl_skipped= True to your boardenv configuration file.For example Xilinx Zynq is using this feature where the same U-Boot binary is checked with SPL and without SPL(with FSBL).
Signed-off-by Michal Simek <[email protected]>
OK, so I'm quite confused as to why there's this patch and also
https://patchwork.ozlabs.org/patch/584240/ which I am (or was) about to push (bisecting some patches that had problems, that I had hoped to push out has delayed me pushing a bunch of things). Does Heiko's patch also fix the problem you see? Is one of these better than the other? Thanks!
Quoted 33 lines
---
Changes in v3:
- Remove Stephen's lines
- Fix my misundersting what Stephen was asking for. Use diferent variable name but use originenv__spl_skippedboard variable name which was renamed in v2.Changes in v2:
- nits in commit message
- Rename toenv_spl_skippedfromenv__spl_skippedtest/py/u_boot_console_base.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)test/py/u_boot_console_base.py +3
-1@@ -307,7 +307,9 @@ class ConsoleBase(object): config_spl = bcfg.get('config_spl', 'n') == 'y' config_spl_serial_support = bcfg.get('config_spl_serial_support', 'n') == 'y' - if config_spl and config_spl_serial_support: + env_spl_skipped = self.config.env.get('env__spl_skipped', + False) + if config_spl and config_spl_serial_support and not env_spl_skipped: m = self.p.expect([pattern_u_boot_spl_signon] + self.bad_patterns) if m != 0:Signature · 1 line
1.9.1
Signature · 8 lines
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PATCH v3 1/1 test/py: Add option to skip SPL signature checking
Hi Tom,
2016-02-25 15:30 GMT+01:00 Tom Rini <[email protected]>:
Quoted 12 lines · Michal Simek
Quoted 11 lines
Provide user option to skip SPL signature verification for cases where
u-boot is build with SPL support but full U-Boot is also verified without SPL.
If you want to support this feature please add
env__spl_skipped= True to your boardenv configuration file.For example Xilinx Zynq is using this feature where the same U-Boot binary is checked with SPL and without SPL(with FSBL).
Quoted 8 lines
Quoted 1 line
Signed-off-by Michal Simek <[email protected]>OK, so I'm quite confused as to why there's this patch and also
https://patchwork.ozlabs.org/patch/584240/ which I am (or was) about to push (bisecting some patches that had problems, that I had hoped to push out has delayed me pushing a bunch of things). Does Heiko's patch also fix the problem you see? Is one of these better than the other? Thanks!
This is based on the top of Heiko patch.
Heiko patch is fixing problem where you have SPL enabled but you don't have any SPL serial output
which you can't track.
My patch is fixing different problem which is that you have SPL enabled and SPL serial is also there
but your booting flow has not SPL there. For example testing on QEMU. Testing without reruning SPL.
Testing the same u-boot elf with different bootloader.
That's why we talked about adding option to user to skip SPL checking via boardenv file.
Thanks,
Michal
PATCH v3 1/1 test/py: Add option to skip SPL signature checking
In reply to Michal SimekQuoted 11 lines · Michal Simek
Provide user option to skip SPL signature verification for cases where u-boot is build with SPL support but full U-Boot is also verified without SPL.
If you want to support this feature please add
env__spl_skipped= True to your boardenv configuration file.For example Xilinx Zynq is using this feature where the same U-Boot binary is checked with SPL and without SPL(with FSBL).
Signed-off-by Michal Simek <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v3 1/1 test/py: Add option to skip SPL signature checking
In reply to Michal SimekQuoted 9 lines · Michal Simek
Provide user option to skip SPL signature verification for cases where u-boot is build with SPL support but full U-Boot is also verified without SPL.
If you want to support this feature please add
env__spl_skipped= True to your boardenv configuration file.For example Xilinx Zynq is using this feature where the same U-Boot binary is checked with SPL and without SPL(with FSBL).