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ARM: dts: tegra: correct Beaver pinmux

PATCH Superseded Lucas Stach 3 participants 7 messages Feb 26, 2016 – Apr 22, 2016

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#0 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1, which makes some more SD-cards work.

---
 arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 15 deletions(-)
arch/arm/boot/dts/tegra30-beaver.dts +24 -15
index 3dede39..1daed40 100644
@@ -255,14 +255,14 @@
 			};
 			sdmmc3_dat6_pd3 {
 				nvidia,pins = "sdmmc3_dat6_pd3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "spdif";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			sdmmc3_dat7_pd4 {
 				nvidia,pins = "sdmmc3_dat7_pd4";
-				nvidia,function = "rsvd1";
+				nvidia,function = "spdif";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -276,14 +276,14 @@
 			};
 			vi_vsync_pd6 {
 				nvidia,pins = "vi_vsync_pd6";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			vi_hsync_pd7 {
 				nvidia,pins = "vi_hsync_pd7";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -801,7 +801,7 @@
 			};
 			hdmi_int_pn7 {
 				nvidia,pins = "hdmi_int_pn7";
-				nvidia,function = "rsvd1";
+				nvidia,function = "hdmi";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -836,7 +836,7 @@
 			};
 			ulpi_data3_po4 {
 				nvidia,pins = "ulpi_data3_po4";
-				nvidia,function = "rsvd1";
+				nvidia,function = "uarta";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1102,21 +1102,21 @@
 			};
 			vi_d10_pt2 {
 				nvidia,pins = "vi_d10_pt2";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			vi_d11_pt3 {
 				nvidia,pins = "vi_d11_pt3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 			};
 			vi_d0_pt4 {
 				nvidia,pins = "vi_d0_pt4";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1146,7 +1146,7 @@
 			};
 			pu0 {
 				nvidia,pins = "pu0";
-				nvidia,function = "rsvd1";
+				nvidia,function = "owr";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1167,7 +1167,7 @@
 			};
 			pu3 {
 				nvidia,pins = "pu3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "pwm0";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1188,7 +1188,7 @@
 			};
 			pu6 {
 				nvidia,pins = "pu6";
-				nvidia,function = "rsvd1";
+				nvidia,function = "pwm3";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1216,7 +1216,7 @@
 			};
 			pv3 {
 				nvidia,pins = "pv3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "clk_12m_out";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
@@ -1505,7 +1505,7 @@
 			};
 			pbb0 {
 				nvidia,pins = "pbb0";
-				nvidia,function = "rsvd1";
+				nvidia,function = "i2s4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1570,7 +1570,7 @@
 			};
 			pcc1 {
 				nvidia,pins = "pcc1";
-				nvidia,function = "rsvd1";
+				nvidia,function = "i2s4";
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1718,6 +1718,15 @@
 				nvidia,slew-rate-rising = <1>;
 				nvidia,slew-rate-falling = <1>;
 			};
+			sdio1 {
+				nvidia,pins = "drive_sdio1";
+				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+				nvidia,pull-down-strength = <46>;
+				nvidia,pull-up-strength = <42>;
+				nvidia,slew-rate-rising = <1>;
+				nvidia,slew-rate-falling = <1>;
+			};
 			gpv {
 				nvidia,pins = "drive_gpv";
 				nvidia,pull-up-strength = <16>;
Signature · 1 line
2.5.0
#1 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

Quoted 5 lines · Lucas Stach

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1, which makes some more SD-cards work.

I replied the following to V1, which I don't see resolved:

Quoted 2 lines

I think it would be worth mentioning in the commit description where this[1] data came from.

[1] that was in response to the addition of the sdio1 drive settings.

Also, what is different in V2; is this actually V1 REPOST?

#2 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

Am Freitag, den 26.02.2016, 12:28 -0700 schrieb Stephen Warren:

Quoted 6 lines · Lucas Stach
Quoted 5 lines

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for

Your comment from v1 is addressed here ?^^^^^^^^^^^^^^^^^^^^^^^^

Quoted 5 lines
Quoted 2 lines

SDIO1,
which makes some more SD-cards work.

I replied the following to V1, which I don't see resolved:

Quoted 7 lines

?> I think it would be worth mentioning in the commit description where?
?> this[1] data came from.

[1] that was in response to the addition of the sdio1 drive settings.

Also, what is different in V2; is this actually V1 REPOST?

Other than the reworded commit message there is no change in v2.

Regards,
Lucas

#3 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

Quoted 9 lines · Lucas Stach

Am Freitag, den 26.02.2016, 12:28 -0700 schrieb Stephen Warren:

Quoted 6 lines · Lucas Stach
Quoted 5 lines

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for

Your comment from v1 is addressed here ^^^^^^^^^^^^^^^^^^^^^^^^

Oh right, sorry about that.

#4 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

In reply to Lucas Stach

Am Freitag, den 26.02.2016, 20:18 +0100 schrieb Lucas Stach:

Quoted 8 lines

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
which makes some more SD-cards work.

Just a gentle ping on this patch, as I haven't seen it being applied anywhere.

Quoted 190 lines

---
?arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--
------------
?1 file changed, 24 insertions(+), 15 deletions(-)

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
index 3dede39..1daed40 100644
@@ -255,14 +255,14 @@
 ?			};
 ?			sdmmc3_dat6_pd3 {
 ?				nvidia,pins = "sdmmc3_dat6_pd3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "spdif";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;
? };
? sdmmc3_dat7_pd4 {
? nvidia,pins = "sdmmc3_dat7_pd4";

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
-				nvidia,function = "rsvd1";
+				nvidia,function = "spdif";

? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -276,14 +276,14 @@
 ?			};
 ?			vi_vsync_pd6 {
 ?				nvidia,pins = "vi_vsync_pd6";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;
? };
? vi_hsync_pd7 {
? nvidia,pins = "vi_hsync_pd7";

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";

? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -801,7 +801,7 @@
 ?			};
 ?			hdmi_int_pn7 {
 ?				nvidia,pins = "hdmi_int_pn7";
-				nvidia,function = "rsvd1";
+				nvidia,function = "hdmi";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_ENABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -836,7 +836,7 @@
 ?			};
 ?			ulpi_data3_po4 {
 ?				nvidia,pins = "ulpi_data3_po4";
-				nvidia,function = "rsvd1";
+				nvidia,function = "uarta";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1102,21 +1102,21 @@
 ?			};
 ?			vi_d10_pt2 {
 ?				nvidia,pins = "vi_d10_pt2";
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;
? };
? vi_d11_pt3 {
? nvidia,pins = "vi_d11_pt3";

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";

? nvidia,pull = <TEGRA_PIN_PULL_UP>;
? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;
? };
? vi_d0_pt4 {
? nvidia,pins = "vi_d0_pt4";

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
-				nvidia,function = "rsvd1";
+				nvidia,function = "ddr";

? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1146,7 +1146,7 @@
 ?			};
 ?			pu0 {
 ?				nvidia,pins = "pu0";
-				nvidia,function = "rsvd1";
+				nvidia,function = "owr";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1167,7 +1167,7 @@
 ?			};
 ?			pu3 {
 ?				nvidia,pins = "pu3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "pwm0";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1188,7 +1188,7 @@
 ?			};
 ?			pu6 {
 ?				nvidia,pins = "pu6";
-				nvidia,function = "rsvd1";
+				nvidia,function = "pwm3";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1216,7 +1216,7 @@
 ?			};
 ?			pv3 {
 ?				nvidia,pins = "pv3";
-				nvidia,function = "rsvd1";
+				nvidia,function = "clk_12m_out";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_DISABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1505,7 +1505,7 @@
 ?			};
 ?			pbb0 {
 ?				nvidia,pins = "pbb0";
-				nvidia,function = "rsvd1";
+				nvidia,function = "i2s4";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +1 -1
@@ -1570,7 +1570,7 @@
 ?			};
 ?			pcc1 {
 ?				nvidia,pins = "pcc1";
-				nvidia,function = "rsvd1";
+				nvidia,function = "i2s4";
 ?				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

? nvidia,tristate =
<TEGRA_PIN_DISABLE>;
? nvidia,enable-input =
<TEGRA_PIN_ENABLE>;

arch/arm/boot/dts/tegra30-beaver.dts +9 -0
@@ -1718,6 +1718,15 @@
 ?				nvidia,slew-rate-rising = <1>;
 ?				nvidia,slew-rate-falling = <1>;
 ?			};
+			sdio1 {
+				nvidia,pins = "drive_sdio1";
+				nvidia,high-speed-mode =
 <TEGRA_PIN_DISABLE>;
+				nvidia,schmitt =
 <TEGRA_PIN_DISABLE>;
+				nvidia,pull-down-strength = <46>;
+				nvidia,pull-up-strength = <42>;
+				nvidia,slew-rate-rising = <1>;
+				nvidia,slew-rate-falling = <1>;
+			};
 ?			gpv {

? nvidia,pins = "drive_gpv";
? nvidia,pull-up-strength = <16>;

#5 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

In reply to Lucas Stach
Quoted 10 lines · Lucas Stach

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1, which makes some more SD-cards work.

---
 arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 15 deletions(-)

Applied, thanks.

Stephen, you had looked at this before. If you're happy with it, would you mind providing an Acked-by? I can apply it after the fact.

Thierry
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#6 lore raw

PATCH v2 1/1 ARM: dts: tegra: correct Beaver pinmux

Quoted 12 lines · Thierry Reding
Quoted 10 lines · Lucas Stach

Update pinmux to get rid of invalid uses of the rsvd1 function, which lead to the mux settings on those pins to not be applied.

Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1, which makes some more SD-cards work.

---
  arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
  1 file changed, 24 insertions(+), 15 deletions(-)
Quoted 4 lines

Applied, thanks.

Stephen, you had looked at this before. If you're happy with it, would you mind providing an Acked-by? I can apply it after the fact.

This appears to match a recent change in tegra-pinmux-scripts.git.