arm: socfpga: Allow boards to define a custom environment size

PATCH New Stefan Roese 2 participants 4 messages Mar 3, 2016 Arm (32-bit)

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Stefan Roese

author

2016-03-03 15:57 UTC #0 lore raw

PATCH 1/2 arm: socfpga: Allow boards to define a custom environment size

This patch makes it possible that boards can define a board-specific env size. This is used by the SR1500 SoCFPGA board port.

Signed-off-by Stefan Roese <[email protected]>

Cc Chin Liang See <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Marek Vasut <[email protected]>

---
 include/configs/socfpga_common.h | 2 ++
 1 file changed, 2 insertions(+)

include/configs/socfpga_common.h +2 -0

index 66beaf5..fd084cc 100644
@@ -286,7 +286,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+#if !defined(CONFIG_ENV_SIZE)
 #define CONFIG_ENV_SIZE			4096
+#endif
 
 /* Environment for SDMMC boot */
 #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)

Signature · 1 line

2.7.2

Stefan Roese

author

2016-03-03 15:57 UTC #1 lore raw

PATCH 2/2 arm: socfpga: sr1500: Misc updates (SPI speed, env location)

This patch makes the following changes to the SR1500 board port:

- Update defconfig to support SPI NOR (use make savedefconfig).
- Increase SPI speed to a maximum of 100MHz for faster system bootup.
- Change environment location, so that its not between SPL and main U-Boot. This way the combined SPL / U-Boot image can be used for updates.

Signed-off-by Stefan Roese <[email protected]>

Cc Marek Vasut <[email protected]>

---
 arch/arm/dts/socfpga_cyclone5_sr1500.dts |  2 +-
 configs/socfpga_sr1500_defconfig         | 11 ++++++-----
 include/configs/socfpga_sr1500.h         | 19 ++++++++++++-------
 3 files changed, 19 insertions(+), 13 deletions(-)

arch/arm/dts/socfpga_cyclone5_sr1500.dts +1 -1

index 3729ca0..32c6aad 100644
@@ -88,7 +88,7 @@
 		#size-cells = <1>;
 		compatible = "n25q00", "spi-flash";
 		reg = <0>;      /* chip select */
-		spi-max-frequency = <50000000>;
+		spi-max-frequency = <100000000>;
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */

configs/socfpga_sr1500_defconfig +6 -5

index a4f0835..a87dc61 100644
@@ -4,18 +4,19 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SR1500=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
 CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
-CONFIG_DM_MMC=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_CADENCE_QSPI=y

include/configs/socfpga_sr1500.h +12 -7

index e4aafaa..6414eeb 100644
@@ -93,22 +93,27 @@
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 /* Environment setting for SPI flash */
-#undef CONFIG_ENV_SIZE
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
 #define CONFIG_ENV_SIZE		(16 * 1024)
-#define CONFIG_ENV_OFFSET	0x00040000
+#define CONFIG_ENV_OFFSET	0x000e0000
 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0
 #define CONFIG_ENV_SPI_MODE	SPI_MODE_3
-#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SPI_MAX_HZ	100000000	/* Use max of 100MHz */
+#define CONFIG_SF_DEFAULT_SPEED	100000000
+
+/*
+ * The QSPI NOR flash layout on SR1500:
+ *
+ * 0000.0000 - 0003.ffff: SPL (4 times)
+ * 0004.0000 - 000d.ffff: U-Boot
+ * 000e.0000 - 000e.ffff: env1
+ * 000f.0000 - 000f.ffff: env2
+ */
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
 
-/* U-Boot payload is stored at offset 0x60000 */
-#undef CONFIG_SYS_SPI_U_BOOT_OFFS
-#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x60000
-
 #endif	/* __CONFIG_SOCFPGA_SR1500_H__ */

Signature · 1 line

2.7.2

Marek Vasut

Applied

2016-03-03 19:44 UTC #2 lore raw

PATCH 2/2 arm: socfpga: sr1500: Misc updates (SPI speed, env location)

Quoted 89 lines · Stefan Roese

This patch makes the following changes to the SR1500 board port:

Signed-off-by Stefan Roese <[email protected]>

Cc Marek Vasut <[email protected]>

---
 arch/arm/dts/socfpga_cyclone5_sr1500.dts |  2 +-
 configs/socfpga_sr1500_defconfig         | 11 ++++++-----
 include/configs/socfpga_sr1500.h         | 19 ++++++++++++-------
 3 files changed, 19 insertions(+), 13 deletions(-)

arch/arm/dts/socfpga_cyclone5_sr1500.dts +1 -1

index 3729ca0..32c6aad 100644
@@ -88,7 +88,7 @@
 		#size-cells = <1>;
 		compatible = "n25q00", "spi-flash";
 		reg = <0>;      /* chip select */
-		spi-max-frequency = <50000000>;
+		spi-max-frequency = <100000000>;
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */

configs/socfpga_sr1500_defconfig +6 -5

index a4f0835..a87dc61 100644
@@ -4,18 +4,19 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SR1500=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
 CONFIG_SPL=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
-CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DWAPB_GPIO=y
+CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
-CONFIG_DM_MMC=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_CADENCE_QSPI=y

include/configs/socfpga_sr1500.h +11 -3

index e4aafaa..6414eeb 100644
@@ -93,22 +93,27 @@
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 /* Environment setting for SPI flash */
-#undef CONFIG_ENV_SIZE
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
 #define CONFIG_ENV_SIZE		(16 * 1024)
-#define CONFIG_ENV_OFFSET	0x00040000
+#define CONFIG_ENV_OFFSET	0x000e0000
 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0
 #define CONFIG_ENV_SPI_MODE	SPI_MODE_3
-#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SPI_MAX_HZ	100000000	/* Use max of 100MHz */
+#define CONFIG_SF_DEFAULT_SPEED	100000000
+
+/*
+ * The QSPI NOR flash layout on SR1500:
+ *
+ * 0000.0000 - 0003.ffff: SPL (4 times)
+ * 0004.0000 - 000d.ffff: U-Boot
+ * 000e.0000 - 000e.ffff: env1
+ * 000f.0000 - 000f.ffff: env2

include/configs/socfpga_sr1500.h line 119

Quoted 10 lines

include/configs/socfpga_sr1500.h +1 -4

+ */
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
 
-/* U-Boot payload is stored at offset 0x60000 */
-#undef CONFIG_SYS_SPI_U_BOOT_OFFS
-#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x60000
-
 #endif	/* __CONFIG_SOCFPGA_SR1500_H__ */

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Marek Vasut

Applied

2016-03-03 19:44 UTC #3 lore raw

PATCH 1/2 arm: socfpga: Allow boards to define a custom environment size

In reply to Stefan Roese

Quoted 17 lines · Stefan Roese

This patch makes it possible that boards can define a board-specific env size. This is used by the SR1500 SoCFPGA board port.
Signed-off-by Stefan Roese <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Marek Vasut <[email protected]>
---
 include/configs/socfpga_common.h | 2 ++
 1 file changed, 2 insertions(+)
include/configs/socfpga_common.h +0 -0
index 66beaf5..fd084cc 100644

include/configs/socfpga_common.h unsigned int cm_get_qspi_controller_clk_hz(void); · line 294

Quoted 9 lines

include/configs/socfpga_common.h +2 -0

@@ -286,7 +286,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+#if !defined(CONFIG_ENV_SIZE)
 #define CONFIG_ENV_SIZE			4096
+#endif
 
 /* Environment for SDMMC boot */
 #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut