arm: socfpga: Enable DM_I2C
PATCH 1/1 arm: socfpga: Enable DM_I2C
The designware I2C driver now supports DM. So lets use it and enable DM_I2C for this platform per default.
--- arch/arm/Kconfig | 1 + arch/arm/dts/socfpga.dtsi | 4 ++++ include/configs/socfpga_common.h | 16 ---------------- 3 files changed, 5 insertions(+), 16 deletions(-)
arch/arm/Kconfig +1 -0
@@ -516,6 +516,7 @@ config ARCH_SOCFPGA select DM select DM_SPI_FLASH select DM_SPI + select DM_I2C config TARGET_CM_T43 bool "Support cm_t43"
arch/arm/dts/socfpga.dtsi +4 -0
@@ -23,6 +23,10 @@ spi0 = &qspi; spi1 = &spi0; spi2 = &spi1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; }; cpus {
include/configs/socfpga_common.h +0 -16
@@ -177,23 +177,7 @@/* * I2C support */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_DW -#define CONFIG_SYS_I2C_BUS_MAX 4 -#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS -#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS -#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS -#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS -/* Using standard mode which the speed up to 100Kb/s */ -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SPEED1 100000 -#define CONFIG_SYS_I2C_SPEED2 100000 -#define CONFIG_SYS_I2C_SPEED3 100000 -/* Address of device when used as slave */ -#define CONFIG_SYS_I2C_SLAVE 0x02 -#define CONFIG_SYS_I2C_SLAVE1 0x02 -#define CONFIG_SYS_I2C_SLAVE2 0x02 -#define CONFIG_SYS_I2C_SLAVE3 0x02#ifndef __ASSEMBLY__/* Clock supplied to I2C controller in unit of MHz */ unsigned int cm_get_l4_sp_clk_hz (void );
Signature · 1 line
2.7.3
PATCH 1/1 arm: socfpga: Enable DM_I2C
Quoted 28 lines · Stefan Roese
The designware I2C driver now supports DM. So lets use it and enable
DM_I2Cfor this platform per default.Signed-off-by Stefan Roese <[email protected]>Cc Marek Vasut <[email protected]>--- arch/arm/Kconfig | 1 + arch/arm/dts/socfpga.dtsi | 4 ++++ include/configs/socfpga_common.h | 16 ---------------- 3 files changed, 5 insertions(+), 16 deletions(-)arch/arm/Kconfig +1
-0@@ -516,6 +516,7 @@ config ARCH_SOCFPGA select DM select DM_SPI_FLASH select DM_SPI + select DM_I2C config TARGET_CM_T43 bool "Support cm_t43"arch/arm/dts/socfpga.dtsi +0
-0
arch/arm/dts/socfpga.dtsi line 29
Quoted 7 lines
arch/arm/dts/socfpga.dtsi +4
-0@@ -23,6 +23,10 @@ spi0 = &qspi; spi1 = &spi0; spi2 = &spi1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3;
Something tells me that you should be super-careful here, because some socfpga boards actually do use i2c. But just adding the aliases here without actually enabling the i2c via DT now will cause breakage.
One way to solve it is to enable all four buses in socfpga-cyclone5.dtsi but that's not something I find very appealing. The other is to keep the patch this way and wait until someone complains his i2c is not working.
What do you think ?
Quoted 32 lines
arch/arm/dts/socfpga.dtsi +0
-0}; cpus {include/configs/socfpga_common.h +0
-16@@ -177,23 +177,7 @@/* * I2C support */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_DW -#define CONFIG_SYS_I2C_BUS_MAX 4 -#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS -#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS -#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS -#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS -/* Using standard mode which the speed up to 100Kb/s */ -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SPEED1 100000 -#define CONFIG_SYS_I2C_SPEED2 100000 -#define CONFIG_SYS_I2C_SPEED3 100000 -/* Address of device when used as slave */ -#define CONFIG_SYS_I2C_SLAVE 0x02 -#define CONFIG_SYS_I2C_SLAVE1 0x02 -#define CONFIG_SYS_I2C_SLAVE2 0x02 -#define CONFIG_SYS_I2C_SLAVE3 0x02#ifndef __ASSEMBLY__/* Clock supplied to I2C controller in unit of MHz */ unsigned int cm_get_l4_sp_clk_hz (void );
Signature · 2 lines
Best regards, Marek Vasut
PATCH 1/1 arm: socfpga: Enable DM_I2C
Quoted 32 lines · Marek Vasut
Quoted 31 lines · Stefan Roese
The designware I2C driver now supports DM. So lets use it and enable
DM_I2Cfor this platform per default.Signed-off-by Stefan Roese <[email protected]>Cc Marek Vasut <[email protected]>--- arch/arm/Kconfig | 1 + arch/arm/dts/socfpga.dtsi | 4 ++++ include/configs/socfpga_common.h | 16 ---------------- 3 files changed, 5 insertions(+), 16 deletions(-)arch/arm/Kconfig +1
-0@@ -516,6 +516,7 @@ config ARCH_SOCFPGA select DM select DM_SPI_FLASH select DM_SPI + select DM_I2C config TARGET_CM_T43 bool "Support cm_t43"arch/arm/dts/socfpga.dtsi +0
-0@@ -23,6 +23,10 @@ spi0 = &qspi; spi1 = &spi0; spi2 = &spi1;
Quoted 8 lines
arch/arm/dts/socfpga.dtsi line 29
Quoted 4 lines
arch/arm/dts/socfpga.dtsi +4
-0+ i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3;Something tells me that you should be super-careful here, because some socfpga boards actually do use i2c. But just adding the aliases here without actually enabling the i2c via DT now will cause breakage.
Right. But if the boards are also used in Linux and the dts is synced with the Linux one, then the I2C DT node should be enabled, right?
Quoted 2 lines
One way to solve it is to enable all four buses in
socfpga-cyclone5.dtsibut that's not something I find very appealing.
I don't like it. In the Linux socpfga.dtsi the I2C DT nodes are also disabled per default. We should stay in sync here.
Quoted 4 lines
The other is to keep the
patch this way and wait until someone complains his i2c is not working.What do you think ?
Or we could move the aliases into the board specific dts files? I could start with the SR1500 board.
What do you think?
Thanks,
Stefan
PATCH 1/1 arm: socfpga: Enable DM_I2C
Quoted 42 lines · Stefan Roese
Quoted 32 lines · Marek Vasut
Quoted 31 lines · Stefan Roese
The designware I2C driver now supports DM. So lets use it and enable
DM_I2Cfor this platform per default.Signed-off-by Stefan Roese <[email protected]>Cc Marek Vasut <[email protected]>--- arch/arm/Kconfig | 1 + arch/arm/dts/socfpga.dtsi | 4 ++++ include/configs/socfpga_common.h | 16 ---------------- 3 files changed, 5 insertions(+), 16 deletions(-)arch/arm/Kconfig +1
-0@@ -516,6 +516,7 @@ config ARCH_SOCFPGA select DM select DM_SPI_FLASH select DM_SPI + select DM_I2C config TARGET_CM_T43 bool "Support cm_t43"arch/arm/dts/socfpga.dtsi +0
-0@@ -23,6 +23,10 @@ spi0 = &qspi; spi1 = &spi0; spi2 = &spi1;Quoted 8 lines
arch/arm/dts/socfpga.dtsi line 29
Quoted 4 lines
arch/arm/dts/socfpga.dtsi +4
-0+ i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3;Something tells me that you should be super-careful here, because some socfpga boards actually do use i2c. But just adding the aliases here without actually enabling the i2c via DT now will cause breakage.
Quoted 2 lines
Right. But if the boards are also used in Linux and the dts is synced with the Linux one, then the I2C DT node should be enabled, right?
In theory, yes. I hope practice is in-line with theory here.
Quoted 5 lines
Quoted 2 lines
One way to solve it is to enable all four buses in
socfpga-cyclone5.dtsibut that's not something I find very appealing.I don't like it. In the Linux
socpfga.dtsithe I2C DT nodes are also disabled per default. We should stay in sync here.
I agree with this.
Quoted 9 lines
Quoted 4 lines
The other is to keep the
patch this way and wait until someone complains his i2c is not working.What do you think ?
Or we could move the aliases into the board specific dts files? I could start with the SR1500 board.
What do you think?
The aliases are fine. It's the "status = "okay"" bit which I suspect might be missing for some boards. But then, let's see if something breaks, we should be able to find it before 2016.05 is out anyway.
Signature · 2 lines
Best regards, Marek Vasut