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This series add MUSB support on PIC32MZDA Starter Kit.

PATCH Superseded Purna Chandra Mandal 3 participants 7 messages Mar 18, 2016

Subsystems (5)

v4 of 5 Superseded Latest is v5 →

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#0 lore raw

v4 cover This series add MUSB support on PIC32MZDA Starter Kit.

It contains fix for MUSB driver compat, PIC32 platform specific glue and board support.

Changes in v4:
- add support to handle multiple MUSB controllers.
- remove unaligned buffer handling in musb_read_fifo
- update comment and error prints
- dts: add USB clock to musb node
- add missing CONFIG_PIC32_USB in defconfig

Changes in v3:
- add arch specific reads{bwlq}, writes{bwlq} in respective arch io.h
- remove reads{bwlq}, writes{bwlq} in musb-new driver

Changes in v2:
- compilation fix in drivers/usb/musb-new/linux-compat.h seperated
- compilation fix in drivers/gadget/f_mass_storage.c seperated

Purna Chandra Mandal (4):
arm: add missing writes[bwql], reads[bwql].
drivers: remove writes{b,w,l,q} and reads{b,w,l,q}.
drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG
controller.
board: pic32mzda: enable USB-host, USB-storage support.

 arch/arm/include/asm/io.h           |   7 +
 arch/mips/dts/pic32mzda.dtsi        |  12 ++
 arch/mips/dts/pic32mzda_sk.dts      |   4 +
 configs/pic32mzdask_defconfig       |   7 +-
 drivers/mtd/nand/pxa3xx_nand.c      |   8 -
 drivers/usb/musb-new/Kconfig        |   7 +
 drivers/usb/musb-new/Makefile       |   1 +
 drivers/usb/musb-new/linux-compat.h |   7 -
 drivers/usb/musb-new/musb_core.c    |   2 +-
 drivers/usb/musb-new/pic32.c        | 288 ++++++++++++++++++++++++++++++++++++
 include/configs/pic32mzdask.h       |   7 +
 11 files changed, 333 insertions(+), 17 deletions(-)
 create mode 100644 drivers/usb/musb-new/pic32.c
Signature · 1 line
1.8.3.1
#1 lore raw

PATCH v4 1/4 arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h but not the writes[bwql], reads[bwql] needed by some drivers.

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/io.h | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/include/asm/io.h +7 -0
index 75773bd..9d185a6 100644
@@ -284,6 +284,13 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define insw_p(port,to,len)		insw(port,to,len)
 #define insl_p(port,to,len)		insl(port,to,len)
 
+#define writesl(a, d, s)	__raw_writesl((unsigned long)a, d, s)
+#define readsl(a, d, s)		__raw_readsl((unsigned long)a, d, s)
+#define writesw(a, d, s)	__raw_writesw((unsigned long)a, d, s)
+#define readsw(a, d, s)		__raw_readsw((unsigned long)a, d, s)
+#define writesb(a, d, s)	__raw_writesb((unsigned long)a, d, s)
+#define readsb(a, d, s)		__raw_readsb((unsigned long)a, d, s)
+
 /*
  * ioremap and friends.
  *
Signature · 1 line
1.8.3.1
#2 lore raw

PATCH v4 2/4 drivers: remove writes{b, w, l, q} and reads{b, w, l, q}.

In reply to Purna Chandra Mandal

Definition of writes{bwlq}, reads{bwlq} are now added into arch specific asm/io.h. So removing them from drivers to fix re-definition error

---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/pxa3xx_nand.c      | 8 --------
 drivers/usb/musb-new/linux-compat.h | 7 -------
 2 files changed, 15 deletions(-)
drivers/mtd/nand/pxa3xx_nand.c +0 -8
index 9392742..d529467 100644
@@ -19,14 +19,6 @@
 
 #include "pxa3xx_nand.h"
 
-/* Some U-Boot compatibility macros */
-#define writesl(a, d, s)	__raw_writesl((unsigned long)a, d, s)
-#define readsl(a, d, s)		__raw_readsl((unsigned long)a, d, s)
-#define writesw(a, d, s)	__raw_writesw((unsigned long)a, d, s)
-#define readsw(a, d, s)		__raw_readsw((unsigned long)a, d, s)
-#define writesb(a, d, s)	__raw_writesb((unsigned long)a, d, s)
-#define readsb(a, d, s)		__raw_readsb((unsigned long)a, d, s)
-
 #define TIMEOUT_DRAIN_FIFO	5	/* in ms */
 #define	CHIP_DELAY_TIMEOUT	200
 #define NAND_STOP_DELAY		40
drivers/usb/musb-new/linux-compat.h +0 -7
index 46f83d9..526f4f2 100644
@@ -13,13 +13,6 @@
 		printf(fmt, ##args);		\
 	ret_warn; })
 
-#define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
-#define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
-#define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
-#define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
-#define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
-#define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
-
 #define device_init_wakeup(dev, a) do {} while (0)
 
 #define platform_data device_data
Signature · 1 line
1.8.3.1
#3 lore raw

PATCH v4 2/4 drivers: remove writes{b, w, l, q} and reads{b, w, l, q}.

Quoted 6 lines · Purna Chandra Mandal

Definition of writes{bwlq}, reads{bwlq} are now added into arch specific asm/io.h. So removing them from drivers to fix re-definition error

---

Quoted 7 lines

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/pxa3xx_nand.c      | 8 --------
 drivers/usb/musb-new/linux-compat.h | 7 -------
 2 files changed, 15 deletions(-)

-Scott

#4 lore raw

PATCH v4 3/4 drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG controller.

In reply to Purna Chandra Mandal

This driver adds support of PIC32 MUSB OTG controller as dual role device. It implements platform specific glue to reuse musb core.

---

Changes in v4:
- add support to handle multiple MUSB controllers.
- remove unaligned buffer handling in musb_read_fifo
- update comment and error prints

Changes in v3: None
Changes in v2: None

 drivers/usb/musb-new/Kconfig     |   7 +
 drivers/usb/musb-new/Makefile    |   1 +
 drivers/usb/musb-new/musb_core.c |   2 +-
 drivers/usb/musb-new/pic32.c     | 288 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 297 insertions(+), 1 deletion(-)
 create mode 100644 drivers/usb/musb-new/pic32.c
drivers/usb/musb-new/Kconfig +7 -0
index 6a6cb93..4e8a543 100644
@@ -15,6 +15,13 @@ config USB_MUSB_GADGET
 
 if USB_MUSB_HOST || USB_MUSB_GADGET
 
+config USB_MUSB_PIC32
+	bool "Enable Microchip PIC32 DRC USB controller"
+	depends on DM_USB && MACH_PIC32
+	help
+	  Say y to enable PIC32 USB DRC controller support
+	  if it is available on your Microchip PIC32 platform.
+
 config USB_MUSB_SUNXI
 	bool "Enable sunxi OTG / DRC USB controller"
 	depends on ARCH_SUNXI
drivers/usb/musb-new/Makefile +1 -0
index 072d516..df1c3c8 100644
@@ -10,6 +10,7 @@ obj-$(CONFIG_USB_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
 obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
 obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
 obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
+obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o
 obj-$(CONFIG_USB_MUSB_SUNXI) += sunxi.o
 
 ccflags-y := $(call cc-option,-Wno-unused-variable) \
drivers/usb/musb-new/musb_core.c +1 -1
index a6d6af6..dd0443c 100644
@@ -259,7 +259,7 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
 	}
 }
 
-#if !defined(CONFIG_USB_MUSB_AM35X)
+#if !defined(CONFIG_USB_MUSB_AM35X) && !defined(CONFIG_USB_MUSB_PIC32)
 /*
  * Unload an endpoint's FIFO
  */
drivers/usb/musb-new/pic32.c new file +288 -0

288 lines not on this page · raw message

Signature · 1 line
1.8.3.1
#5 lore raw

PATCH v4 3/4 drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG controller.

Quoted 6 lines · Purna Chandra Mandal

This driver adds support of PIC32 MUSB OTG controller as dual role device. It implements platform specific glue to reuse musb core.

Quoted 6 lines

---

Changes in v4:
- add support to handle multiple MUSB controllers.
- remove unaligned buffer handling in musb_read_fifo
- update comment and error prints

Nice, thanks.

Quoted 9 lines

Changes in v3: None
Changes in v2: None

 drivers/usb/musb-new/Kconfig     |   7 +
 drivers/usb/musb-new/Makefile    |   1 +
 drivers/usb/musb-new/musb_core.c |   2 +-
 drivers/usb/musb-new/pic32.c     | 288 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 297 insertions(+), 1 deletion(-)
 create mode 100644 drivers/usb/musb-new/pic32.c

[...]

Quoted 18 lines
drivers/usb/musb-new/pic32.c new file +18 -0
+static irqreturn_t pic32_interrupt(int irq, void *hci)
+{
+	struct musb  *musb = hci;
+	irqreturn_t ret = IRQ_NONE;
+	u32 epintr, usbintr;
+
+	/* ack usb core interrupts */
+	musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
+	if (musb->int_usb)
+		musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
+
+	/* ack endpoint interrupts */
+	musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & PIC32_RX_EP_MASK;
+	if (musb->int_rx)
+		musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
+
+	musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & PIC32_TX_EP_MASK;
+	if (musb->int_tx)

drivers/usb/musb-new/pic32.c line 95

Quoted 10 lines
drivers/usb/musb-new/pic32.c new file +10 -0
+		musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
+
+	/* drop spurious RX and TX if device is disconnected */
+	if (musb->int_usb & MUSB_INTR_DISCONNECT) {
+		musb->int_tx = 0;
+		musb->int_rx = 0;
+	}
+
+	if (musb->int_tx || musb->int_rx || musb->int_usb)
+		ret |= musb_interrupt(musb);

Use ret = , don't ORR the return value as that's wrong and can produce completely mangled return value.

Review

Quoted 2 lines
(quoted diff) +2 -0
+	return ret;
+}

[...]

The rest is good, thanks for persevering :) Please drop me a V5 so I can apply the series.

Signature · 2 lines
Best regards,
Marek Vasut
#6 lore raw

PATCH v4 4/4 board: pic32mzda: enable USB-host, USB-storage support.

In reply to Purna Chandra Mandal

Enable MUSB host and USB storage support for Microchip PIC32MZ[DA] Starter Kit.

---

Changes in v4:
- dts: add USB clock to musb node
- add missing CONFIG_PIC32_USB in defconfig

Changes in v3:
- add arch specific reads{bwlq}, writes{bwlq} in respective arch io.h
- remove reads{bwlq}, writes{bwlq} in musb-new driver

Changes in v2:
- compilation fix in drivers/usb/musb-new/linux-compat.h seperated
- compilation fix in drivers/gadget/f_mass_storage.c seperated

 arch/mips/dts/pic32mzda.dtsi   | 12 ++++++++++++
 arch/mips/dts/pic32mzda_sk.dts |  4 ++++
 configs/pic32mzdask_defconfig  |  7 ++++++-
 include/configs/pic32mzdask.h  |  7 +++++++
 4 files changed, 29 insertions(+), 1 deletion(-)
arch/mips/dts/pic32mzda.dtsi +12 -0
index 5d8bc4b..8865154 100644
@@ -179,4 +179,16 @@
 		      <0x1d100000 0x100000>;
 		reg-names = "nvm", "bank1","bank2";
 	};
+
+	usb: musb at 1f8e3000 {
+		compatible = "microchip,pic32mzda-usb";
+		reg = <0x1f8e3000 0x1000>,
+		      <0x1f884000 0x1000>;
+		reg-names = "mc", "control";
+		interrupts = <132 IRQ_TYPE_EDGE_RISING>,
+			     <133 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clock PB5CLK>;
+		clock-names = "usb_clk";
+		status = "disabled";
+	};
 };
arch/mips/dts/pic32mzda_sk.dts +4 -0
index e5ce0bd..0a7847e 100644
@@ -52,4 +52,8 @@
 	ethernet_phy: lan8740_phy at 0 {
 		reg = <0>;
 	};
+};
+
+&usb {
+	status = "okay";
 };
\ No newline at end of file
configs/pic32mzdask_defconfig +6 -1
index 2f3d463..33af04e 100644
@@ -12,6 +12,7 @@ CONFIG_SYS_PROMPT="dask # "
 CONFIG_LOOPW=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_RARP=y
@@ -29,6 +30,10 @@ CONFIG_DM_ETH=y
 CONFIG_PIC32_ETH=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
-CONFIG_SYS_VSNPRINTF=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_PIC32=y
+CONFIG_USB_STORAGE=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
include/configs/pic32mzdask.h +7 -0
index 92314e5..9296d26 100644
@@ -110,6 +110,12 @@
 #define CONFIG_GENERIC_MMC
 #define CONFIG_CMD_MMC
 
+/*--------------------------------------------------
+ * USB Configuration
+ */
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
 /*-----------------------------------------------------------------------
  * File System Configuration
  */
@@ -160,6 +166,7 @@
 
 #define BOOT_TARGET_DEVICES(func)	\
 	func(MMC, mmc, 0)		\
+	func(USB, usb, 0)		\
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
Signature · 1 line
1.8.3.1