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zipitz2: restore board support

PATCH New Vasily Khoruzhick 4 participants 42 messages Mar 21, 2016 – Mar 28, 2016

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#0 lore raw

PATCH 1/11 zipitz2: restore board support

zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796

---
 arch/arm/Kconfig          |   5 ++
 board/zipitz2/Kconfig     |   9 ++
 board/zipitz2/MAINTAINERS |   6 ++
 board/zipitz2/Makefile    |  10 +++
 board/zipitz2/zipitz2.c   | 200 +++++++++++++++++++++++++++++++++++++++++
 configs/zipitz2_defconfig |   7 ++
 include/configs/zipitz2.h | 224 ++++++++++++++++++++++++++++++++++++++++++++++
 7 files changed, 461 insertions(+)
 create mode 100644 board/zipitz2/Kconfig
 create mode 100644 board/zipitz2/MAINTAINERS
 create mode 100644 board/zipitz2/Makefile
 create mode 100644 board/zipitz2/zipitz2.c
 create mode 100644 configs/zipitz2_defconfig
 create mode 100644 include/configs/zipitz2.h
arch/arm/Kconfig +5 -0
index e5f57ef..882a818 100644
@@ -686,6 +686,10 @@ config TARGET_H2200
 	bool "Support h2200"
 	select CPU_PXA
 
+config TARGET_ZIPITZ2
+	bool "Support zipitz2"
+	select CPU_PXA
+
 config TARGET_COLIBRI_PXA270
 	bool "Support colibri_pxa270"
 	select CPU_PXA
@@ -859,6 +863,7 @@ source "board/technologic/ts4800/Kconfig"
 source "board/vscom/baltos/Kconfig"
 source "board/woodburn/Kconfig"
 source "board/work-microwave/work_92105/Kconfig"
+source "board/zipitz2/Kconfig"
 
 source "arch/arm/Kconfig.debug"
 
board/zipitz2/Kconfig new file +9 -0
new file mode 100644
index 0000000..c663504
@@ -0,0 +1,9 @@
+if TARGET_ZIPITZ2
+
+config SYS_BOARD
+	default "zipitz2"
+
+config SYS_CONFIG_NAME
+	default "zipitz2"
+
+endif
board/zipitz2/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..e027cd3
@@ -0,0 +1,6 @@
+ZIPITZ2 BOARD
+M:	Vasily Khoruzhick <[email protected]>
+S:	Maintained
+F:	board/zipitz2/
+F:	include/configs/zipitz2.h
+F:	configs/zipitz2_defconfig
board/zipitz2/Makefile new file +10 -0
new file mode 100644
index 0000000..855f6bc
@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2009
+# Marek Vasut <[email protected]>
+#
+# Heavily based on pxa255_idp platform
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= zipitz2.o
board/zipitz2/zipitz2.c new file +200 -0

200 lines not on this page · raw message

configs/zipitz2_defconfig new file +7 -0
new file mode 100644
index 0000000..2977ccc
@@ -0,0 +1,7 @@
+CONFIG_ARM=y
+CONFIG_TARGET_ZIPITZ2=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_SYS_PROMPT="$ "
include/configs/zipitz2.h new file +224 -0

224 lines not on this page · raw message

Signature · 1 line
2.7.2
#1 lore raw

PATCH 2/11 zipitz2: enable LCD rotation

z2's screen is rotated by 270 degrees

---
 drivers/video/pxa_lcd.c   | 1 +
 include/configs/zipitz2.h | 1 +
 2 files changed, 2 insertions(+)
drivers/video/pxa_lcd.c +1 -0
index 2799425..1809fc6 100644
@@ -175,6 +175,7 @@ vidinfo_t panel_info = {
 vidinfo_t panel_info = {
 	.vl_col		= 240,
 	.vl_row		= 320,
+	.vl_rot		= 3,
 	.vl_width	= 240,
 	.vl_height	= 320,
 	.vl_clkp	= CONFIG_SYS_HIGH,
include/configs/zipitz2.h +1 -0
index 586a445..169eaf3 100644
@@ -83,6 +83,7 @@
 #ifdef	CONFIG_CMD_SPI
 #define	CONFIG_SOFT_SPI
 #define	CONFIG_LCD
+#define	CONFIG_LCD_ROTATION
 #define	CONFIG_PXA_LCD
 #define	CONFIG_LMS283GF05
 
Signature · 1 line
2.7.2
#2 lore raw

PATCH 2/11 zipitz2: enable LCD rotation

Quoted 13 lines · Vasily Khoruzhick

z2's screen is rotated by 270 degrees

---
 drivers/video/pxa_lcd.c   | 1 +
 include/configs/zipitz2.h | 1 +
 2 files changed, 2 insertions(+)
drivers/video/pxa_lcd.c +0 -0
index 2799425..1809fc6 100644

drivers/video/pxa_lcd.c vidinfo_t panel_info = { · line 181

Quoted 7 lines
drivers/video/pxa_lcd.c +1 -0
@@ -175,6 +175,7 @@ vidinfo_t panel_info = {
 vidinfo_t panel_info = {
 	.vl_col		= 240,
 	.vl_row		= 320,
+	.vl_rot		= 3,
 	.vl_width	= 240,
 	.vl_height	= 320,
 	.vl_clkp	= CONFIG_SYS_HIGH,

Someone should rewrite the entire pxa_lcd driver to cfb-console API and DM, but yeah:

Best regards,
Marek Vasut

#3 lore raw

PATCH 2/11 zipitz2: enable LCD rotation

In reply to Vasily Khoruzhick
Quoted 4 lines · Vasily Khoruzhick

z2's screen is rotated by 270 degrees

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#4 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

In reply to Vasily Khoruzhick
---
 drivers/video/pxa_lcd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/video/pxa_lcd.c +1 -1
index 1809fc6..ba4f897 100644
@@ -166,7 +166,7 @@ vidinfo_t panel_info = {
 #ifdef CONFIG_LMS283GF05
 
 # define LCD_BPP	LCD_COLOR8
-/*# define LCD_INVERT_COLORS*/
+# define LCD_INVERT_COLORS
 
 /* you have to set lccr0 and lccr3 (including pcd) */
 # define REG_LCCR0	0x043008f8
Signature · 1 line
2.7.2
#5 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

Quoted 1 line · Vasily Khoruzhick

What happens if you display picture ? Will the colors be complete mess ?

Quoted 18 lines
---
 drivers/video/pxa_lcd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/video/pxa_lcd.c +1 -1
index 1809fc6..ba4f897 100644
@@ -166,7 +166,7 @@ vidinfo_t panel_info = {
 #ifdef CONFIG_LMS283GF05
 
 # define LCD_BPP	LCD_COLOR8
-/*# define LCD_INVERT_COLORS*/
+# define LCD_INVERT_COLORS
 
 /* you have to set lccr0 and lccr3 (including pcd) */
 # define REG_LCCR0	0x043008f8
Signature · 2 lines
Best regards,
Marek Vasut
#6 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

Quoted 4 lines · Marek Vasut
Quoted 1 line · Vasily Khoruzhick

What happens if you display picture ? Will the colors be complete mess ?

Yes, inverted. Can be fixed by inverting colors in BMP. I didn't find another way to get white on black
console in u-boot.

Quoted 23 lines
Quoted 10 lines
---
 drivers/video/pxa_lcd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/video/pxa_lcd.c +0 -0
index 1809fc6..ba4f897 100644

drivers/video/pxa_lcd.c vidinfo_t panel_info = { · line 172

Quoted 8 lines
drivers/video/pxa_lcd.c +1 -1
@@ -166,7 +166,7 @@ vidinfo_t panel_info = {
 #ifdef CONFIG_LMS283GF05
 
 # define LCD_BPP     LCD_COLOR8
-/*# define LCD_INVERT_COLORS*/
+# define LCD_INVERT_COLORS
 
 /* you have to set lccr0 and lccr3 (including pcd) */
 # define REG_LCCR0   0x043008f8

--
Best regards,
Marek Vasut

#7 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

Quoted 9 lines · Vasily Khoruzhick
Quoted 4 lines · Marek Vasut
Quoted 1 line · Vasily Khoruzhick

What happens if you display picture ? Will the colors be complete mess ?

Yes, inverted. Can be fixed by inverting colors in BMP. I didn't find another way to get white on black
console in u-boot.

CONFIG_SYS_WHITE_ON_BLACK might help.

Quoted 23 lines
Quoted 23 lines
Quoted 10 lines
---
 drivers/video/pxa_lcd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/video/pxa_lcd.c +0 -0
index 1809fc6..ba4f897 100644

drivers/video/pxa_lcd.c vidinfo_t panel_info = { · line 172

Quoted 8 lines
drivers/video/pxa_lcd.c +1 -1
@@ -166,7 +166,7 @@ vidinfo_t panel_info = {
 #ifdef CONFIG_LMS283GF05
 
 # define LCD_BPP     LCD_COLOR8
-/*# define LCD_INVERT_COLORS*/
+# define LCD_INVERT_COLORS
 
 /* you have to set lccr0 and lccr3 (including pcd) */
 # define REG_LCCR0   0x043008f8

--
Best regards,
Marek Vasut

Signature · 2 lines
Best regards,
Marek Vasut
#8 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

In reply to Vasily Khoruzhick
Quoted 1 line · Vasily Khoruzhick

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#9 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

Quoted 6 lines · Tom Rini
Quoted 1 line · Vasily Khoruzhick

Applied to u-boot/master, thanks!

NAK.

This actually breaks the correct behavior of the PXA framebuffer driver. Please do not ignore comments which these patches have.
I will pick them through the PXA tree when this is sorted out.

Signature · 2 lines
Best regards,
Marek Vasut
#10 lore raw

PATCH 3/11 pxa_lcd: invert colors for Zipit Z2 to get white on black palette

Quoted 5 lines · Marek Vasut
Quoted 4 lines · Tom Rini
Quoted 1 line · Vasily Khoruzhick
Quoted 7 lines
Quoted 2 lines

Applied to u-boot/master, thanks!

NAK.

This actually breaks the correct behavior of the PXA framebuffer driver. Please do not ignore comments which these patches have.
I will pick them through the PXA tree when this is sorted out.

Sorry, reverted.

Signature · 8 lines
Tom
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#11 lore raw

PATCH 4/11 zipitz2: enable libfdt

In reply to Vasily Khoruzhick

zipitz2 supports DT boot since linux-4.4 (not mainlined yet)

---
 include/configs/zipitz2.h | 1 +
 1 file changed, 1 insertion(+)
include/configs/zipitz2.h +1 -0
index 169eaf3..f69b52e 100644
@@ -47,6 +47,7 @@
 #define	CONFIG_SETUP_MEMORY_TAGS
 #define	CONFIG_SYS_TEXT_BASE		0x0
 #define	CONFIG_LZMA			/* LZMA compression support */
+#define	CONFIG_OF_LIBFDT
 
 /*
  * Serial Console Configuration
Signature · 1 line
2.7.2
#12 lore raw

PATCH 4/11 zipitz2: enable libfdt

Quoted 12 lines · Vasily Khoruzhick

zipitz2 supports DT boot since linux-4.4 (not mainlined yet)

---
 include/configs/zipitz2.h | 1 +
 1 file changed, 1 insertion(+)
include/configs/zipitz2.h +0 -0
index 169eaf3..f69b52e 100644

include/configs/zipitz2.h line 50

Quoted 4 lines
include/configs/zipitz2.h +1 -0
@@ -47,6 +47,7 @@
 #define	CONFIG_SETUP_MEMORY_TAGS
 #define	CONFIG_SYS_TEXT_BASE		0x0
 #define	CONFIG_LZMA			/* LZMA compression support */
+#define	CONFIG_OF_LIBFDT

Also enable CONFIG_FIT and fold this into patch 01 .

Quoted 3 lines
include/configs/zipitz2.h +0 -0
 /*
  * Serial Console Configuration
 
Signature · 2 lines
Best regards,
Marek Vasut
#13 lore raw

PATCH 4/11 zipitz2: enable libfdt

In reply to Vasily Khoruzhick
Quoted 3 lines · Vasily Khoruzhick

zipitz2 supports DT boot since linux-4.4 (not mainlined yet)

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#14 lore raw

PATCH 5/11 pxa-common: pxa27x has 3 OHCI ports

In reply to Vasily Khoruzhick

3rd port can be used as a device or host.

---
 include/configs/pxa-common.h | 4 ++++
 1 file changed, 4 insertions(+)
include/configs/pxa-common.h +4 -0
index f0ecc34..4c1c2c7 100644
@@ -37,7 +37,11 @@
 #define	CONFIG_USB_OHCI_NEW
 #define	CONFIG_SYS_USB_OHCI_CPU_INIT
 #define	CONFIG_SYS_USB_OHCI_BOARD_INIT
+#ifdef CONFIG_CPU_PXA27X
+#define	CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
+#else
 #define	CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+#endif
 #define	CONFIG_SYS_USB_OHCI_REGS_BASE		0x4c000000
 #define	CONFIG_SYS_USB_OHCI_SLOT_NAME		"pxa-ohci"
 #define	CONFIG_USB_STORAGE
Signature · 1 line
2.7.2
#16 lore raw

PATCH 5/11 pxa-common: pxa27x has 3 OHCI ports

In reply to Vasily Khoruzhick
Quoted 4 lines · Vasily Khoruzhick

3rd port can be used as a device or host.

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#17 lore raw

PATCH 6/11 zipitz2: enable USB host support

In reply to Vasily Khoruzhick
---
 board/zipitz2/zipitz2.c   | 21 +++++++++++++++++++++
 include/configs/zipitz2.h |  1 +
 2 files changed, 22 insertions(+)
board/zipitz2/zipitz2.c +21 -0
index 8fa1261..aefbeee 100644
@@ -15,6 +15,7 @@
 #include <asm/arch/regs-mmc.h>
 #include <spi.h>
 #include <asm/io.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,6 +53,26 @@ int dram_init(void)
 	return 0;
 }
 
+#ifdef	CONFIG_CMD_USB
+int board_usb_init(int index, enum usb_init_type init)
+{
+	/* enable port 2 */
+	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
+		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
+
+	return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+
+void usb_board_stop(void)
+{
+}
+#endif
+
 void dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
include/configs/zipitz2.h +1 -0
index f69b52e..52a36b7 100644
@@ -64,6 +64,7 @@
 #define	CONFIG_CMD_ENV
 #define	CONFIG_CMD_MMC
 #define	CONFIG_CMD_SPI
+#define	CONFIG_CMD_USB
 
 /*
  * MMC Card Configuration
Signature · 1 line
2.7.2
#18 lore raw

PATCH 6/11 zipitz2: enable USB host support

On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:

Commit message is missing, NAK

Quoted 29 lines
---
 board/zipitz2/zipitz2.c   | 21 +++++++++++++++++++++
 include/configs/zipitz2.h |  1 +
 2 files changed, 22 insertions(+)
board/zipitz2/zipitz2.c +8 -0
index 8fa1261..aefbeee 100644
@@ -15,6 +15,7 @@
 #include <asm/arch/regs-mmc.h>
 #include <spi.h>
 #include <asm/io.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,6 +53,26 @@ int dram_init(void)
 	return 0;
 }
 
+#ifdef	CONFIG_CMD_USB
+int board_usb_init(int index, enum usb_init_type init)
+{
+	/* enable port 2 */
+	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
+		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
+

board/zipitz2/zipitz2.c int dram_init(void) · line 72

Quoted 10 lines
board/zipitz2/zipitz2.c +10 -0
+	return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+
+void usb_board_stop(void)
+{

Please stop the USB here, otherwise it can corrupt the memory when Linux boots.

Quoted 19 lines
board/zipitz2/zipitz2.c +3 -0
+}
+#endif
+
 void dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
include/configs/zipitz2.h +1 -0
index f69b52e..52a36b7 100644
@@ -64,6 +64,7 @@
 #define	CONFIG_CMD_ENV
 #define	CONFIG_CMD_MMC
 #define	CONFIG_CMD_SPI
+#define	CONFIG_CMD_USB
 
 /*
  * MMC Card Configuration
Signature · 2 lines
Best regards,
Marek Vasut
#19 lore raw

PATCH 6/11 zipitz2: enable USB host support

In reply to Vasily Khoruzhick
Quoted 1 line · Vasily Khoruzhick

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#20 lore raw

PATCH 7/11 pxa: start.S: enable SRAM clock

In reply to Vasily Khoruzhick

SRAM is used for early stack, but kernel disables its clock on suspend. Re-enable SRAM clock on startup, otherwise u-boot crashes on resume from suspend.

---
 arch/arm/cpu/pxa/start.S | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
arch/arm/cpu/pxa/start.S +9 -1
index 24b6ad1..ce1181a 100644
@@ -53,7 +53,15 @@ reset:
 #ifdef	CONFIG_CPU_PXA25X
 	bl	lock_cache_for_stack
 #endif
-
+#ifdef	CONFIG_CPU_PXA27X
+	/*
+	 * enable clock for SRAM
+	 */
+	ldr	r0,=CKEN
+	ldr	r1,[r0]
+	orr	r1,r1,#(1 << 20)
+	str	r1,[r0]
+#endif
 	bl	_main
 
 /*------------------------------------------------------------------------------*/
Signature · 1 line
2.7.2
#21 lore raw

PATCH 7/11 pxa: start.S: enable SRAM clock

Quoted 14 lines · Vasily Khoruzhick

SRAM is used for early stack, but kernel disables its clock on suspend. Re-enable SRAM clock on startup, otherwise u-boot crashes on resume from suspend.

---
 arch/arm/cpu/pxa/start.S | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
arch/arm/cpu/pxa/start.S +0 -0
index 24b6ad1..ce1181a 100644
@@ -53,7 +53,15 @@ reset:
 #ifdef	CONFIG_CPU_PXA25X

arch/arm/cpu/pxa/start.S reset: · line 62

Quoted 10 lines
arch/arm/cpu/pxa/start.S +7 -1
 	bl	lock_cache_for_stack
 #endif
-
+#ifdef	CONFIG_CPU_PXA27X
+	/*
+	 * enable clock for SRAM
+	 */
+	ldr	r0,=CKEN
+	ldr	r1,[r0]
+	orr	r1,r1,#(1 << 20)

Don't we have a macro for this 1 << 20 already ?

Quoted 6 lines
arch/arm/cpu/pxa/start.S +2 -0
+	str	r1,[r0]
+#endif
 	bl	_main
 
 /*------------------------------------------------------------------------------*/
Signature · 2 lines
Best regards,
Marek Vasut
#22 lore raw

PATCH 7/11 pxa: start.S: enable SRAM clock

In reply to Vasily Khoruzhick
Quoted 4 lines · Vasily Khoruzhick

SRAM is used for early stack, but kernel disables its clock on suspend. Re-enable SRAM clock on startup, otherwise u-boot crashes on resume from suspend.

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#23 lore raw

PATCH 8/11 pxa: add support for D- and I- caches

In reply to Vasily Khoruzhick

Tested with OHCI and pxafb drivers - no issues found

---
 arch/arm/cpu/pxa/Makefile    |  1 +
 arch/arm/cpu/pxa/cache.c     | 62 ++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/cpu/pxa/pxa2xx.c    | 10 +++++++
 include/configs/pxa-common.h |  1 +
 4 files changed, 74 insertions(+)
 create mode 100644 arch/arm/cpu/pxa/cache.c
arch/arm/cpu/pxa/Makefile +1 -0
index 3ee08cd..79fcb73 100644
@@ -14,3 +14,4 @@ obj-y	+= cpuinfo.o
 obj-y	+= timer.o
 obj-y	+= usb.o
 obj-y	+= relocate.o
+obj-y	+= cache.o
arch/arm/cpu/pxa/cache.c new file +62 -0

62 lines not on this page · raw message

arch/arm/cpu/pxa/pxa2xx.c +10 -0
index 2f12fb9..77f0ef2 100644
@@ -284,3 +284,13 @@ void reset_cpu(ulong ignored)
 	for (;;)
 		;
 }
+
+void enable_caches(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+	icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+	dcache_enable();
+#endif
+}
include/configs/pxa-common.h +1 -0
index 4c1c2c7..7295687 100644
@@ -10,6 +10,7 @@
 #define	__CONFIG_PXA_COMMON_H__
 
 #define	CONFIG_DISPLAY_CPUINFO
+#define	CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 
 /*
  * KGDB
Signature · 1 line
2.7.2
#24 lore raw

PATCH 8/11 pxa: add support for D- and I- caches

Quoted 29 lines · Vasily Khoruzhick

Tested with OHCI and pxafb drivers - no issues found

---
 arch/arm/cpu/pxa/Makefile    |  1 +
 arch/arm/cpu/pxa/cache.c     | 62 ++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/cpu/pxa/pxa2xx.c    | 10 +++++++
 include/configs/pxa-common.h |  1 +
 4 files changed, 74 insertions(+)
 create mode 100644 arch/arm/cpu/pxa/cache.c
arch/arm/cpu/pxa/Makefile +1 -0
index 3ee08cd..79fcb73 100644
@@ -14,3 +14,4 @@ obj-y	+= cpuinfo.o
 obj-y	+= timer.o
 obj-y	+= usb.o
 obj-y	+= relocate.o
+obj-y	+= cache.o
arch/arm/cpu/pxa/cache.c new file +3 -0
new file mode 100644
index 0000000..7aba112
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2016 Vasily Khoruzhick <[email protected]>
+ *

arch/arm/cpu/pxa/cache.c line 13

Quoted 10 lines
arch/arm/cpu/pxa/cache.c new file +10 -0
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/types.h>
+#include <common.h>
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+#define CONFIG_SYS_CACHELINE_SIZE	32

This condition where CONFIG_SYS_CACHELINE_SIZE is undefined must not ever happen.

Quoted 9 lines
arch/arm/cpu/pxa/cache.c new file +9 -0
+#endif
+
+void invalidate_dcache_all(void)
+{
+	/* Flush/Invalidate I cache */
+	asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0));
+	/* Flush/Invalidate D cache */
+	asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
+}

arch/arm/cpu/pxa/cache.c line 32

Quoted 10 lines
arch/arm/cpu/pxa/cache.c new file +10 -0
+
+void flush_dcache_all(void)
+{
+	return invalidate_dcache_all();
+}
+
+void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+	start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+	stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);

Apply same sanity check as armv7 does please.

Quoted 60 lines
arch/arm/cpu/pxa/cache.c new file +29 -0
+	while (start <= stop) {
+		asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
+		start += CONFIG_SYS_CACHELINE_SIZE;
+	}
+}
+
+void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+	return invalidate_dcache_range(start, stop);
+}
+#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
+void invalidate_dcache_all(void)
+{
+}
+
+void flush_dcache_all(void)
+{
+}
+#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+
+/*
+ * Stub implementations for l2 cache operations
+ */
+
+__weak void l2_cache_disable(void) {}
+
+#if defined CONFIG_SYS_THUMB_BUILD
+__weak void invalidate_l2_cache(void) {}
+#endif
arch/arm/cpu/pxa/pxa2xx.c +10 -0
index 2f12fb9..77f0ef2 100644
@@ -284,3 +284,13 @@ void reset_cpu(ulong ignored)
 	for (;;)
 		;
 }
+
+void enable_caches(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+	icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+	dcache_enable();
+#endif
+}
include/configs/pxa-common.h +1 -0
index 4c1c2c7..7295687 100644
@@ -10,6 +10,7 @@
 #define	__CONFIG_PXA_COMMON_H__
 
 #define	CONFIG_DISPLAY_CPUINFO
+#define	CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 
 /*
  * KGDB
Signature · 2 lines
Best regards,
Marek Vasut
#25 lore raw

PATCH 8/11 pxa: add support for D- and I- caches

In reply to Vasily Khoruzhick
Quoted 3 lines · Vasily Khoruzhick

Tested with OHCI and pxafb drivers - no issues found

Applied to u-boot/master, thanks!

Signature · 8 lines
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#26 lore raw

PATCH 9/11 pxa_lcd: make driver cache-aware

In reply to Vasily Khoruzhick
---
 drivers/video/pxa_lcd.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
drivers/video/pxa_lcd.c +16 -0
index ba4f897..d64c25b 100644
@@ -353,6 +353,9 @@ void lcd_ctrl_init (void *lcdbase)
 	pxafb_init(&panel_info);
 	pxafb_setup_gpio(&panel_info);
 	pxafb_enable_controller(&panel_info);
+
+	/* Enable flushing if we enabled dcache */
+	lcd_set_flush_dcache(1);
 }
 
 /*----------------------------------------------------------------------*/
@@ -565,6 +568,10 @@ static int pxafb_init (vidinfo_t *vid)
 	fbi->dmadesc_fblow->fidr  = 0;
 	fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL;
 
+	flush_dcache_range((u32)fbi->dmadesc_fblow,
+			   (u32)fbi->dmadesc_fblow +
+			   sizeof(*fbi->dmadesc_fblow));
+
 	fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */
 
 	fbi->dmadesc_fbhigh->fsadr = fbi->screen;
@@ -580,11 +587,20 @@ static int pxafb_init (vidinfo_t *vid)
 		/* assume any mode with <12 bpp is palette driven */
 		fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh;
 		fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette;
+		flush_dcache_range((u32)fbi->dmadesc_fbhigh,
+				   (u32)fbi->dmadesc_fbhigh +
+				   sizeof(*fbi->dmadesc_fbhigh));
+		flush_dcache_range((u32)fbi->dmadesc_palette,
+				   (u32)fbi->dmadesc_palette +
+				   sizeof(*fbi->dmadesc_palette));
 		/* flips back and forth between pal and fbhigh */
 		fbi->fdadr0 = (u_long)fbi->dmadesc_palette;
 	}
 	else
 	{
+		flush_dcache_range((u32)fbi->dmadesc_fbhigh,
+				   (u32)fbi->dmadesc_fbhigh +
+				   sizeof(*fbi->dmadesc_fbhigh));
 		/* palette shouldn't be loaded in true-color mode */
 		fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh;
 		fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */
Signature · 1 line
2.7.2
#27 lore raw

PATCH 9/11 pxa_lcd: make driver cache-aware

Quoted 4 lines · Vasily Khoruzhick
---
 drivers/video/pxa_lcd.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Why don't you just allocate the piece of LCD memory as non-cachable ?

Signature · 2 lines
Best regards,
Marek Vasut
#28 lore raw

PATCH 9/11 pxa_lcd: make driver cache-aware

In reply to Vasily Khoruzhick
Quoted 1 line · Vasily Khoruzhick

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#29 lore raw

PATCH 9/11 pxa_lcd: make driver cache-aware

Quoted 6 lines · Tom Rini
Quoted 1 line · Vasily Khoruzhick

Applied to u-boot/master, thanks!

NAK, this is pure wrong. The memory area should be non-cacheable. Please remove the patch from the tree.

Signature · 2 lines
Best regards,
Marek Vasut
#30 lore raw

PATCH 9/11 pxa_lcd: make driver cache-aware

Quoted 9 lines · Marek Vasut
Quoted 6 lines · Tom Rini
Quoted 1 line · Vasily Khoruzhick

Applied to u-boot/master, thanks!

NAK, this is pure wrong. The memory area should be non-cacheable. Please remove the patch from the tree.

Sorry, reverted.

Signature · 8 lines
Tom
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#31 lore raw

PATCH 10/11 zipitz2: enable caches

In reply to Vasily Khoruzhick

It speeds up loading kernel from SD or USB a lot.

---
 board/zipitz2/zipitz2.c   | 4 ----
 include/configs/zipitz2.h | 3 +--
 2 files changed, 1 insertion(+), 6 deletions(-)
board/zipitz2/zipitz2.c +0 -4
index aefbeee..d3ca939 100644
@@ -30,10 +30,6 @@ inline void lcd_start(void) {};
  */
 int board_init(void)
 {
-	/* We have RAM, disable cache */
-	dcache_disable();
-	icache_disable();
-
 	/* arch number of Z2 */
 	gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
 
include/configs/zipitz2.h +1 -2
index 52a36b7..5200e02 100644
@@ -27,8 +27,6 @@
 #define CONFIG_ENV_ADDR			0x40000
 #define CONFIG_ENV_SIZE			0x10000
 
-#define CONFIG_SYS_DCACHE_OFF
-
 #define	CONFIG_SYS_MALLOC_LEN		(128*1024)
 #define	CONFIG_ARCH_CPU_INIT
 
@@ -65,6 +63,7 @@
 #define	CONFIG_CMD_MMC
 #define	CONFIG_CMD_SPI
 #define	CONFIG_CMD_USB
+#define	CONFIG_CMD_CACHE
 
 /*
  * MMC Card Configuration
Signature · 1 line
2.7.2
#33 lore raw

PATCH 10/11 zipitz2: enable caches

In reply to Vasily Khoruzhick
Quoted 4 lines · Vasily Khoruzhick

It speeds up loading kernel from SD or USB a lot.

Applied to u-boot/master, thanks!

Signature · 8 lines
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#34 lore raw

PATCH 11/11 cfi_flash: return device into read array mode after reading status

In reply to Vasily Khoruzhick

Otherwise flash remains in read status mode and it's not possible to access data on flash.

---
 drivers/mtd/cfi_flash.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/mtd/cfi_flash.c +2 -0
index 39932f4..18831c6 100644
@@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 						flash_isset (info, sect_cnt,
 							     FLASH_OFFSET_PROTECT,
 							     FLASH_STATUS_PROTECT);
+					flash_write_cmd(info, sect_cnt, 0,
+							FLASH_CMD_RESET);
 					break;
 				case CFI_CMDSET_AMD_EXTENDED:
 				case CFI_CMDSET_AMD_STANDARD:
Signature · 1 line
2.7.2
#35 lore raw

PATCH 11/11 cfi_flash: return device into read array mode after reading status

Quoted 4 lines · Vasily Khoruzhick

Otherwise flash remains in read status mode and it's not possible to access data on flash.

CCing Stefan and Scott on this one.

Quoted 10 lines
---
 drivers/mtd/cfi_flash.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/mtd/cfi_flash.c +0 -0
index 39932f4..18831c6 100644

drivers/mtd/cfi_flash.c ulong flash_get_size (phys_addr_t base, int banknum) · line 2210

Quoted 8 lines
drivers/mtd/cfi_flash.c +2 -0
@@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 						flash_isset (info, sect_cnt,
 							     FLASH_OFFSET_PROTECT,
 							     FLASH_STATUS_PROTECT);
+					flash_write_cmd(info, sect_cnt, 0,
+							FLASH_CMD_RESET);
 					break;
 				case CFI_CMDSET_AMD_EXTENDED:
 				case CFI_CMDSET_AMD_STANDARD:

s

Signature · 2 lines
Best regards,
Marek Vasut
#36 lore raw

PATCH 11/11 cfi_flash: return device into read array mode after reading status

Hi Vasily,

Quoted 12 lines · Marek Vasut
Quoted 4 lines · Vasily Khoruzhick

Otherwise flash remains in read status mode and it's not possible to access data on flash.

CCing Stefan and Scott on this one.

Quoted 4 lines
---
  drivers/mtd/cfi_flash.c | 2 ++
  1 file changed, 2 insertions(+)
Quoted 14 lines
Quoted 6 lines
drivers/mtd/cfi_flash.c +0 -0
index 39932f4..18831c6 100644

drivers/mtd/cfi_flash.c ulong flash_get_size (phys_addr_t base, int banknum) · line 2210

Quoted 8 lines
drivers/mtd/cfi_flash.c +2 -0
@@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
  						flash_isset (info, sect_cnt,
  							     FLASH_OFFSET_PROTECT,
  							     FLASH_STATUS_PROTECT);
+					flash_write_cmd(info, sect_cnt, 0,
+							FLASH_CMD_RESET);
  					break;
  				case CFI_CMDSET_AMD_EXTENDED:
  				case CFI_CMDSET_AMD_STANDARD:

I can't test this patch, since I don't have such a board here available right now any more. But I'm wondering if this is really necessary. The driver used to work just fine on Intel Strata flash chips without this patch.

And looking at the code, a bit later (after the loop) the flash is actually reset:

...

		/* round up when converting to ms */
		info->write_tout = (tmp + 999) / 1000;
		info->flash_id = FLASH_MAN_CFI;
		if ((info->interface == FLASH_CFI_X8X16) &&
		    (info->chipwidth == FLASH_CFI_BY8)) {
			/* XXX - Need to test on x8/x16 in parallel. */
			info->portwidth >>= 1;
		}

		flash_write_cmd (info, 0, 0, info->cmd_reset);
	}

...

So what exactly does not work for you with the current version? Which flash chip are you using?

Thanks,
Stefan

#37 lore raw

PATCH 11/11 cfi_flash: return device into read array mode after reading status

Quoted 1 line · Stefan Roese

Hi Vasily,

Hi Stefan,

Quoted 33 lines · Marek Vasut
Quoted 12 lines · Vasily Khoruzhick
Quoted 4 lines

Otherwise flash remains in read status mode and it's not possible to access data on flash.

CCing Stefan and Scott on this one.

Quoted 4 lines
---
  drivers/mtd/cfi_flash.c | 2 ++
  1 file changed, 2 insertions(+)
Quoted 14 lines
Quoted 6 lines
drivers/mtd/cfi_flash.c +0 -0
index 39932f4..18831c6 100644

drivers/mtd/cfi_flash.c ulong flash_get_size (phys_addr_t base, int banknum) · line 2210

Quoted 8 lines
drivers/mtd/cfi_flash.c +2 -0
@@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
                                             flash_isset (info, sect_cnt,
                                                          FLASH_OFFSET_PROTECT,
                                                          FLASH_STATUS_PROTECT);
+                                    flash_write_cmd(info, sect_cnt, 0,
+                                                    FLASH_CMD_RESET);
                                     break;
                             case CFI_CMDSET_AMD_EXTENDED:
                             case CFI_CMDSET_AMD_STANDARD:

I can't test this patch, since I don't have such a board here available right now any more. But I'm wondering if this is really necessary. The driver used to work just fine on Intel Strata flash chips without this patch.

Quoted 2 lines

And looking at the code, a bit later (after the loop) the flash is actually reset:

It sends status cmd for each erase block to check if it's protected or not, and apparently this chip (Manufacturer ID 0x000089 Chip ID 0x008865) wants reset for each erase block as well. Otherwise it returns status data instead of actual data. Btw, that is exactly what Linux driver does.

Quoted 12 lines

...

                /* round up when converting to ms */
                info->write_tout = (tmp + 999) / 1000;
                info->flash_id = FLASH_MAN_CFI;
                if ((info->interface == FLASH_CFI_X8X16) &&
                    (info->chipwidth == FLASH_CFI_BY8)) {
                        /* XXX - Need to test on x8/x16 in parallel. */
                        info->portwidth >>= 1;
                }

                flash_write_cmd (info, 0, 0, info->cmd_reset);
        }
Quoted 3 lines

...

So what exactly does not work for you with the current version?

It returns status page on read for each erase block instead of actual data.

Quoted 1 line

Which flash chip are you using?

Manufacturer ID 0x000089 Chip ID 0x008865

Quoted 4 lines

Thanks,
Stefan

#38 lore raw

PATCH 11/11 cfi_flash: return device into read array mode after reading status

Hi Vasily,

Quoted 38 lines · Vasily Khoruzhick
Quoted 1 line · Stefan Roese

Hi Vasily,

Hi Stefan,

Quoted 33 lines · Marek Vasut
Quoted 12 lines · Vasily Khoruzhick
Quoted 4 lines

Otherwise flash remains in read status mode and it's not possible to access data on flash.

CCing Stefan and Scott on this one.

Quoted 4 lines
---
   drivers/mtd/cfi_flash.c | 2 ++
   1 file changed, 2 insertions(+)
Quoted 14 lines
Quoted 6 lines
drivers/mtd/cfi_flash.c +0 -0
index 39932f4..18831c6 100644

drivers/mtd/cfi_flash.c ulong flash_get_size (phys_addr_t base, int banknum) · line 2210

Quoted 8 lines
drivers/mtd/cfi_flash.c +2 -0
@@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum)
                                              flash_isset (info, sect_cnt,
                                                           FLASH_OFFSET_PROTECT,
                                                           FLASH_STATUS_PROTECT);
+                                    flash_write_cmd(info, sect_cnt, 0,
+                                                    FLASH_CMD_RESET);
                                      break;
                              case CFI_CMDSET_AMD_EXTENDED:
                              case CFI_CMDSET_AMD_STANDARD:

I can't test this patch, since I don't have such a board here available right now any more. But I'm wondering if this is really necessary. The driver used to work just fine on Intel Strata flash chips without this patch.

Quoted 8 lines
Quoted 2 lines

And looking at the code, a bit later (after the loop) the flash is actually reset:

It sends status cmd for each erase block to check if it's protected or not, and apparently this chip (Manufacturer ID 0x000089 Chip ID 0x008865) wants reset for each erase block as well. Otherwise it returns status data instead of actual data. Btw, that is exactly what Linux driver does.

I see. Okay, then:

Thanks,
Stefan

#39 lore raw

PATCH 11/11 cfi_flash: return device into read array mode after reading status

In reply to Vasily Khoruzhick
Quoted 5 lines · Vasily Khoruzhick

Otherwise flash remains in read status mode and it's not possible to access data on flash.

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#40 lore raw

PATCH 1/11 zipitz2: restore board support

In reply to Vasily Khoruzhick
Quoted 1 line · Vasily Khoruzhick

zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796

That's great to know. So what does this patch do ?

Quoted 1 line

Hi!

board/zipitz2/zipitz2.c line 58

Quoted 11 lines
board/zipitz2/zipitz2.c new file +11 -0
+int dram_init(void)
+{
+	pxa2xx_dram_init();
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

There should be a default function for this in common/board_*c

Quoted 9 lines
board/zipitz2/zipitz2.c new file +9 -0
+}
+
+#ifdef	CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bis)
+{
+	pxa_mmc_register(0);
+	return 0;
+}
+#endif

[...]

board/zipitz2/zipitz2.c line 122

Quoted 7 lines
board/zipitz2/zipitz2.c new file +7 -0
+void zipitz2_spi_sda(int set)
+{
+	/* GPIO 13 */
+	if (set)
+		writel((1 << 13), GPSR0);
+	else
+		writel((1 << 13), GPCR0);

This could seriously use a conversion to GPIO driver, but this can be done later. You can drop the excess parenthesis around 1 << 13 here and all over the place. You can even convert it to BIT(13) .

Quoted 10 lines
board/zipitz2/zipitz2.c new file +10 -0
+}
+
+void zipitz2_spi_scl(int set)
+{
+	/* GPIO 22 */
+	if (set)
+		writel((1 << 22), GPCR0);
+	else
+		writel((1 << 22), GPSR0);
+}

[...]

board/zipitz2/zipitz2.c line 163

Quoted 6 lines
board/zipitz2/zipitz2.c new file +6 -0
+void lcd_start(void)
+{
+	int i;
+	unsigned char reg[3] = { 0x74, 0x00, 0 };
+	unsigned char data[3] = { 0x76, 0, 0 };
+	unsigned char dummy[3] = { 0, 0, 0 };

all should be const

Quoted 5 lines
board/zipitz2/zipitz2.c new file +5 -0
+	/* PWM2 AF */
+	writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
+	/* Enable clock to all PWM */
+	writel(readl(CKEN) | 0x3, CKEN);
+	/* Configure PWM2 */

board/zipitz2/zipitz2.c line 179

Quoted 10 lines
board/zipitz2/zipitz2.c new file +10 -0
+	writel(0x4f, PWM_CTRL2);
+	writel(0x2ff, PWM_PWDUTY2);
+	writel(792, PWM_PERVAL2);
+
+	/* Toggle the reset pin to reset the LCD */
+	writel((1 << 19), GPSR0);
+	udelay(100000);
+	writel((1 << 19), GPCR0);
+	udelay(20000);
+	writel((1 << 19), GPSR0);

BIT()

Quoted 6 lines
board/zipitz2/zipitz2.c new file +6 -0
+	udelay(20000);
+
+	/* Program the LCD init sequence */
+	for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
+		reg[0] = 0x74;
+		reg[1] = 0x0;

board/zipitz2/zipitz2.c line 195

Quoted 10 lines
board/zipitz2/zipitz2.c new file +10 -0
+		reg[2] = lcd_data[i].reg;
+		spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
+
+		data[0] = 0x76;
+		data[1] = lcd_data[i].data >> 8;
+		data[2] = lcd_data[i].data & 0xff;
+		spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
+
+		if (lcd_data[i].mdelay)
+			udelay(lcd_data[i].mdelay * 1000);

mdelay ;-)

Quoted 5 lines
board/zipitz2/zipitz2.c new file +5 -0
+	}
+
+	writel((1 << 11), GPSR0);
+}
+#endif

[...]

Quoted 12 lines
include/configs/zipitz2.h new file +6 -0
new file mode 100644
index 0000000..586a445
@@ -0,0 +1,224 @@
+/*
+ * Aeronix Zipit Z2 configuration file
+ *
+ * Copyright (C) 2009-2010 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+

include/configs/zipitz2.h line 16

Quoted 10 lines
include/configs/zipitz2.h new file +10 -0
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Board Configuration Options
+ */
+#define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
+#define	CONFIG_SYS_TEXT_BASE		0x0

use #define[SPACE] not #define[TAB] and please fix it all over the patch.

include/configs/zipitz2.h line 20

Quoted 3 lines
include/configs/zipitz2.h new file +3 -0
+#undef	CONFIG_BOARD_LATE_INIT
+#undef	CONFIG_SKIP_LOWLEVEL_INIT
+#define	CONFIG_PREBOOT

[...]

Run checkpatch.pl on the patches please ;-)

Signature · 2 lines
Best regards,
Marek Vasut
#41 lore raw

PATCH 1/11 zipitz2: restore board support

In reply to Vasily Khoruzhick
Quoted 3 lines · Vasily Khoruzhick

zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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