arm64: Keep macro PGTABLE_SIZE for non-full-va map

PATCH New York Sun 2 participants 6 messages Mar 21, 2016 Arm (32-bit)

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York Sun

author

2016-03-21 18:59 UTC #0 lore raw

PATCH 1/1 arm64: Keep macro PGTABLE_SIZE for non-full-va map

Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE with get_page_table_size() function for all. It is incorrect for platforms with non-full-va mapping, at this moment Layerscape SoCs.

Signed-off-by York Sun <[email protected]>

CC Alexander Graf <[email protected]>

CC Alison Wang <[email protected]>

CC Prabhakar Kushwaha <[email protected]>

---
 arch/arm/include/asm/system.h |    4 ++++
 1 file changed, 4 insertions(+)

arch/arm/include/asm/system.h +4 -0

index ac1173d..fab6f0c 100644
@@ -20,7 +20,11 @@
 #ifndef __ASSEMBLY__
 
 u64 get_page_table_size(void);
+#ifdef CONFIG_SYS_FULL_VA
 #define PGTABLE_SIZE	get_page_table_size()
+#else
+#define PGTABLE_SIZE 0x10000
+#endif
 
 /* 2MB granularity */
 #define MMU_SECTION_SHIFT	21

Signature · 1 line

1.7.9.5

Alexander Graf

2016-03-21 19:12 UTC #1 lore raw

PATCH 1/1 arm64: Keep macro PGTABLE_SIZE for non-full-va map

Quoted 17 lines · York Sun

Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE with get_page_table_size() function for all. It is incorrect for platforms with non-full-va mapping, at this moment Layerscape SoCs.
Signed-off-by York Sun <[email protected]>
CC Alexander Graf <[email protected]>
CC Alison Wang <[email protected]>
CC Prabhakar Kushwaha <[email protected]>
---
arch/arm/include/asm/system.h | 4 ++++
1 file changed, 4 insertions(+)
arch/arm/include/asm/system.h +0 -0
index ac1173d..fab6f0c 100644

arch/arm/include/asm/system.h line 23

Quoted 4 lines

arch/arm/include/asm/system.h +1 -0

@@ -20,7 +20,11 @@
 #ifndef __ASSEMBLY__
 
 u64 get_page_table_size(void);
+#ifdef CONFIG_SYS_FULL_VA

This macro doesn't exist anymore. We need to do something different. Let me cook up a patch.

Alex

Quoted 10 lines

arch/arm/include/asm/system.h +3 -0

 #define PGTABLE_SIZE	get_page_table_size()
+#else
+#define PGTABLE_SIZE 0x10000
+#endif
 
 /* 2MB granularity */
 #define MMU_SECTION_SHIFT	21

Signature · 1 line

1.7.9.5

york sun

author

2016-03-21 19:23 UTC #2 lore raw

PATCH 1/1 arm64: Keep macro PGTABLE_SIZE for non-full-va map

Quoted 22 lines · Alexander Graf

Quoted 19 lines · York Sun
Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE with get_page_table_size() function for all. It is incorrect for platforms with non-full-va mapping, at this moment Layerscape SoCs.
Signed-off-by York Sun <[email protected]>
CC Alexander Graf <[email protected]>
CC Alison Wang <[email protected]>
CC Prabhakar Kushwaha <[email protected]>
---
arch/arm/include/asm/system.h | 4 ++++
1 file changed, 4 insertions(+)
arch/arm/include/asm/system.h +0 -0
index ac1173d..fab6f0c 100644
@@ -20,7 +20,11 @@
 #ifndef __ASSEMBLY__
 

Quoted 5 lines

arch/arm/include/asm/system.h line 23
Quoted 2 lines
arch/arm/include/asm/system.h +1 -0
 u64 get_page_table_size(void);
+#ifdef CONFIG_SYS_FULL_VA
This macro doesn't exist anymore. We need to do something different. Let me cook up a patch.

Thanks.

After this, I want to discuss the possibility to use the new infrastructure for our SoCs. The key is we have limited on-chip RAM before DDR is initialized. We cannot use full va mapping for this reason for early MMU tables. We should have not problem to use it for the final MMU tables. We are exploring initializing DDR before U-Boot, but we are not anywhere close yet.

York

Alexander Graf

2016-03-21 19:29 UTC #3 lore raw

PATCH 1/1 arm64: Keep macro PGTABLE_SIZE for non-full-va map

Quoted 29 lines · york sun

Quoted 22 lines · Alexander Graf
Quoted 19 lines · York Sun
Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE with get_page_table_size() function for all. It is incorrect for platforms with non-full-va mapping, at this moment Layerscape SoCs.
Signed-off-by York Sun <[email protected]>
CC Alexander Graf <[email protected]>
CC Alison Wang <[email protected]>
CC Prabhakar Kushwaha <[email protected]>
---
arch/arm/include/asm/system.h | 4 ++++
1 file changed, 4 insertions(+)
arch/arm/include/asm/system.h +0 -0
index ac1173d..fab6f0c 100644
@@ -20,7 +20,11 @@
 #ifndef __ASSEMBLY__
 
Quoted 5 lines
arch/arm/include/asm/system.h line 23
Quoted 2 lines
arch/arm/include/asm/system.h +1 -0
 u64 get_page_table_size(void);
+#ifdef CONFIG_SYS_FULL_VA
This macro doesn't exist anymore. We need to do something different. Let me cook up a patch.

Quoted 5 lines

Thanks.
After this, I want to discuss the possibility to use the new infrastructure for our SoCs. The key is we have limited on-chip RAM before DDR is initialized. We cannot use full va mapping for this reason for early MMU tables. We should have

I'm not sure I understand this part. How is full va different from your current approach? The only really major difference is that you can do non-1:1 maps.

If all maps are aligned, you shouldn't waste too much memory compared to your current approach, no?

Alex

Quoted 6 lines

not problem to use it for the final MMU tables. We are exploring initializing DDR before U-Boot, but we are not anywhere close yet.
York

york sun

author

2016-03-21 19:39 UTC #4 lore raw

PATCH 1/1 arm64: Keep macro PGTABLE_SIZE for non-full-va map

Quoted 34 lines · Alexander Graf

Quoted 31 lines · york sun
Quoted 22 lines · Alexander Graf
Quoted 19 lines · York Sun
Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE with get_page_table_size() function for all. It is incorrect for platforms with non-full-va mapping, at this moment Layerscape SoCs.
Signed-off-by York Sun <[email protected]>
CC Alexander Graf <[email protected]>
CC Alison Wang <[email protected]>
CC Prabhakar Kushwaha <[email protected]>
---
arch/arm/include/asm/system.h | 4 ++++
1 file changed, 4 insertions(+)
arch/arm/include/asm/system.h +0 -0
index ac1173d..fab6f0c 100644
@@ -20,7 +20,11 @@
 #ifndef __ASSEMBLY__
 
Quoted 5 lines
arch/arm/include/asm/system.h line 23
Quoted 2 lines
arch/arm/include/asm/system.h +1 -0
 u64 get_page_table_size(void);
+#ifdef CONFIG_SYS_FULL_VA
This macro doesn't exist anymore. We need to do something different. Let me cook up a patch.
Thanks.

Quoted 8 lines

Quoted 3 lines
After this, I want to discuss the possibility to use the new infrastructure for our SoCs. The key is we have limited on-chip RAM before DDR is initialized. We cannot use full va mapping for this reason for early MMU tables. We should have
I'm not sure I understand this part. How is full va different from your current approach? The only really major difference is that you can do non-1:1 maps.
If all maps are aligned, you shouldn't waste too much memory compared to your current approach, no?

The new full va map doesn't map all space, only the selected mapping in the table, correct? If yes, we should be able to fix the tables in the on-chip RAM.

I think my case is different because I use two tables. The final table is equivalent to those everyone else is using. The early table is different with non 1:1 mapping. This feature shouldn't be too hard to add.

Now it comes the third part. The early table is so early, we don't have gd setup yet, or printf. We need to change the table handling to accept an argument, instead of using gd for table pointer.

York

Alexander Graf

2016-03-21 19:42 UTC #5 lore raw

PATCH 1/1 arm64: Keep macro PGTABLE_SIZE for non-full-va map

Quoted 39 lines · york sun

Quoted 38 lines · Alexander Graf
Quoted 34 lines · york sun
Quoted 22 lines · Alexander Graf
Quoted 19 lines · York Sun
Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE with get_page_table_size() function for all. It is incorrect for platforms with non-full-va mapping, at this moment Layerscape SoCs.
Signed-off-by York Sun <[email protected]>
CC Alexander Graf <[email protected]>
CC Alison Wang <[email protected]>
CC Prabhakar Kushwaha <[email protected]>
---
arch/arm/include/asm/system.h | 4 ++++
1 file changed, 4 insertions(+)
arch/arm/include/asm/system.h +0 -0
index ac1173d..fab6f0c 100644
@@ -20,7 +20,11 @@
 #ifndef __ASSEMBLY__
 
Quoted 5 lines
arch/arm/include/asm/system.h line 23
Quoted 2 lines
arch/arm/include/asm/system.h +1 -0
 u64 get_page_table_size(void);
+#ifdef CONFIG_SYS_FULL_VA
This macro doesn't exist anymore. We need to do something different. Let me cook up a patch.
Thanks.
After this, I want to discuss the possibility to use the new infrastructure for our SoCs. The key is we have limited on-chip RAM before DDR is initialized. We cannot use full va mapping for this reason for early MMU tables. We should have

Quoted 6 lines

Quoted 4 lines
I'm not sure I understand this part. How is full va different from your current approach? The only really major difference is that you can do non-1:1 maps.
If all maps are aligned, you shouldn't waste too much memory compared to your current approach, no?
The new full va map doesn't map all space, only the selected mapping in the table, correct? If yes, we should be able to fix the tables in the on-chip RAM.

Yes, it maps as much as it needs to fit your largest page in that you describe in the table.

Quoted 3 lines

I think my case is different because I use two tables. The final table is equivalent to those everyone else is using. The early table is different with non 1:1 mapping. This feature shouldn't be too hard to add.

I think it would be trivial to add. Just call the existing functions with an explicit table passed as parameter instead of the implicit global variable :).

Quoted 3 lines

Now it comes the third part. The early table is so early, we don't have gd setup yet, or printf. We need to change the table handling to accept an argument, instead of using gd for table pointer.

Yes, exactly. That's much cleaner anyway, so I'd welcome that change.

Alex