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ARM: DRA7: Fix fastboot command

PATCH New Semen Protsenko 2 participants 6 messages Mar 23, 2016 – Mar 24, 2016

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Semen Protsenko

author
#0 lore raw

cover ARM: DRA7: Fix fastboot command

Hi All,

This series reverts recently added patches that break fastboot command. I propose to keep it this way until issue is found and fixed.

When I'm trying to run fastboot command, next error occurs:

    => fas 0
    data abort
    pc : [<dff7825e>]          lr : [<00000020>]
    reloc pc : [<8081f25e>]    lr : [<a08a7020>]
    ...
    Resetting CPU ...

My board information:

CPU : DRA752 ES1.0
Board: DRA74x EVM REV E.0
I2C: ready
DRAM: 1.5 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
SCSI: SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode

author
#1 lore raw

PATCH 1/3 Revert "ARM: DRA7: configs: Prepare for detecting memory > 2GB"

From: Sam Protsenko <[email protected]>

This reverts commit 212425b2721bb67273963b7fc517455425948d90.

---
 include/configs/dra7xx_evm.h | 5 -----
 1 file changed, 5 deletions(-)
include/configs/dra7xx_evm.h +0 -5
index c0795ab..6e3a482 100644
@@ -19,11 +19,6 @@
 #define CONFIG_IODELAY_RECALIBRATION
 #endif
 
-#define CONFIG_VERY_BIG_RAM
-#define CONFIG_PHYS_64BIT
-#define CONFIG_NR_DRAM_BANKS		2
-#define CONFIG_MAX_MEM_MAPPED		0x80000000
-
 #ifndef CONFIG_QSPI_BOOT
 /* MMC ENV related defines */
 #define CONFIG_ENV_IS_IN_MMC
Signature · 1 line
2.7.0
author
#2 lore raw

PATCH 2/3 Revert "ARM: DRA7: EMIF: Add 4GB DDR settings"

In reply to Semen Protsenko

From: Sam Protsenko <[email protected]>

This reverts commit c4a2736ca165167aa38228a60354c6a8950d42f8.

---
 board/ti/dra7xx/evm.c | 83 ++-------------------------------------------------
 1 file changed, 3 insertions(+), 80 deletions(-)
board/ti/dra7xx/evm.c +3 -80
index 4e45abf..eb19a6d 100644
@@ -34,8 +34,6 @@
 #define board_is_dra74x_evm()		board_ti_is("5777xCPU")
 #define board_is_dra74x_revh_or_later() board_is_dra74x_evm() &&	\
 				(strncmp("H", board_ti_get_rev(), 1) <= 0)
-#define board_ti_get_emif_size()	board_ti_get_emif1_size() +	\
-					board_ti_get_emif2_size()
 
 #ifdef CONFIG_DRIVER_TI_CPSW
 #include <cpsw.h>

@@ -127,78 +125,18 @@ static const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = {
 	.emif_rd_wr_exec_thresh         = 0x00000305
 };
 
-const struct emif_regs emif1_ddr3_532_mhz_1cs_2G = {
-	.sdram_config_init              = 0x61851ab2,
-	.sdram_config                   = 0x61851ab2,
-	.sdram_config2			= 0x08000000,
-	.ref_ctrl                       = 0x000040F1,
-	.ref_ctrl_final			= 0x00001035,
-	.sdram_tim1                     = 0xCCCF36B3,
-	.sdram_tim2                     = 0x30BF7FDA,
-	.sdram_tim3                     = 0x427F8BA8,
-	.read_idle_ctrl                 = 0x00050000,
-	.zq_config                      = 0x0007190B,
-	.temp_alert_config              = 0x00000000,
-	.emif_ddr_phy_ctlr_1_init       = 0x0024400B,
-	.emif_ddr_phy_ctlr_1            = 0x0E24400B,
-	.emif_ddr_ext_phy_ctrl_1        = 0x10040100,
-	.emif_ddr_ext_phy_ctrl_2        = 0x00910091,
-	.emif_ddr_ext_phy_ctrl_3        = 0x00950095,
-	.emif_ddr_ext_phy_ctrl_4        = 0x009B009B,
-	.emif_ddr_ext_phy_ctrl_5        = 0x009E009E,
-	.emif_rd_wr_lvl_rmp_win         = 0x00000000,
-	.emif_rd_wr_lvl_rmp_ctl         = 0x80000000,
-	.emif_rd_wr_lvl_ctl             = 0x00000000,
-	.emif_rd_wr_exec_thresh         = 0x00000305
-};
-
-const struct emif_regs emif2_ddr3_532_mhz_1cs_2G = {
-	.sdram_config_init              = 0x61851B32,
-	.sdram_config                   = 0x61851B32,
-	.sdram_config2			= 0x08000000,
-	.ref_ctrl                       = 0x000040F1,
-	.ref_ctrl_final			= 0x00001035,
-	.sdram_tim1                     = 0xCCCF36B3,
-	.sdram_tim2                     = 0x308F7FDA,
-	.sdram_tim3                     = 0x427F88A8,
-	.read_idle_ctrl                 = 0x00050000,
-	.zq_config                      = 0x0007190B,
-	.temp_alert_config              = 0x00000000,
-	.emif_ddr_phy_ctlr_1_init       = 0x0024400B,
-	.emif_ddr_phy_ctlr_1            = 0x0E24400B,
-	.emif_ddr_ext_phy_ctrl_1        = 0x10040100,
-	.emif_ddr_ext_phy_ctrl_2        = 0x00910091,
-	.emif_ddr_ext_phy_ctrl_3        = 0x00950095,
-	.emif_ddr_ext_phy_ctrl_4        = 0x009B009B,
-	.emif_ddr_ext_phy_ctrl_5        = 0x009E009E,
-	.emif_rd_wr_lvl_rmp_win         = 0x00000000,
-	.emif_rd_wr_lvl_rmp_ctl         = 0x80000000,
-	.emif_rd_wr_lvl_ctl             = 0x00000000,
-	.emif_rd_wr_exec_thresh         = 0x00000305
-};
-
 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
 {
-	u64 ram_size;
-
-	ram_size = board_ti_get_emif_size();
-
 	switch (omap_revision()) {
 	case DRA752_ES1_0:
 	case DRA752_ES1_1:
 	case DRA752_ES2_0:
 		switch (emif_nr) {
 		case 1:
-			if (ram_size > CONFIG_MAX_MEM_MAPPED)
-				*regs = &emif1_ddr3_532_mhz_1cs_2G;
-			else
-				*regs = &emif1_ddr3_532_mhz_1cs;
+			*regs = &emif1_ddr3_532_mhz_1cs;
 			break;
 		case 2:
-			if (ram_size > CONFIG_MAX_MEM_MAPPED)
-				*regs = &emif2_ddr3_532_mhz_1cs_2G;
-			else
-				*regs = &emif2_ddr3_532_mhz_1cs;
+			*regs = &emif2_ddr3_532_mhz_1cs;
 			break;
 		}
 		break;

@@ -226,28 +164,13 @@ static const struct dmm_lisa_map_regs lisa_map_2G_x_2 = {
 	.is_ma_present	= 0x1
 };
 
-const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
-	.dmm_lisa_map_0 = 0x0,
-	.dmm_lisa_map_1 = 0x0,
-	.dmm_lisa_map_2 = 0x80740300,
-	.dmm_lisa_map_3 = 0xFF020100,
-	.is_ma_present	= 0x1
-};
-
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
 {
-	u64 ram_size;
-
-	ram_size = board_ti_get_emif_size();
-
 	switch (omap_revision()) {
 	case DRA752_ES1_0:
 	case DRA752_ES1_1:
 	case DRA752_ES2_0:
-		if (ram_size > CONFIG_MAX_MEM_MAPPED)
-			*dmm_lisa_regs = &lisa_map_dra7_2GB;
-		else
-			*dmm_lisa_regs = &lisa_map_dra7_1536MB;
+		*dmm_lisa_regs = &lisa_map_dra7_1536MB;
 		break;
 	case DRA722_ES1_0:
 	default:
Signature · 1 line
2.7.0
author
#3 lore raw

PATCH 3/3 Revert "ARM: DRA7-evm: Update memory info in banks"

In reply to Semen Protsenko

From: Sam Protsenko <[email protected]>

This reverts commit d468b1781abe3975fdbc1695ef1fcfb48b01732b.

---
 board/ti/dra7xx/evm.c | 14 --------------
 1 file changed, 14 deletions(-)
board/ti/dra7xx/evm.c +0 -14
index eb19a6d..4f60837 100644
@@ -191,20 +191,6 @@ int board_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
-{
-	u64 ram_size;
-
-	ram_size = board_ti_get_emif_size();
-
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = get_effective_memsize();
-	if (ram_size > CONFIG_MAX_MEM_MAPPED) {
-		gd->bd->bi_dram[1].start = 0x200000000;
-		gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
-	}
-}
-
 int board_late_init(void)
 {
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Signature · 1 line
2.7.0
#4 lore raw

cover ARM: DRA7: Fix fastboot command

In reply to Semen Protsenko
Quoted 5 lines · Semen Protsenko

Hi All,

This series reverts recently added patches that break fastboot command. I propose to keep it this way until issue is found and fixed.

Let's get this fixed instead of reverting any of the patches :). This is because DMA is failing. Can you please try this patch[1].

[1] http://patchwork.ozlabs.org/patch/601463/

Thanks and regards,
Lokesh

Quoted 20 lines

When I'm trying to run fastboot command, next error occurs:

    => fas 0
    data abort
    pc : [<dff7825e>]          lr : [<00000020>]
    reloc pc : [<8081f25e>]    lr : [<a08a7020>]
    ...
    Resetting CPU ...

My board information:

CPU : DRA752 ES1.0
Board: DRA74x EVM REV E.0
I2C: ready
DRAM: 1.5 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
SCSI: SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode

author
#5 lore raw

cover ARM: DRA7: Fix fastboot command

Quoted 10 lines · Lokesh Vutla
Quoted 5 lines · Semen Protsenko

Hi All,

This series reverts recently added patches that break fastboot command. I propose to keep it this way until issue is found and fixed.

Let's get this fixed instead of reverting any of the patches :).

Agree, it's better course of actions.

Quoted 4 lines

This is because DMA is failing. Can you please try this patch[1].

[1] http://patchwork.ozlabs.org/patch/601463/

Mentioned patch fixes fastboot. Now it works as expected. The only new thing I noticed (which appeared after applying that patch) is next message (showed after running "fastboot 0" command):

    UNKNOWN IRQ type 1683973225

It's harmless though, fastboot works as expected. So I presume we should merge that DMA patch, as it's obviously useful and fixes real bug.

Thanks for helping me out :)

Quoted 23 lines

Thanks and regards,
Lokesh

Quoted 20 lines

When I'm trying to run fastboot command, next error occurs:

    => fas 0
    data abort
    pc : [<dff7825e>]          lr : [<00000020>]
    reloc pc : [<8081f25e>]    lr : [<a08a7020>]
    ...
    Resetting CPU ...

My board information:

CPU : DRA752 ES1.0
Board: DRA74x EVM REV E.0
I2C: ready
DRAM: 1.5 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
SCSI: SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode