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ARM: dts: sun8i: Add dts for Orange Pi 2 SBC

PATCH New Hans de Goede 3 participants 4 messages Mar 23, 2016 – Mar 28, 2016

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Device tree bindings Arm/Allwinner sunXi SoC support Arm and arm64 SoC sub-architectures (common parts)
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Hans de Goede

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#0 lore raw

PATCH 1/1 ARM: dts: sun8i: Add dts for Orange Pi 2 SBC

The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot, 4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header and a 40-pin GPIO header.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/Makefile                |   1 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 186 ++++++++++++++++++++++++++++++
 2 files changed, 187 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
arch/arm/boot/dts/Makefile +1 -0
index 31d50a4..282d8e4 100644
@@ -699,6 +699,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a33-sinlinx-sina33.dtb \
 	sun8i-a83t-allwinner-h8homlet-v2.dtb \
 	sun8i-a83t-cubietruck-plus.dtb \
+	sun8i-h3-orangepi-2.dtb \
 	sun8i-h3-orangepi-pc.dtb \
 	sun8i-h3-orangepi-plus.dtb
 dtb-$(CONFIG_MACH_SUN9I) += \
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +186 -0

186 lines not on this page · raw message

Signature · 1 line
2.7.3
Applied
#1 lore raw

PATCH 1/1 ARM: dts: sun8i: Add dts for Orange Pi 2 SBC

Quoted 8 lines · Hans de Goede

The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot, 4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header and a 40-pin GPIO header.

Signed-off-by Hans de Goede <[email protected]>

Applied, thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#2 lore raw

PATCH 1/1 ARM: dts: sun8i: Add dts for Orange Pi 2 SBC

In reply to Hans de Goede
Quoted 7 lines · On Wed, 23 Mar 2016 11:17:05 +0100 Hans de Goede <[email protected]> wrote:

The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot, 4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header and a 40-pin GPIO header.

Quoted 6 lines
Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/Makefile                |   1 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 186 ++++++++++++++++++++++++++++++
 2 files changed, 187 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
	[snip]

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts

Quoted 5 lines
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +0 -0
new file mode 100644
index 0000000..f93f5d1

	[snip]
Quoted 4 lines

+&mmc0 {

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +3 -0
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+	vmmc-supply = <&reg_vcc3v3>;

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts line 129

Quoted 10 lines
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +10 -0
+	bus-width = <4>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+	cd-inverted;
+	status = "okay";
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;

While still 3.3V, the power of the mmc1 if supplied by an other regulator.

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts line 134

Quoted 5 lines
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +5 -0
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+};

	[snip]
Signature · 2 lines
Ken ar c'henta?	|	      ** Breizh ha Linux atav! **
Jef		|		http://moinejf.free.fr/
author
#3 lore raw

Hi,

Quoted 32 lines · Jean-Francois Moine
Quoted 7 lines · On Wed, 23 Mar 2016 11:17:05 +0100 Hans de Goede <[email protected]> wrote:

The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot, 4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header and a 40-pin GPIO header.

Quoted 6 lines
Signed-off-by Hans de Goede <[email protected]>
---
  arch/arm/boot/dts/Makefile                |   1 +
  arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 186 ++++++++++++++++++++++++++++++
  2 files changed, 187 insertions(+)

create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts

	[snip]

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts

Quoted 5 lines
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +0 -0
new file mode 100644
index 0000000..f93f5d1

	[snip]
Quoted 9 lines

+&mmc0 {

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +8 -0
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+	cd-inverted;
+	status = "okay";
+};
Quoted 8 lines

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts line 129

Quoted 5 lines
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file +5 -0
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;

While still 3.3V, the power of the mmc1 if supplied by an other regulator.

I do not have schematics for the OPi 2, on the OPi plus schematic the 2 share a regulator. But even if it is another fixed 3.3V regulator, there is little use in modelling it as a separate regulator when we cannot control it.

Regards,

Hans