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board: ti: DRA7: Add DP83867 TI phy for rev c

PATCH In review Dan Murphy 3 participants 4 messages Mar 30, 2016 – Apr 2, 2016

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Dan Murphy

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#0 lore raw

PATCH 1/1 board: ti: DRA7: Add DP83867 TI phy for rev c

Enable the TI DP83867 Giga bit phy on the dra7 rev c board. The rx and tx internal delays are need for this board so the usage of RGMII_ID is required.

---
 board/ti/dra7xx/evm.c        | 6 ++++++
 include/configs/dra7xx_evm.h | 1 +
 2 files changed, 7 insertions(+)
board/ti/dra7xx/evm.c +6 -0
index 25f2031..9bd71d8 100644
@@ -27,6 +27,7 @@
 #include <dwc3-uboot.h>
 #include <dwc3-omap-uboot.h>
 #include <ti-usb-phy-uboot.h>
+#include <miiphy.h>
 
 #include "mux_data.h"
 #include "../common/board_detect.h"
@@ -679,6 +680,11 @@ int board_eth_init(bd_t *bis)
 	if (*omap_si_rev == DRA722_ES1_0)
 		cpsw_data.active_slave = 1;
 
+	if (board_is_dra72x_revc_or_later()) {
+		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+		cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+	}
+
 	ret = cpsw_register(&cpsw_data);
 	if (ret < 0)
 		printf("Error %d registering CPSW switch\n", ret);
include/configs/dra7xx_evm.h +1 -0
index c0795ab..7734e8d 100644
@@ -155,6 +155,7 @@
 #define CONFIG_MII			/* Required in net/eth.c */
 #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
 #define CONFIG_PHYLIB
+#define CONFIG_PHY_TI
 
 /* SPI */
 #undef	CONFIG_OMAP3_SPI
Signature · 1 line
2.8.0.rc3
#2 lore raw

PATCH 1/1 board: ti: DRA7: Add DP83867 TI phy for rev c

In reply to Dan Murphy
Quoted 6 lines · Dan Murphy

Enable the TI DP83867 Giga bit phy on the dra7 rev c board. The rx and tx internal delays are need for this board so the usage of RGMII_ID is required.

Signature · 8 lines
Tom
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#3 lore raw
In reply to Dan Murphy
Quoted 8 lines · Dan Murphy

Enable the TI DP83867 Giga bit phy on the dra7 rev c board. The rx and tx internal delays are need for this board so the usage of RGMII_ID is required.

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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