Add support for 96boards Dragonboard410C board
Subsystems (10)
v4 cover Add support for 96boards Dragonboard410C board
Hi All,
This is next last version of Dragonboard410c series ;) It should apply cleanly to latest master (080c499d).
I welcome all improvement ideas but please bear in mind I will probably implement them after this series is merged.
Very little updates this time:
- Added ACKs
- Added MMU configuration (I did that in mach code as
it's shared for all devices using this SoC)
- Fixed missing renames (ehci-fsl.h -> ehci-ci.h) - sorry for that!
- Moved CONFIG_OF_LIBFDT to defconfig and cleaned it up with savedefconfig
As for testing - I've manually tested it on dragonboard and did buildman test for all ARM targets (~540 boards, hopefuly I catched all that are affected by this series in any way).
@Marek, Joe, Tom: thanks for the input!
Regards,
Mateusz
V3 cover contents:
Sorry for longer delay, but I had too many things to do recently.
As always - for "simplicity" this series is available on my github:
https://github.com/hallor/u-boot/tree/dragonboard-for-mainline-v3
There are almost no changes + one bugfix:
- Bugfix: small rework of serial driver - U-Boot was interrupted when no serial converter was attached.
- Updated dragonboard readme.txt with info on how to stop @ fastboot
- Added SPMI entries into test.dts (so automatic DM tests would not fail)
- Added Tested-by and Reviewed-by Simon (from v2 comments)
- Rebased to recent master
- Fixed warnings in ASIX and ULPI code
- Added comments to head.S, little updates suggested by Daniel
@Simon: Thanks for the tests of v2!
Daniel Gl?ckner, Tom Rini, Jagan Teki: Thanks for the comments!
V2 cover contents:
This is updated series. 99% of review changes are applied, specific changes are (as always) include in each patch.
You can find this series on my github (if anyone just want to try it - that branch has also wait_for_bit applied):
https://github.com/hallor/u-boot/tree/dragonboard-for-mainline-v2
I did target tests on Dragonboard410c, and build tested platforms that may be affected by ULPI changes.
@Simon:
I decided not to rewrite pm8916_gpio for now, but for sake of "cleannes" moved offending bindings to separate file (and they are now properly childs of pm8916_gpio).
I will update it during rework of SoC gpio driver (I will have to create proper pinmux/pinctrl drivers to get rid of Little Kernel eventually).
This series still needs wait_for_bit series that is not included (yet).
V1 cover contents:
I finally managed to cleanup RFC for submission. I've included changes in each patch, there is a bit of them, but all are needed :)
This series requires wait_for_bit patch that I send few days ago:
https://patchwork.ozlabs.org/patch/561185/
RFC cover contents:
http://lists.denx.de/pipermail/u-boot/2015-December/237365.html
Changes in v4:
- Add Ack from Marek
- Add Ack from Marek
- Add Ack from Marek
- Add Ack from Marek and Joe
- Add missing renames (arch/* and board/*)
- Add sysmap for apq8016 (required to enable MMU)
- Move CONFIG_OF_LIBFDT to defconfig and cleaned it up with savedefconfig
Changes in v3:
- Add msm_serial_fetch that tries to fetch characters from FIFO
- Decrease no of characters requested in RX transaction
- Try to fetch characters from FIFO when tstc()/pending() is called
- New patch
- New patch
- New patch
- Updated test.dts to include SPMI like sandbox.dts does
- readme: Added info on how to enter fastboot mode and that dtbTool is also part of skales. Added more explanation on image generation.
- head: Add comment why it's needed, drop MZ EFI signature that makes no sense on this particular SoC, fix confusing entry point name (+update .lds file)
Changes in v2:
- Added newline before return... (globally)
- Renamed p to priv (priv data) - it required some rewrapping
- Added Reviewed-by
- Reordered includes (again)
- Added newlines between returns
- Fixed error handling in msm_gpio_probe
- Added reviewed-by
- Add reviewed-by
- Add Reviewed-by (sjg)
- Add better (any) descriptions for Kconfig items.
- New patch, independent of the rest
- Should compile cleanly on all affected platforms
- Is orthogonal to series (i.e. if get's NAK will not break rest of series)
- Add acked-by
- Add reviewed-by
- Add Acked-by
- Use PORT_... macro to write to portsc
- Remove extra whitespace in probe()
- Add acked-by
- Use proper entry order in Kconfig
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Fix header ordering
- Add reviewed-by
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Rename r -> regs, p -> priv
- Add reviewed-by
- Update binding doc (drop unused bindig)
- Rename DM_SPMI -> SPMI
- Rename p -> priv (in write/read)
- Fix header ordering (again)
- Add reviewed-by
- Add reviewed-by
- Reordered Kconfig & Makefile (to keep alphabetical ordering)
- Added link to dt binding @ help
- Add Reviewed-by
- Rename DM_SPMI -> SPMI
- Make MND divider comments more compact :)
- p -> priv
- Add reviewed-by
- Reordered Kconfig to keep alphabetical order
- Renamed reset_sandbox -> msm_reset (typo in reset.c)
- Renamed CONFIG_DM_SPMI -> CONFIG_SPMI
- Removed extra enter in dragonboard file
- Added ULPI* to defconfig
- Added MAINTAINERS to board
- Cleaned up config file - use distro defaults/environment:
- Dropped multiple CONFIG_CMD* and other CONFIG_*
- Added distro env/config
- Dropped old boot commands
- Split dts - pm8916_gpio entries are taken directly from
Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi; They will be removed once gpio drivers are converted to pinctrl.
- Renamed some pmic nodes, fixed dragonboard.c to find them properly.
- Added header and converted comments to c98-style in head.S
- Print error if pmic gpio node is not found.
- New patch
Changes in v1:
- Added (better) help to KConfig
- Added dt binding documentation
- Fixed include ordering
- Reworked msm_serial_getc
- Added error handling to msm_uart_clk_init (that is ignored later for now)
- Dropped unneeded DM_FLAG_PRE_RELOC
- Added dt binding documentation
- Added help to KConfig
- Use clrsetbits() to switch direction
- Fixed include order
- Added #defines for registers/register fields
- Added secondary compatible string
- Added commit message
- Added DT binding documentation
- Added Kconfig help
- Reordered includes
- Dropped redundant fields from msm_sdhc
- Cleaned up clock init code (+ added error handling)
- Dropped mdelay - use wait_for_bit instead in reset code
- Added missing newline after declarations
- Added error handling if "reg" is missing
- Converted base address to pointer
- No changes, just added Acked-by, Reviewed-by
- Reordered header files
- Removed braces around constant
- Added more verbose help to KConfig
- Added ULPI dependency to Kconfig
- Drop register #defines - use ehci-ci.h instead
- Create fixed ulpi viewport for device
- Use setbits/clearbits where possible
- Use wait_for_bit to reset controller
- Add dt binding documents
- Reorder includes
- Add read/write arguments documentation
- add binding documentation and better Kconfig help
- Changed a bit mapping
- Change include order
- Use clrsetbits* where possible
- Add one more supported dts id
- Handle missing fields in dt properly
- Added dt bindings
- Reoder includes
- Replaced extract_* macros with ordinary shift/mask
- Added error checking and whitespaces in probe
- Add binding doc
- Fixed inlcude ordering
- Merged direction_input and direction_output functions
- gpio_get: use switch instead of stacked if
- use pmic_clrsetbits
- add possibility to change prwkey bank name
- Handle invalid bindings
- Sanity HW check (i.e. check type/subtype registers)
- Fix include order
- Cleanup defines (added spaces for readibility)
- Base address is integer to avoid casting
- Use setbits_* family where possible
- Drop unneded comments, added newlines where needed
- Check return value of dev_get_addr
- Add binding for apq8016
- Cleaned up divider calculation
- Drop most of gpio.h (only empty file is needed)
- Add better help for dragonboard
- Move static structures to board_prepare_usb
- Add DM_SPMI to defconfig
Mateusz Kulikowski (21):
serial: Add support for Qualcomm serial port
gpio: Add support for Qualcomm gpio controller
mmc: Add support for Qualcomm SDHCI controller
ehci-hcd: Add init_after_reset
usb: ulpi: Add Kconfig options for ULPI
Migrate CONFIG_ULPI* to Kconfig
usb: ulpi: Fix viewport_addr type
usb: ulpi: Fix compile warning in read/write on 64-bit machines.
eth: asix88179: Print packet length properly
usb: Rename ehci-fsl.h to ehci-ci.h
usb: ehci-ci: Add missing registers.
ehci-ci.h: drop generic USBCMD fields
ehci: Add support for Qualcomm EHCI
drivers: Add SPMI bus uclass
spmi: Add sandbox test driver
drivers: spmi: Add support for Qualcomm SPMI bus driver
pmic: Add support for Qualcomm PM8916 PMIC
gpio: Add support for Qualcomm PM8916 gpios
arm: Add support for Qualcomm Snapdragon family
board: Add Qualcomm Dragonboard 410C support
Add myself as Snapdragon and SPMI maintainer
MAINTAINERS | 11 +
arch/arm/Kconfig | 12 +
arch/arm/Makefile | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/dragonboard410c-uboot.dtsi | 28 ++
arch/arm/dts/dragonboard410c.dts | 148 ++++++++++
arch/arm/mach-snapdragon/Kconfig | 26 ++
arch/arm/mach-snapdragon/Makefile | 9 +
arch/arm/mach-snapdragon/clock-apq8016.c | 262 ++++++++++++++++++
arch/arm/mach-snapdragon/include/mach/gpio.h | 9 +
.../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 +
arch/arm/mach-snapdragon/reset.c | 40 +++
arch/arm/mach-snapdragon/sysmap-apq8016.c | 30 ++
arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 +-
arch/sandbox/dts/sandbox.dts | 20 ++
arch/sandbox/dts/test.dts | 20 ++
board/boundary/nitrogen6x/nitrogen6x.c | 2 +-
board/denx/m53evk/m53evk.c | 2 +-
board/freescale/mx51evk/mx51evk.c | 2 +-
board/freescale/mx6slevk/mx6slevk.c | 2 +-
board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +-
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +-
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 2 +-
board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +-
board/qualcomm/dragonboard410c/Kconfig | 15 +
board/qualcomm/dragonboard410c/MAINTAINERS | 6 +
board/qualcomm/dragonboard410c/Makefile | 8 +
board/qualcomm/dragonboard410c/dragonboard410c.c | 131 +++++++++
board/qualcomm/dragonboard410c/head.S | 34 +++
board/qualcomm/dragonboard410c/readme.txt | 71 +++++
board/qualcomm/dragonboard410c/u-boot.lds | 90 ++++++
board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +-
configs/colibri_t20_defconfig | 2 +
configs/dragonboard410c_defconfig | 26 ++
configs/harmony_defconfig | 2 +
configs/mcx_defconfig | 3 +
configs/mt_ventoux_defconfig | 3 +
configs/sandbox_defconfig | 4 +
configs/twister_defconfig | 3 +
configs/zynq_picozed_defconfig | 2 +
configs/zynq_zc702_defconfig | 2 +
configs/zynq_zc706_defconfig | 2 +
configs/zynq_zed_defconfig | 2 +
configs/zynq_zybo_defconfig | 2 +
doc/device-tree-bindings/gpio/gpio-msm.txt | 22 ++
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 ++++
doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 ++
doc/device-tree-bindings/pmic/pm8916.txt | 18 ++
doc/device-tree-bindings/serial/msm-serial.txt | 6 +
doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ++
doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +++
doc/device-tree-bindings/usb/ehci-msm.txt | 10 +
doc/git-mailrc | 3 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/gpio/Kconfig | 24 ++
drivers/gpio/Makefile | 2 +
drivers/gpio/msm_gpio.c | 135 +++++++++
drivers/gpio/pm8916_gpio.c | 302 +++++++++++++++++++++
drivers/mmc/Kconfig | 9 +
drivers/mmc/Makefile | 1 +
drivers/mmc/msm_sdhci.c | 180 ++++++++++++
drivers/power/pmic/Kconfig | 16 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/pm8916.c | 96 +++++++
drivers/serial/Kconfig | 8 +
drivers/serial/Makefile | 1 +
drivers/serial/serial_msm.c | 217 +++++++++++++++
drivers/spmi/Kconfig | 23 ++
drivers/spmi/Makefile | 9 +
drivers/spmi/spmi-msm.c | 189 +++++++++++++
drivers/spmi/spmi-sandbox.c | 157 +++++++++++
drivers/spmi/spmi-uclass.c | 48 ++++
drivers/usb/Kconfig | 2 +
drivers/usb/eth/asix88179.c | 2 +-
drivers/usb/host/Kconfig | 11 +
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-fsl.c | 2 +-
drivers/usb/host/ehci-hcd.c | 6 +
drivers/usb/host/ehci-mpc512x.c | 6 +-
drivers/usb/host/ehci-msm.c | 178 ++++++++++++
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 2 +-
drivers/usb/host/ehci-mxc.c | 2 +-
drivers/usb/host/ehci-vf.c | 2 +-
drivers/usb/host/ehci-zynq.c | 2 +-
drivers/usb/host/ehci.h | 1 +
drivers/usb/ulpi/Kconfig | 33 +++
drivers/usb/ulpi/ulpi-viewport.c | 5 +-
include/configs/colibri_t20.h | 3 +-
include/configs/dragonboard410c.h | 150 ++++++++++
include/configs/harmony.h | 2 -
include/configs/mcx.h | 2 -
include/configs/tam3517-common.h | 2 -
include/configs/zynq-common.h | 2 -
include/dm/uclass-id.h | 1 +
include/spmi/spmi.h | 47 ++++
include/usb/{ehci-fsl.h => ehci-ci.h} | 16 +-
include/usb/ulpi.h | 4 +-
test/dm/Makefile | 1 +
test/dm/spmi.c | 115 ++++++++
101 files changed, 3231 insertions(+), 41 deletions(-)
create mode 100644 arch/arm/dts/dragonboard410c-uboot.dtsi
create mode 100644 arch/arm/dts/dragonboard410c.dts
create mode 100644 arch/arm/mach-snapdragon/Kconfig
create mode 100644 arch/arm/mach-snapdragon/Makefile
create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c
create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h
create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h
create mode 100644 arch/arm/mach-snapdragon/reset.c
create mode 100644 arch/arm/mach-snapdragon/sysmap-apq8016.c
create mode 100644 board/qualcomm/dragonboard410c/Kconfig
create mode 100644 board/qualcomm/dragonboard410c/MAINTAINERS
create mode 100644 board/qualcomm/dragonboard410c/Makefile
create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.c
create mode 100644 board/qualcomm/dragonboard410c/head.S
create mode 100644 board/qualcomm/dragonboard410c/readme.txt
create mode 100644 board/qualcomm/dragonboard410c/u-boot.lds
create mode 100644 configs/dragonboard410c_defconfig
create mode 100644 doc/device-tree-bindings/gpio/gpio-msm.txt
create mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt
create mode 100644 doc/device-tree-bindings/mmc/msm_sdhci.txt
create mode 100644 doc/device-tree-bindings/pmic/pm8916.txt
create mode 100644 doc/device-tree-bindings/serial/msm-serial.txt
create mode 100644 doc/device-tree-bindings/spmi/spmi-msm.txt
create mode 100644 doc/device-tree-bindings/spmi/spmi-sandbox.txt
create mode 100644 doc/device-tree-bindings/usb/ehci-msm.txt
create mode 100644 drivers/gpio/msm_gpio.c
create mode 100644 drivers/gpio/pm8916_gpio.c
create mode 100644 drivers/mmc/msm_sdhci.c
create mode 100644 drivers/power/pmic/pm8916.c
create mode 100644 drivers/serial/serial_msm.c
create mode 100644 drivers/spmi/Kconfig
create mode 100644 drivers/spmi/Makefile
create mode 100644 drivers/spmi/spmi-msm.c
create mode 100644 drivers/spmi/spmi-sandbox.c
create mode 100644 drivers/spmi/spmi-uclass.c
create mode 100644 drivers/usb/host/ehci-msm.c
create mode 100644 drivers/usb/ulpi/Kconfig
create mode 100644 include/configs/dragonboard410c.h
create mode 100644 include/spmi/spmi.h
rename include/usb/{ehci-fsl.h => ehci-ci.h} (96%)
create mode 100644 test/dm/spmi.cSignature · 1 line
2.5.0
PATCH v4 1/21 serial: Add support for Qualcomm serial port
This driver works in "new" Data Mover UART mode, so will be compatible with modern Qualcomm chips only.
---
Changes in v4: None
Changes in v3:
- Add msm_serial_fetch that tries to fetch characters from FIFO
- Decrease no of characters requested in RX transaction
- Try to fetch characters from FIFO when tstc()/pending() is called
Changes in v2:
- Added newline before return... (globally)
- Renamed p to priv (priv data) - it required some rewrapping
- Added Reviewed-by
Changes in v1:
- Added (better) help to KConfig
- Added dt binding documentation
- Fixed include ordering
- Reworked msm_serial_getc
- Added error handling to msm_uart_clk_init (that is ignored later for now)
- Dropped unneeded DM_FLAG_PRE_RELOC
doc/device-tree-bindings/serial/msm-serial.txt | 6 + drivers/serial/Kconfig | 8 + drivers/serial/Makefile | 1 + drivers/serial/serial_msm.c | 217 +++++++++++++++++++++++++ 4 files changed, 232 insertions(+) create mode 100644 doc/device-tree-bindings/serial/msm-serial.txt create mode 100644 drivers/serial/serial_msm.c
doc/device-tree-bindings/serial/msm-serial.txt new file +6 -0
@@ -0,0 +1,6 @@ +Qualcomm UART (Data Mover mode) + +Required properties: +- compatible: must be "qcom,msm-uartdm-v1.4" +- reg: start address and size of the registers +- clock: interface clock (must accept baudrate as a frequency)
drivers/serial/Kconfig +8 -0
@@ -320,4 +320,12 @@ config XILINX_UARTLITE If you have a Xilinx based board and want to use the uartlite serial ports, say Y to this option. If unsure, say N. +config MSM_SERIAL + bool "Qualcomm on-chip UART" + depends on DM_SERIAL + help + Support Data Mover UART used on Qualcomm Snapdragon SoCs. + It should support all Qualcomm devices with UARTDM version 1.4, + for example APQ8016 and MSM8916. + Single baudrate is supported in current implementation (115200). endmenu
drivers/serial/Makefile +1 -0
@@ -39,6 +39,7 @@ obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o +obj-$(CONFIG_MSM_SERIAL) += serial_msm.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_TTY) += usbtty.o
drivers/serial/serial_msm.c new file +217 -0
217 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 1/21 serial: Add support for Qualcomm serial port
Quoted 6 lines · Mateusz Kulikowski
This driver works in "new" Data Mover UART mode, so will be compatible with modern Qualcomm chips only.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 2/21 gpio: Add support for Qualcomm gpio controller
In reply to Mateusz KulikowskiAdd support for gpio controllers on Qualcomm Snapdragon devices. This devices are usually called Top Level Mode Multiplexing in Qualcomm documentation.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Reordered includes (again)
- Added newlines between returns
- Fixed error handling in msm_gpio_probe
- Added reviewed-by
Changes in v1:
- Added dt binding documentation
- Added help to KConfig
- Use clrsetbits() to switch direction
- Fixed include order
- Added #defines for registers/register fields
- Added secondary compatible string
doc/device-tree-bindings/gpio/gpio-msm.txt | 22 +++++ drivers/gpio/Kconfig | 14 +++ drivers/gpio/Makefile | 1 + drivers/gpio/msm_gpio.c | 135 +++++++++++++++++++++++++++++ 4 files changed, 172 insertions(+) create mode 100644 doc/device-tree-bindings/gpio/gpio-msm.txt create mode 100644 drivers/gpio/msm_gpio.c
doc/device-tree-bindings/gpio/gpio-msm.txt new file +22 -0
@@ -0,0 +1,22 @@ +Qualcomm Snapdragon GPIO controller + +Required properties: +- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl" +- reg : Physical base address and length of the controller's registers. + This controller is called "Top Level Mode Multiplexing" in + Qualcomm documentation. +- #gpio-cells : Should be one (pin number). +- gpio-controller : Marks the device node as a GPIO controller. +- gpio-count: Number of GPIO pins. +- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used. + +Example: + +soc_gpios: pinctrl at 1000000 { + compatible = "qcom,msm8916-pinctrl"; + reg = <0x1000000 0x300000>; + gpio-controller; + gpio-count = <122>; + gpio-bank-name="soc"; + #gpio-cells = <1>; +};
drivers/gpio/Kconfig +14 -0
@@ -55,6 +55,20 @@ config LPC32XX_GPIO help Support for the LPC32XX GPIO driver. +config MSM_GPIO + bool "Qualcomm GPIO driver" + depends on DM_GPIO + default n + help + Support GPIO controllers on Qualcomm Snapdragon family of SoCs. + This controller have single bank (default name "soc"), every + gpio has it's own set of registers. + Only simple GPIO operations are supported (get/set, change of + direction and checking pin function). + Supported devices: + - APQ8016 + - MSM8916 + config ROCKCHIP_GPIO bool "Rockchip GPIO driver" depends on DM_GPIO
drivers/gpio/Makefile +1 -0
@@ -50,3 +50,4 @@ obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o +obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
drivers/gpio/msm_gpio.c new file +135 -0
135 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 2/21 gpio: Add support for Qualcomm gpio controller
Quoted 7 lines · Mateusz Kulikowski
Add support for gpio controllers on Qualcomm Snapdragon devices. This devices are usually called Top Level Mode Multiplexing in Qualcomm documentation.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 3/21 mmc: Add support for Qualcomm SDHCI controller
In reply to Mateusz KulikowskiAdd support for SD/eMMC controller present on some Qualcomm Snapdragon devices. This controller implements SDHCI 2.0 interface but requires vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1:
- Added commit message
- Added DT binding documentation
- Added Kconfig help
- Reordered includes
- Dropped redundant fields from msm_sdhc
- Cleaned up clock init code (+ added error handling)
- Dropped mdelay - use wait_for_bit instead in reset code
- Added missing newline after declarations
- Added error handling if "reg" is missing
- Converted base address to pointer
doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 ++++ drivers/mmc/Kconfig | 9 ++ drivers/mmc/Makefile | 1 + drivers/mmc/msm_sdhci.c | 180 +++++++++++++++++++++++++++++ 4 files changed, 215 insertions(+) create mode 100644 doc/device-tree-bindings/mmc/msm_sdhci.txt create mode 100644 drivers/mmc/msm_sdhci.c
doc/device-tree-bindings/mmc/msm_sdhci.txt new file +25 -0
@@ -0,0 +1,25 @@ +Qualcomm Snapdragon SDHCI controller + +Required properties: +- compatible : "qcom,sdhci-msm-v4" +- reg: Base address and length of registers: + - Host controller registers (SDHCI) + - SD Core registers +- clock: interface clock (must accept SD bus clock as a frequency) + +Optional properties: +- index: If there is more than one controller - controller index (required + by generic SDHCI code). +- bus_width: Width of SD/eMMC bus (default 4) +- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz) + +Example: + +sdhci at 07864000 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0x7864900 0x11c 0x7864000 0x800>; + index = <0x1>; + bus-width = <0x4>; + clock = <&clkc 1>; + clock-frequency = <200000000>; +};
drivers/mmc/Kconfig +9 -0
@@ -16,6 +16,15 @@ config DM_MMC appear as block devices in U-Boot and can support filesystems such as EXT4 and FAT. +config MSM_SDHCI + bool "Qualcomm SDHCI controller" + depends on DM_MMC + help + Enables support for SDHCI 2.0 controller present on some Qualcomm + Snapdragon devices. This device is compatible with eMMC v4.5 and + SD 3.0 specifications. Both SD and eMMC devices are supported. + Card-detect gpios are not supported. + config ROCKCHIP_DWMMC bool "Rockchip SD/MMC controller support" depends on DM_MMC && OF_CONTROL
drivers/mmc/Makefile +1 -0
@@ -50,3 +50,4 @@ else obj-$(CONFIG_GENERIC_MMC) += mmc_write.o endif obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o +obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o
drivers/mmc/msm_sdhci.c new file +180 -0
180 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 3/21 mmc: Add support for Qualcomm SDHCI controller
Quoted 8 lines · Mateusz Kulikowski
Add support for SD/eMMC controller present on some Qualcomm Snapdragon devices. This controller implements SDHCI 2.0 interface but requires vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 4/21 ehci-hcd: Add init_after_reset
In reply to Mateusz KulikowskiSome host controllers need addidional initialization after ehci_reset() In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET. This patch adds similar option to ehci drivers using dm.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Reviewed-by (sjg)
Changes in v1:
- No changes, just added Acked-by, Reviewed-by
drivers/usb/host/ehci-hcd.c | 6 ++++++ drivers/usb/host/ehci.h | 1 + 2 files changed, 7 insertions(+)
drivers/usb/host/ehci-hcd.c +6 -0
@@ -1615,6 +1615,12 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,if (ret) goto err; +if (ops->init_after_reset) { + ret = ops->init_after_reset (ctrl); +if (ret) + goto err; + } + ret =ehci_common_init (ctrl, tweaks);if (ret) goto err;
drivers/usb/host/ehci.h +1 -0
@@ -240,6 +240,7 @@ struct ehci_ops {void (*powerup_fixup)(struct ehci_ctrl *ctrl,uint32_t *status_reg,uint32_t *reg);uint32_t *(*get_portsc_register)(struct ehci_ctrl *ctrl,int port); +int (*init_after_reset)(struct ehci_ctrl *ctrl); };struct ehci_ctrl {
Signature · 1 line
2.5.0
PATCH v4 4/21 ehci-hcd: Add init_after_reset
Quoted 9 lines · Mateusz Kulikowski
Some host controllers need addidional initialization after
ehci_reset()In non-dm implementation it is possible to useCONFIG_EHCI_HCD_INIT_AFTER_RESET. This patch adds similar option to ehci drivers using dm.Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>Reviewed-by Tom Rini <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 4/21 ehci-hcd: Add init_after_reset
Commit 3f9f8a5b83f8aec40c9f4ee496046a695e333c45 breaks U-Boot on Banana Pi (tested using FEL mode):
--- snip ---
U-Boot SPL 2016.03-00612-g3f9f8a5 (Apr 03 2016 - 12:53:35)
DRAM: 1024 MiB
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
Trying to boot from
U-Boot 2016.03-00612-g3f9f8a5 (Apr 03 2016 - 12:53:35 +0200) Allwinner Technoloy
CPU: Allwinner A20 (SUN7I) Model: LeMaker Banana Pi I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0
Card did not respond to voltage select!
*** Warning - MMC init failed, using default environment
Setting up a 720x576i composite-pal console (overscan 32x20)
In: serial Out: vga Err: vga SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: eth0: ethernet at 01c50000 starting USB... USB0: undefined instruction pc : [<00006004>] lr : [<7ef8876c>]
reloc pc : [<cb0ac004>] lr : [<4a02e76c>]
sp : 7af31660 ip : 00000000 fp : 7af3bb28
r10: 7af3be08 r9 : 7af39ee0 r8 : 01c14010
r7 : 01c14000 r6 : 00000000 r5 : 00000000 r4 : 7af3bc40
r3 : 00006000 r2 : 014af4dd r1 : 01c20c00 r0 : 7af3bc40
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
--- snip ---
Regards, B. Nortmann
PATCH v4 4/21 ehci-hcd: Add init_after_reset
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Quoted 1 line · Bernhard Nortmann
Commit
3f9f8a5b83f8aec40c9f4ee496046a695e333c45breaks U-Boot on Banana Pi (tested using FEL mode):
Fix posted - thanks :)
http://lists.denx.de/pipermail/u-boot/2016-April/250373.html
Regards,
Mateusz
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PATCH v4 5/21 usb: ulpi: Add Kconfig options for ULPI
In reply to Mateusz KulikowskiThe following options can be now enabled via defconfig:
- CONFIG_USB_ULPI
- CONFIG_USB_ULPI_VIEWPORT
- CONFIG_USB_ULPI_VIEWPORT_OMAP
---
Changes in v4:
- Add Ack from Marek
Changes in v3: None
Changes in v2:
- Add better (any) descriptions for Kconfig items.
Changes in v1: None
drivers/usb/Kconfig | 2 ++ drivers/usb/ulpi/Kconfig | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 drivers/usb/ulpi/Kconfig
drivers/usb/Kconfig +2 -0
@@ -53,6 +53,8 @@ source "drivers/usb/musb-new/Kconfig" source "drivers/usb/emul/Kconfig" +source "drivers/usb/ulpi/Kconfig" + comment "USB peripherals" config USB_STORAGE
drivers/usb/ulpi/Kconfig new file +33 -0
@@ -0,0 +1,33 @@ +comment "ULPI drivers" + +choice + prompt "ULPI Viewport type" + optional + default n + help + Select ULPI viewport (SoC-side interface to ULPI) implementation + appropriate for the device if you want to communicate with + UTMI (USB PHY) via ULPI interface. + +config USB_ULPI_VIEWPORT + bool "Generic ULPI Viewport" + help + Support generic ULPI Viewport implementation that is used on + some Tegra and Snapdragon devices. + +config USB_ULPI_VIEWPORT_OMAP + bool "OMAP ULPI Viewport" + help + Support ULPI Viewport implementation that is used on OMAP devices. + +endchoice + +config USB_ULPI + bool "ULPI support" + depends on (USB_ULPI_VIEWPORT || USB_ULPI_VIEWPORT_OMAP) + help + Select to commnicate with USB PHY via ULPI interface. + ULPI is wrapper on UTMI+ core that is used as + PHY Transreceiver for USB controllers. + + This driver uses ULPI viewports that are specific for each SoC.
Signature · 1 line
2.5.0
PATCH v4 5/21 usb: ulpi: Add Kconfig options for ULPI
Quoted 8 lines · Mateusz Kulikowski
The following options can be now enabled via defconfig:
-CONFIG_USB_ULPI
-CONFIG_USB_ULPI_VIEWPORT
-CONFIG_USB_ULPI_VIEWPORT_OMAPSigned-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Acked-by Marek Vasut <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 6/21 Migrate CONFIG_ULPI* to Kconfig
In reply to Mateusz KulikowskiMove CONFIG_USB_ULPI* from headers to defconfigs for boards that use it. Also - add CONFIG_USB where necesarry - all boards use it, but some are not defining it explicitly.
Affected boards:colibri_t20, harmony, mcx, mt_ventoux, twister,zynq_(picozed, zc702, zc706, zed, zybo)
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch, independent of the rest
- Should compile cleanly on all affected platforms
- Is orthogonal to series (i.e. if get's NAK will not break rest of series)
Changes in v1: None
configs/colibri_t20_defconfig | 2 ++ configs/harmony_defconfig | 2 ++ configs/mcx_defconfig | 3 +++ configs/mt_ventoux_defconfig | 3 +++ configs/twister_defconfig | 3 +++ configs/zynq_picozed_defconfig | 2 ++ configs/zynq_zc702_defconfig | 2 ++ configs/zynq_zc706_defconfig | 2 ++ configs/zynq_zed_defconfig | 2 ++ configs/zynq_zybo_defconfig | 2 ++ include/configs/colibri_t20.h | 3 +-- include/configs/harmony.h | 2 -- include/configs/mcx.h | 2 -- include/configs/tam3517-common.h | 2 -- include/configs/zynq-common.h | 2 -- 15 files changed, 24 insertions(+), 10 deletions(-)
configs/colibri_t20_defconfig +2 -0
@@ -21,4 +21,6 @@ CONFIG_DM_USB=y CONFIG_USB_GADGET=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/harmony_defconfig +2 -0
@@ -21,4 +21,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/mcx_defconfig +3 -0
@@ -12,3 +12,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y
configs/mt_ventoux_defconfig +3 -0
@@ -10,3 +10,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y
configs/twister_defconfig +3 -0
@@ -10,3 +10,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y
configs/zynq_picozed_defconfig +2 -0
@@ -14,3 +14,5 @@ CONFIG_ZYNQ_SDHCI=y CONFIG_ZYNQ_GEM=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y
configs/zynq_zc702_defconfig +2 -0
@@ -26,3 +26,5 @@ CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y
configs/zynq_zc706_defconfig +2 -0
@@ -23,3 +23,5 @@ CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y
configs/zynq_zed_defconfig +2 -0
@@ -23,3 +23,5 @@ CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y
configs/zynq_zybo_defconfig +2 -0
@@ -24,3 +24,5 @@ CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y
include/configs/colibri_t20.h +1 -2
@@ -36,8 +36,7 @@/* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_ULPI -#define CONFIG_USB_ULPI_VIEWPORT +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3#define CONFIG_USB_STORAGE #define CONFIG_CMD_USB
include/configs/harmony.h +0 -2
@@ -44,8 +44,6 @@/* USB Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_ULPI -#define CONFIG_USB_ULPI_VIEWPORT #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB
include/configs/mcx.h +0 -2
@@ -102,8 +102,6 @@#define CONFIG_OMAP3_GPIO_5 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP -#define CONFIG_USB_ULPI -#define CONFIG_USB_ULPI_VIEWPORT_OMAP #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3#define CONFIG_USB_HOST_ETHER
include/configs/tam3517-common.h +0 -2
@@ -91,8 +91,6 @@#define CONFIG_OMAP3_GPIO_5 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP -#define CONFIG_USB_ULPI -#define CONFIG_USB_ULPI_VIEWPORT_OMAP #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3#define CONFIG_USB_STORAGE
include/configs/zynq-common.h +0 -2
@@ -96,8 +96,6 @@# define CONFIG_CMD_USB # define CONFIG_USB_STORAGE # define CONFIG_USB_EHCI_ZYNQ -# define CONFIG_USB_ULPI_VIEWPORT -# define CONFIG_USB_ULPI # define CONFIG_EHCI_IS_TDI # define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Signature · 1 line
2.5.0
PATCH v4 6/21 Migrate CONFIG_ULPI* to Kconfig
Quoted 10 lines · Mateusz Kulikowski
Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it. Also - add
CONFIG_USBwhere necesarry - all boards use it, but some are not defining it explicitly.Affected boards:
colibri_t20, harmony, mcx,mt_ventoux, twister,zynq_(picozed, zc702, zc706, zed, zybo)Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 7/21 usb: ulpi: Fix viewport_addr type
In reply to Mateusz Kulikowskiviewport_addr is address of memory mapped ULPI viewport. It is used only as argument to readl/writel later causing compile warnings on 64-bit devices.
This fix changes its type to match pointer size.
---
Changes in v4:
- Add Ack from Marek
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
include/usb/ulpi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/usb/ulpi.h +1 -1
@@ -32,7 +32,7 @@* be extended from this structure */ struct ulpi_viewport { -u32 viewport_addr; +uintptr_t viewport_addr;u32 port_num; };
Signature · 1 line
2.5.0
PATCH v4 7/21 usb: ulpi: Fix viewport_addr type
Quoted 8 lines · Mateusz Kulikowski
viewport_addris address of memory mapped ULPI viewport. It is used only as argument to readl/writel later causing compile warnings on 64-bit devices.This fix changes its type to match pointer size.
Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 8/21 usb: ulpi: Fix compile warning in read/write on 64-bit machines.
In reply to Mateusz Kulikowskiulpi_read and ulpi_write are used to read/write registers via ULPI bus. Code generates compilation warnings on 64-bit machines where pointer is cast to u32.
This patch drops all but last 8 bits of register address. It is possible, because addresses on ULPI bus are 6- or 8-bit.
It is not possible (according to ULPI 1.1 spec) to have more than 8-bit addressing.
This patch should not cause regressions as all calls to ulpi_read/write use either structure pointer (@ address 0) or integer offsets cast to pointer - addresses requested are way below 8-bit range.
---
Changes in v4:
- Add Ack from Marek
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
drivers/usb/ulpi/ulpi-viewport.c | 5 +++-- include/usb/ulpi.h | 2 ++ 2 files changed, 5 insertions(+), 2 deletions(-)
drivers/usb/ulpi/ulpi-viewport.c +3 -2
@@ -92,7 +92,8 @@ static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value)int ulpi_write (struct ulpi_viewport *ulpi_vp,u8 *reg,u32 value) { -u32 val =ULPI_RWRUN |ULPI_RWCTRL | ((u32 )reg <<16 ) | (value &0xff ); +u32 addr = (uintptr_t )reg &0xFF ; +u32 val =ULPI_RWRUN |ULPI_RWCTRL | addr <<16 | (value &0xff ); val |= (ulpi_vp->port_num &0x7 ) <<24 ;return ulpi_request (ulpi_vp, val);
@@ -101,7 +102,7 @@ int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)u32 ulpi_read (struct ulpi_viewport *ulpi_vp,u8 *reg) {int err; -u32 val =ULPI_RWRUN | ((u32 )reg <<16 ); +u32 val =ULPI_RWRUN | ((uintptr_t )reg &0xFF ) <<16 ; val |= (ulpi_vp->port_num &0x7 ) <<24 ; err =ulpi_request (ulpi_vp, val);
include/usb/ulpi.h +2 -0
@@ -123,6 +123,7 @@ int ulpi_reset(struct ulpi_viewport *ulpi_vp);/* * Write to the ULPI PHY register via the viewport. * @reg - the ULPI register (one of the fields in struct ulpi_regs). +* Due to ULPI design, only 8 lsb of address are used. * @value - the value - only 8 lower bits are used, others ignored. * * returns 0 on success, ULPI_ERROR on failure.
@@ -132,6 +133,7 @@ int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value);/* * Read the ULPI PHY register content via the viewport. * @reg - the ULPI register (one of the fields in struct ulpi_regs). +* Due to ULPI design, only 8 lsb of address are used. * * returns register content on success, ULPI_ERROR on failure. */
Signature · 1 line
2.5.0
PATCH v4 8/21 usb: ulpi: Fix compile warning in read/write on 64-bit machines.
Quoted 10 lines · Mateusz Kulikowski
ulpi_readandulpi_writeare used to read/write registers via ULPI bus. Code generates compilation warnings on 64-bit machines where pointer is cast to u32.This patch drops all but last 8 bits of register address. It is possible, because addresses on ULPI bus are 6- or 8-bit.
It is not possible (according to ULPI 1.1 spec) to have more than 8-bit addressing.
Quoted 6 lines
This patch should not cause regressions as all calls to ulpi_read/write use either structure pointer (@ address 0) or integer offsets cast to pointer - addresses requested are way below 8-bit range.
Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 9/21 eth: asix88179: Print packet length properly
In reply to Mateusz KulikowskiDebug printf used '%u' to print size_t variable.
This caused warnings on 64-bit machines.
---
Changes in v4:
- Add Ack from Marek and Joe
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
drivers/usb/eth/asix88179.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/usb/eth/asix88179.c +1 -1
@@ -497,7 +497,7 @@ static int asix_send(struct eth_device *eth, void *packet, int length) length +sizeof (packet_len) +sizeof (tx_hdr2), &actual_len, USB_BULK_SEND_TIMEOUT); -debug ("Tx: len = %u, actual = %u, err = %d\n" , +debug ("Tx: len = %zu, actual = %u, err = %d\n" , length +sizeof (packet_len), actual_len, err);return err;
Signature · 1 line
2.5.0
PATCH v4 9/21 eth: asix88179: Print packet length properly
Quoted 6 lines · Mateusz Kulikowski
Debug printf used '%u' to print
size_tvariable.
This caused warnings on 64-bit machines.Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>Acked-by Joe Hershberger <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 10/21 usb: Rename ehci-fsl.h to ehci-ci.h
In reply to Mateusz KulikowskiMost of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs).
---
Changes in v4:
- Add missing renames (arch/* and board/*)
Changes in v3: None
Changes in v2:
- Add acked-by
Changes in v1: None
arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 +-
board/boundary/nitrogen6x/nitrogen6x.c | 2 +-
board/denx/m53evk/m53evk.c | 2 +-
board/freescale/mx51evk/mx51evk.c | 2 +-
board/freescale/mx6slevk/mx6slevk.c | 2 +-
board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +-
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +-
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 2 +-
board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +-
board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +-
drivers/usb/host/ehci-fsl.c | 2 +-
drivers/usb/host/ehci-mpc512x.c | 2 +-
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 2 +-
drivers/usb/host/ehci-mxc.c | 2 +-
drivers/usb/host/ehci-vf.c | 2 +-
drivers/usb/host/ehci-zynq.c | 2 +-
include/usb/{ehci-fsl.h => ehci-ci.h} | 6 +++---
18 files changed, 20 insertions(+), 20 deletions(-)
rename include/usb/{ehci-fsl.h => ehci-ci.h} (99%)arch/powerpc/cpu/mpc83xx/cpu_init.c +1 -1
@@ -9,7 +9,7 @@#include <ioports.h> #include <asm/io.h> #ifdef CONFIG_USB_EHCI_FSL -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #endif DECLARE_GLOBAL_DATA_PTR ;
board/boundary/nitrogen6x/nitrogen6x.c +1 -1
@@ -31,7 +31,7 @@#include <i2c.h> #include <input.h> #include <netdev.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
board/denx/m53evk/m53evk.c +1 -1
@@ -22,7 +22,7 @@#include <spl.h> #include <fsl_esdhc.h> #include <asm/gpio.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <linux/fb.h> #include <ipu_pixfmt.h>
board/freescale/mx51evk/mx51evk.c +1 -1
@@ -20,7 +20,7 @@#include <power/pmic.h> #include <fsl_pmic.h> #include <mc13892.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;
board/freescale/mx6slevk/mx6slevk.c +1 -1
@@ -28,7 +28,7 @@#include <power/pfuze100_pmic.h> #include "../common/pfuze.h" #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;
board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +1 -1
@@ -28,7 +28,7 @@#include <power/pfuze100_pmic.h> #include "../common/pfuze.h" #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <pca953x.h> DECLARE_GLOBAL_DATA_PTR ;
board/freescale/mx6sxsabresd/mx6sxsabresd.c +1 -1
@@ -27,7 +27,7 @@#include <power/pfuze100_pmic.h> #include "../common/pfuze.h" #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +1 -1
@@ -27,7 +27,7 @@#include <power/pfuze3000_pmic.h> #include "../common/pfuze.h" #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;
board/freescale/mx7dsabresd/mx7dsabresd.c +1 -1
@@ -24,7 +24,7 @@#include <asm/imx-common/mxc_i2c.h> #include <asm/arch/crm_regs.h> #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;
board/solidrun/mx6cuboxi/mx6cuboxi.c +1 -1
@@ -33,7 +33,7 @@#include <asm/arch/sys_proto.h> #include <spl.h> #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR ;
drivers/usb/host/ehci-fsl.c +1 -1
@@ -12,7 +12,7 @@#include <pci.h> #include <usb.h> #include <asm/io.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <hwconfig.h> #include <fsl_usb.h> #include <fdt_support.h>
drivers/usb/host/ehci-mpc512x.c +1 -1
@@ -17,7 +17,7 @@#include <pci.h> #include <usb.h> #include <asm/io.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include "ehci.h"
drivers/usb/host/ehci-mx5.c +1 -1
@@ -9,7 +9,7 @@#include <usb.h> #include <errno.h> #include <linux/compiler.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
drivers/usb/host/ehci-mx6.c +1 -1
@@ -10,7 +10,7 @@#include <errno.h> #include <wait_bit.h> #include <linux/compiler.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
drivers/usb/host/ehci-mxc.c +1 -1
@@ -9,7 +9,7 @@#include <usb.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <errno.h> #include "ehci.h"
drivers/usb/host/ehci-vf.c +1 -1
@@ -17,7 +17,7 @@#include <asm/arch/crm_regs.h> #include <asm/imx-common/iomux-v3.h> #include <asm/imx-common/regs-usbphy.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include "ehci.h"
drivers/usb/host/ehci-zynq.c +1 -1
@@ -11,7 +11,7 @@#include <asm/arch/sys_proto.h> #include <asm/io.h> #include <usb.h> -#include <usb/ehci-fsl.h> +#include <usb/ehci-ci.h> #include <usb/ulpi.h> #include "ehci.h"
include/usb/ehci-ci.h renamed from include/usb/ehci-fsl.h +3 -3
@@ -6,8 +6,8 @@* SPDX-License-Identifier: GPL-2.0+ */ -#ifndef _EHCI_FSL_H -#define _EHCI_FSL_H +#ifndef _EHCI_CI_H +#define _EHCI_CI_H#include <asm/processor.h>
@@ -285,4 +285,4 @@ int usb_phy_mode(int port);int board_ehci_hcd_init (int port);int board_usb_phy_mode (int port); -#endif /* _EHCI_FSL_H */ +#endif /* _EHCI_CI_H */
Signature · 1 line
2.5.0
PATCH v4 10/21 usb: Rename ehci-fsl.h to ehci-ci.h
Quoted 10 lines · Mateusz Kulikowski
Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header:
ehci-ci.hContents of file are not changed (so it contains several references to freescale SoCs).Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v4 11/21 usb: ehci-ci: Add missing registers.
In reply to Mateusz KulikowskiSome registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have meaning on other devices.
The following registers were added:
sbusstatus/sbusmode: AHB-related registers genconfig*: Auxiluary IP core configuration registers.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1: None
include/usb/ehci-ci.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
include/usb/ehci-ci.h +5 -1
@@ -191,7 +191,11 @@ struct usb_ehci {u32 gptimer1_ld;/* 0x088 - General Purpose Timer 1 load value */ u32 gptimer1_ctrl;/* 0x08C - General Purpose Timer 1 control */ u32 sbuscfg;/* 0x090 - System Bus Interface Control */ -u8 res2[0x6C ]; +u32 sbusstatus;/* 0x094 - System Bus Interface Status */ +u32 sbusmode;/* 0x098 - System Bus Interface Mode */ +u32 genconfig;/* 0x09C - USB Core Configuration */ +u32 genconfig2;/* 0x0A0 - USB Core Configuration 2 */ +u8 res2[0x5c ];u8 caplength;/* 0x100 - Capability Register Length */ u8 res3[0x1 ];u16 hciversion;/* 0x102 - Host Interface Version */
Signature · 1 line
2.5.0
PATCH v4 11/21 usb: ehci-ci: Add missing registers.
Quoted 11 lines · Mateusz Kulikowski
Some registers of
usb_ehciwere marked as reserved.
This may be true for some variants of Chipidea USB core, but they have meaning on other devices.The following registers were added:
sbusstatus/sbusmode: AHB-related registers genconfig*: Auxiluary IP core configuration registers.Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Marek Vasut <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v4 12/21 ehci-ci.h: drop generic USBCMD fields
In reply to Mateusz KulikowskiUse definitions from ehci.h instead.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Acked-by
Changes in v1: None
drivers/usb/host/ehci-mpc512x.c | 4 ++-- include/usb/ehci-ci.h | 4 ---- 2 files changed, 2 insertions(+), 6 deletions(-)
drivers/usb/host/ehci-mpc512x.c +2 -2
@@ -93,7 +93,7 @@ static int reset_usb_controller(volatile struct usb_ehci *ehci)unsigned int i;/* Command a reset of the USB Controller */ -out_be32 (&(ehci->usbcmd),EHCI_FSL_USBCMD_RST ); +out_be32 (&(ehci->usbcmd),CMD_RESET );/* Wait for the reset process to finish */ for (i =65535 ; i >0 ; i--) {
@@ -101,7 +101,7 @@ static int reset_usb_controller(volatile struct usb_ehci *ehci)* The host will set this bit to zero once the * reset process is complete */ -if ((in_be32 (&(ehci->usbcmd)) &EHCI_FSL_USBCMD_RST ) ==0 ) +if ((in_be32 (&(ehci->usbcmd)) &CMD_RESET ) ==0 )return 0 ; }
include/usb/ehci-ci.h +0 -4
@@ -97,10 +97,6 @@#define INTR_DATA_PULSING_EN (0x1<<30)#define INTSTS_MASK (0x00ff0000) -/* USBCMD Bits of interest */ -#define EHCI_FSL_USBCMD_RST (1 << 1) -#define EHCI_FSL_USBCMD_RS (1 << 0) -#define INTERRUPT_ENABLE_BITS_MASK \ (INTR_USB_ID_EN | \ INTR_1MS_TIMER_EN | \
Signature · 1 line
2.5.0
PATCH v4 12/21 ehci-ci.h: drop generic USBCMD fields
Quoted 5 lines · Mateusz Kulikowski
Use definitions from
ehci.hinstead.Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 13/21 ehci: Add support for Qualcomm EHCI
In reply to Mateusz KulikowskiThis driver is able to reconfigure OTG controller into HOST mode. Board can add board-specific initialization as board_prepare_usb(). It requires USB_ULPI_VIEWPORT enabled in board configuration.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use PORT_... macro to write to portsc
- Remove extra whitespace in probe()
- Add acked-by
Changes in v1:
- Reordered header files
- Removed braces around constant
- Added more verbose help to KConfig
- Added ULPI dependency to Kconfig
- Drop register #defines - use ehci-ci.h instead
- Create fixed ulpi viewport for device
- Use setbits/clearbits where possible
- Use wait_for_bit to reset controller
- Add dt binding documents
doc/device-tree-bindings/usb/ehci-msm.txt | 10 ++ drivers/usb/host/Kconfig | 11 ++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-msm.c | 178 ++++++++++++++++++++++++++++++ 4 files changed, 200 insertions(+) create mode 100644 doc/device-tree-bindings/usb/ehci-msm.txt create mode 100644 drivers/usb/host/ehci-msm.c
doc/device-tree-bindings/usb/ehci-msm.txt new file +10 -0
@@ -0,0 +1,10 @@ +Chipidea EHCI controller (part of OTG controller) used on Qualcomm devices. + +Required properties: +- compatible: must be "qcom,ehci-host" +- reg: start address and size of the registers + +ehci at 78d9000 { + compatible = "qcom,ehci-host"; + reg = <0x78d9000 0x400>; +};
drivers/usb/host/Kconfig +11 -0
@@ -74,6 +74,17 @@ config USB_EHCI_MX6 ---help--- Enables support for the on-chip EHCI controller on i.MX6 SoCs. +config USB_EHCI_MSM + bool "Support for Qualcomm on-chip EHCI USB controller" + depends on DM_USB + select USB_ULPI_VIEWPORT + default n + ---help--- + Enables support for the on-chip EHCI controller on Qualcomm + Snapdragon SoCs. + This driver supports combination of Chipidea USB controller + and Synapsys USB PHY in host mode only. + config USB_EHCI_GENERIC bool "Support for generic EHCI USB controller" depends on OF_CONTROL
drivers/usb/host/Makefile +1 -0
@@ -43,6 +43,7 @@ obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o +obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
drivers/usb/host/ehci-msm.c new file +178 -0
178 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 13/21 ehci: Add support for Qualcomm EHCI
Quoted 7 lines · Mateusz Kulikowski
This driver is able to reconfigure OTG controller into HOST mode. Board can add board-specific initialization as
board_prepare_usb(). It requiresUSB_ULPI_VIEWPORTenabled in board configuration.Signed-off-by Mateusz Kulikowski <[email protected]>Acked-by Marek Vasut <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 14/21 drivers: Add SPMI bus uclass
In reply to Mateusz KulikowskiQualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use proper entry order in Kconfig
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Fix header ordering
- Add reviewed-by
Changes in v1:
- Reorder includes
- Add read/write arguments documentation
drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/spmi/Kconfig | 10 ++++++++++ drivers/spmi/Makefile | 7 +++++++ drivers/spmi/spmi-uclass.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/spmi/spmi.h | 47 +++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 116 insertions(+) create mode 100644 drivers/spmi/Kconfig create mode 100644 drivers/spmi/Makefile create mode 100644 drivers/spmi/spmi-uclass.c create mode 100644 include/spmi/spmi.h
drivers/Kconfig +2 -0
@@ -60,6 +60,8 @@ source "drivers/sound/Kconfig" source "drivers/spi/Kconfig" +source "drivers/spmi/Kconfig" + source "drivers/thermal/Kconfig" source "drivers/timer/Kconfig"
drivers/Makefile +1 -0
@@ -54,6 +54,7 @@ obj-y += dfu/ obj-$(CONFIG_X86) += pch/ obj-y += rtc/ obj-y += sound/ +obj-y += spmi/ obj-y += timer/ obj-y += tpm/ obj-y += twserial/
drivers/spmi/Kconfig new file +10 -0
@@ -0,0 +1,10 @@ +menu "SPMI support" + +config SPMI + bool "Enable SPMI bus support" + depends on DM + ---help--- + Select this to enable to support SPMI bus. + SPMI (System Power Management Interface) bus is used + to connect PMIC devices on various SoCs. +endmenu
drivers/spmi/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_SPMI) += spmi-uclass.o
drivers/spmi/spmi-uclass.c new file +48 -0
48 lines not on this page · raw message
include/dm/uclass-id.h +1 -0
@@ -66,6 +66,7 @@ enum uclass_id {UCLASS_RTC ,/* Real time clock device */ UCLASS_SERIAL ,/* Serial UART */ UCLASS_SPI ,/* SPI bus */ +UCLASS_SPMI ,/* System Power Management Interface bus */ UCLASS_SPI_FLASH ,/* SPI flash */ UCLASS_SPI_GENERIC ,/* Generic SPI flash target */ UCLASS_SYSCON, /* System configuration device */
include/spmi/spmi.h new file +47 -0
47 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 14/21 drivers: Add SPMI bus uclass
Quoted 9 lines · Mateusz Kulikowski
Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface.Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 15/21 spmi: Add sandbox test driver
In reply to Mateusz KulikowskiThis patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass.
---
Changes in v4: None
Changes in v3:
- Updated test.dts to include SPMI like sandbox.dts does
Changes in v2:
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Rename r -> regs, p -> priv
- Add reviewed-by
- Update binding doc (drop unused bindig)
Changes in v1: None
arch/sandbox/dts/sandbox.dts | 20 ++++ arch/sandbox/dts/test.dts | 20 ++++ configs/sandbox_defconfig | 4 + doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +++++ drivers/spmi/Kconfig | 8 ++ drivers/spmi/Makefile | 1 + drivers/spmi/spmi-sandbox.c | 157 +++++++++++++++++++++++++ test/dm/Makefile | 1 + test/dm/spmi.c | 115 ++++++++++++++++++ 9 files changed, 357 insertions(+) create mode 100644 doc/device-tree-bindings/spmi/spmi-sandbox.txt create mode 100644 drivers/spmi/spmi-sandbox.c create mode 100644 test/dm/spmi.c
arch/sandbox/dts/sandbox.dts +20 -0
@@ -240,6 +240,26 @@ status = "disabled"; }; + spmi: spmi at 0 { + compatible = "sandbox,spmi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + pm8916 at 0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + spmi_gpios: gpios at c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="spmi"; + }; + }; + }; }; #include "cros-ec-keyboard.dtsi"
arch/sandbox/dts/test.dts +20 -0
@@ -351,6 +351,26 @@ status = "disabled"; }; + spmi: spmi at 0 { + compatible = "sandbox,spmi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + pm8916 at 0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + spmi_gpios: gpios at c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="spmi"; + }; + }; + }; }; #include "sandbox_pmic.dtsi"
configs/sandbox_defconfig +4 -0
@@ -31,6 +31,7 @@ CONFIG_ADC_SANDBOX=y CONFIG_BLK=y CONFIG_CLK=y CONFIG_SANDBOX_GPIO=y +CONFIG_PM8916_GPIO=y CONFIG_SYS_I2C_SANDBOX=y CONFIG_CROS_EC_KEYB=y CONFIG_LED=y
@@ -59,6 +60,9 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_SANDBOX=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_SANDBOX=y +CONFIG_PMIC_PM8916=y +CONFIG_SPMI=y +CONFIG_SPMI_SANDBOX=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_SANDBOX=y CONFIG_RAM=y
doc/device-tree-bindings/spmi/spmi-sandbox.txt new file +31 -0
@@ -0,0 +1,31 @@ +Sandbox SPMI emulated arbiter. + +This is bus driver for Sandbox. It includes part of emulated pm8916 pmic. + +Required properties: +- compatible: "sandbox,spmi" +- #address-cells: 0x1 - childs slave ID address +- #size-cells: 0x1 + +Example: + +spmi: spmi at 0 { + compatible = "sandbox,spmi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + pm8916 at 0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + spmi_gpios: gpios at c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="spmi"; + }; + }; +};
drivers/spmi/Kconfig +8 -0
@@ -7,4 +7,12 @@ config SPMI Select this to enable to support SPMI bus. SPMI (System Power Management Interface) bus is used to connect PMIC devices on various SoCs. + +config SPMI_SANDBOX + boolean "Support for Sandbox SPMI bus" + depends on SPMI + ---help--- + Demo SPMI bus implementation. Emulates part of PM8916 as single + slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3. + endmenu
drivers/spmi/Makefile +1 -0
@@ -5,3 +5,4 @@ # obj-$(CONFIG_SPMI) += spmi-uclass.o +obj-$(CONFIG_SPMI_SANDBOX) += spmi-sandbox.o
drivers/spmi/spmi-sandbox.c new file +157 -0
157 lines not on this page · raw message
test/dm/Makefile +1 -0
@@ -37,4 +37,5 @@ obj-$(CONFIG_DM_REGULATOR) += regulator.o obj-$(CONFIG_TIMER) += timer.o obj-$(CONFIG_DM_VIDEO) += video.o obj-$(CONFIG_ADC) += adc.o +obj-$(CONFIG_SPMI) += spmi.o endif
test/dm/spmi.c new file +115 -0
115 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 15/21 spmi: Add sandbox test driver
Quoted 5 lines · Mateusz Kulikowski
This patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
... but note that the tests fail currently, please fix :)
Signature · 8 lines
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PATCH v4 15/21 spmi: Add sandbox test driver
Quoted 11 lines · Tom Rini
Quoted 5 lines · Mateusz Kulikowski
This patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Applied to u-boot/master, thanks!
... but note that the tests fail currently, please fix :)
Yup, my automated build/test systems all started failing due to this. You can easily reproduce this by running:
./test/py/test.py --bd sandbox --build
Perhaps it's worth disabling these tests until they pass, so that any other new failures that arise are more easily noticed?
Unfortunately, this issue has already been picked up by u-boot-i2c.git/master and u-boot-usb.git/master:-(
PATCH v4 15/21 spmi: Add sandbox test driver
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Hi,
Quoted 6 lines · Stephen Warren
Quoted 5 lines · Tom Rini
Quoted 3 lines · Mateusz Kulikowski
This patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Applied to u-boot/master, thanks!
... but note that the tests fail currently, please fix :)
Yup, my automated build/test systems all started failing due to this. You can easily reproduce this by running:
Working on it.
Weird thing is - it works on sandbox.dtb, and segfaults on test.dtb even if entries are exactly the same :0
Regards,
Mateusz
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PATCH v4 15/21 spmi: Add sandbox test driver
Quoted 15 lines · Mateusz Kulikowski
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256Hi,
Quoted 9 lines · Stephen Warren
Quoted 8 lines · Tom Rini
Quoted 5 lines · Mateusz Kulikowski
This patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
Applied to u-boot/master, thanks!
... but note that the tests fail currently, please fix :)
Yup, my automated build/test systems all started failing due to this. You can easily reproduce this by running:
Working on it.
Weird thing is - it works on sandbox.dtb, and segfaults on test.dtb even if entries are exactly the same :0
I wonder if there's some kind of memory corruption going on; IIRC I checked out the committed version of this patch in u-boot/master's history, and 3 tests failed, but by the time you reach the current u-boot/master, only 2 tests fail, and I don't think there were any more spmi-related commits between the two. That would indicate some kind of outside interference, which would also be consistent with your unusual findings.
PATCH v4 15/21 spmi: Add sandbox test driver
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Hi,
Quoted 1 line · Stephen Warren
On 04/04/2016 10:19 AM, Mateusz Kulikowski wrote:
[...]
Quoted 8 lines
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
... but note that the tests fail currently, please fix :)
Yup, my automated build/test systems all started failing due to this. You can easily reproduce this by running:
Working on it. Weird thing is - it works on sandbox.dtb, and segfaults on test.dtb even if entries are exactly the same :0
Quoted 7 lines
I wonder if there's some kind of memory corruption going on; IIRC I checked out the committed version of this patch in u-boot/master's history, and 3 tests failed, but by the time you reach the current u-boot/master, only 2 tests fail, and I don't think there were any more spmi-related commits between the two. That would indicate some kind of outside interference, which would also be consistent with your unusual findings.
Yeah.. we all love off-by-one don't we? ;)
Patch already posted - please check it if you want to.
Regards,
Mateusz
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PATCH v4 15/21 spmi: Add sandbox test driver
In reply to Stephen WarrenQuoted 16 lines · Stephen Warren
Quoted 11 lines · Tom Rini
Quoted 5 lines · Mateusz Kulikowski
This patch adds emulated spmi bus controller with part of pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Applied to u-boot/master, thanks!
... but note that the tests fail currently, please fix :)
Yup, my automated build/test systems all started failing due to this. You can easily reproduce this by running:
Quoted 7 lines
./test/py/test.py--bd sandbox --buildPerhaps it's worth disabling these tests until they pass, so that any other new failures that arise are more easily noticed?
Unfortunately, this issue has already been picked up by u-boot-i2c.git/master and u-boot-usb.git/master:-(
So yes. I'm not quite yet comfortable making test.py failures a hard failure (I only noticed since I was re-checking the CMDLINE stuff). I'm open to changing this stance in the future as I really ought to try and plug my local workflow into some CI too along with my more manual setups.
Signature · 8 lines
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PATCH v4 16/21 drivers: spmi: Add support for Qualcomm SPMI bus driver
In reply to Mateusz KulikowskiSupport SPMI arbiter on Qualcomm Snapdragon devices.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Rename DM_SPMI -> SPMI
- Rename p -> priv (in write/read)
- Fix header ordering (again)
- Add reviewed-by
Changes in v1:
- add binding documentation and better Kconfig help
- Changed a bit mapping
- Change include order
- Use clrsetbits* where possible
- Add one more supported dts id
- Handle missing fields in dt properly
doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ++++ drivers/spmi/Kconfig | 7 +- drivers/spmi/Makefile | 1 + drivers/spmi/spmi-msm.c | 189 +++++++++++++++++++++++++++++ 4 files changed, 222 insertions(+), 1 deletion(-) create mode 100644 doc/device-tree-bindings/spmi/spmi-msm.txt create mode 100644 drivers/spmi/spmi-msm.c
doc/device-tree-bindings/spmi/spmi-msm.txt new file +26 -0
@@ -0,0 +1,26 @@ +Qualcomm SPMI arbiter/bus driver + +This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs. + +Required properties: +- compatible: "qcom,spmi-pmic-arb" +- reg: Register block adresses and sizes for various parts of device: + 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn) + 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS) + 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS) + +Optional properties (if not set by parent): +- #address-cells: 0x1 - childs slave ID address +- #size-cells: 0x1 + +All PMICs should be placed as a child nodes of bus arbiter. +Automatic detection of childs is currently not supported. + +Example: + +spmi at 200f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; + #address-cells = <0x1>; + #size-cells = <0x1>; +};
drivers/spmi/Kconfig +6 -1
@@ -8,11 +8,16 @@ config SPMI SPMI (System Power Management Interface) bus is used to connect PMIC devices on various SoCs. +config SPMI_MSM + boolean "Support Qualcomm SPMI bus" + depends on SPMI + ---help--- + Support SPMI bus implementation found on Qualcomm Snapdragon SoCs. + config SPMI_SANDBOX boolean "Support for Sandbox SPMI bus" depends on SPMI ---help--- Demo SPMI bus implementation. Emulates part of PM8916 as single slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3. - endmenu
drivers/spmi/Makefile +1 -0
@@ -5,4 +5,5 @@ # obj-$(CONFIG_SPMI) += spmi-uclass.o +obj-$(CONFIG_SPMI_MSM) += spmi-msm.o obj-$(CONFIG_SPMI_SANDBOX) += spmi-sandbox.o
drivers/spmi/spmi-msm.c new file +189 -0
189 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 16/21 drivers: spmi: Add support for Qualcomm SPMI bus driver
Quoted 5 lines · Mateusz Kulikowski
Support SPMI arbiter on Qualcomm Snapdragon devices.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 17/21 pmic: Add support for Qualcomm PM8916 PMIC
In reply to Mateusz KulikowskiThis PMIC is connected on SPMI bus so needs SPMI support enabled.
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add reviewed-by
- Reordered Kconfig & Makefile (to keep alphabetical ordering)
- Added link to dt binding @ help
Changes in v1:
- Added dt bindings
- Reoder includes
- Replaced extract_* macros with ordinary shift/mask
- Added error checking and whitespaces in probe
doc/device-tree-bindings/pmic/pm8916.txt | 18 ++++++ drivers/power/pmic/Kconfig | 16 ++++++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pm8916.c | 96 ++++++++++++++++++++++++++++++++ 4 files changed, 131 insertions(+) create mode 100644 doc/device-tree-bindings/pmic/pm8916.txt create mode 100644 drivers/power/pmic/pm8916.c
doc/device-tree-bindings/pmic/pm8916.txt new file +18 -0
@@ -0,0 +1,18 @@ +Qualcomm pm8916 PMIC + +This PMIC is connected using SPMI bus so should be child of SPMI bus controller. + +Required properties: +- compatible: "qcom,spmi-pmic"; +- reg: SPMI Slave ID, size (ignored) +- #address-cells: 0x1 (peripheral ID) +- #size-cells: 0x1 (size of peripheral register space) + +Example: + +pm8916 at 0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; +};
drivers/power/pmic/Kconfig +16 -0
@@ -54,6 +54,22 @@ config DM_PMIC_MAX77686 This config enables implementation of driver-model pmic uclass features for PMIC MAX77686. The driver implements read/write operations. +config PMIC_PM8916 + bool "Enable Driver Model for Qualcomm PM8916 PMIC" + depends on DM_PMIC + ---help--- + The PM8916 is a PMIC connected to one (or several) processors + with SPMI bus. It has 2 slaves with several peripherals: + - 18x LDO + - 4x GPIO + - Power and Reset buttons + - Watchdog + - RTC + - Vibrator drivers + - Others + + Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt + config PMIC_RK808 bool "Enable support for Rockchip PMIC RK808" depends on DM_PMIC
drivers/power/pmic/Makefile +1 -0
@@ -11,6 +11,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o obj-$(CONFIG_PMIC_ACT8846) += act8846.o +obj-$(CONFIG_PMIC_PM8916) += pm8916.o obj-$(CONFIG_PMIC_RK808) += rk808.o obj-$(CONFIG_PMIC_TPS65090) += tps65090.o obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
drivers/power/pmic/pm8916.c new file +96 -0
96 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 17/21 pmic: Add support for Qualcomm PM8916 PMIC
Quoted 5 lines · Mateusz Kulikowski
This PMIC is connected on SPMI bus so needs SPMI support enabled.
Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 18/21 gpio: Add support for Qualcomm PM8916 gpios
In reply to Mateusz KulikowskiThis driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Reviewed-by
Changes in v1:
- Add binding doc
- Fixed inlcude ordering
- Merged direction_input and direction_output functions
- gpio_get: use switch instead of stacked if
- use pmic_clrsetbits
- add possibility to change prwkey bank name
- Handle invalid bindings
- Sanity HW check (i.e. check type/subtype registers)
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 ++++ drivers/gpio/Kconfig | 10 + drivers/gpio/Makefile | 1 + drivers/gpio/pm8916_gpio.c | 302 ++++++++++++++++++++++++++ 4 files changed, 361 insertions(+) create mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt create mode 100644 drivers/gpio/pm8916_gpio.c
doc/device-tree-bindings/gpio/pm8916_gpio.txt new file +48 -0
@@ -0,0 +1,48 @@ +Driver for part of pm8916 PMIC - gpio and power/reset keys + +This device should be child of SPMI pmic. + +1) GPIO driver + +Required properties: +- compatible: "qcom,pm8916-gpio" +- reg: peripheral ID, size of register block +- gpio-controller +- gpio-count: number of GPIOs +- #gpio-cells: 2 + +Optional properties: +- gpio-bank-name: name of bank (as default "pm8916" is used) + +Example: + +pmic_gpios: gpios at c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="pmic"; +}; + + +2) Power/Reset key driver + +Required properties: +- compatible: "qcom,pm8916-pwrkey" +- reg: peripheral ID, size of register block +- gpio-controller +- #gpio-cells: 2 + +Optional properties: +- gpio-bank-name: name of bank (as default "pm8916_key" is used) + + +Example: + +pmic_pon: pon at 800 { + compatible = "qcom,pm8916-pwrkey"; + reg = <0x800 0x96>; + #gpio-cells = <2>; + gpio-controller; +};
drivers/gpio/Kconfig +10 -0
@@ -69,6 +69,16 @@ config MSM_GPIO - APQ8016 - MSM8916 +config PM8916_GPIO + bool "Qualcomm PM8916 PMIC GPIO/keypad driver" + depends on DM_GPIO && PMIC_PM8916 + help + Support for GPIO pins and power/reset buttons found on + Qualcomm PM8916 PMIC. + Default name for GPIO bank is "pm8916". + Power and reset buttons are placed in "pm8916_key" bank and + have gpio numbers 0 and 1 respectively. + config ROCKCHIP_GPIO bool "Rockchip GPIO driver" depends on DM_GPIO
drivers/gpio/Makefile +1 -0
@@ -51,3 +51,4 @@ obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o obj-$(CONFIG_MSM_GPIO) += msm_gpio.o +obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
drivers/gpio/pm8916_gpio.c new file +302 -0
302 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 18/21 gpio: Add support for Qualcomm PM8916 gpios
Quoted 8 lines · Mateusz Kulikowski
This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 19/21 arm: Add support for Qualcomm Snapdragon family
In reply to Mateusz KulikowskiFirst supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code:
- Reset controller (PSHOLD)
- Clock controller (very simple clock configuration for MMC and UART)
---
Changes in v4:
- Add sysmap for apq8016 (required to enable MMU)
Changes in v3: None
Changes in v2:
- Rename DM_SPMI -> SPMI
- Make MND divider comments more compact :)
- p -> priv
- Add reviewed-by
- Reordered Kconfig to keep alphabetical order
- Renamed reset_sandbox -> msm_reset (typo in reset.c)
Changes in v1:
- Fix include order
- Cleanup defines (added spaces for readibility)
- Base address is integer to avoid casting
- Use setbits_* family where possible
- Drop unneded comments, added newlines where needed
- Check return value of dev_get_addr
- Add binding for apq8016
- Cleaned up divider calculation
- Drop most of gpio.h (only empty file is needed)
arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/mach-snapdragon/Kconfig | 6 + arch/arm/mach-snapdragon/Makefile | 9 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 +++++++++++++++++++++ arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 ++ arch/arm/mach-snapdragon/reset.c | 40 ++++ arch/arm/mach-snapdragon/sysmap-apq8016.c | 30 +++ 9 files changed, 383 insertions(+) create mode 100644 arch/arm/mach-snapdragon/Kconfig create mode 100644 arch/arm/mach-snapdragon/Makefile create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h create mode 100644 arch/arm/mach-snapdragon/reset.c create mode 100644 arch/arm/mach-snapdragon/sysmap-apq8016.c
arch/arm/Kconfig +12 -0
@@ -511,6 +511,16 @@ config RMOBILE bool "Renesas ARM SoCs" select CPU_V7 +config ARCH_SNAPDRAGON + bool "Qualcomm Snapdragon SoCs" + select ARM64 + select DM + select DM_GPIO + select DM_SERIAL + select SPMI + select OF_CONTROL + select OF_SEPARATE + config ARCH_SOCFPGA bool "Altera SOCFPGA family" select CPU_V7
@@ -774,6 +784,8 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" +source "arch/arm/mach-snapdragon/Kconfig" + source "arch/arm/mach-socfpga/Kconfig" source "arch/arm/mach-stm32/Kconfig"
arch/arm/Makefile +1 -0
@@ -54,6 +54,7 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx +machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_STM32) += stm32
arch/arm/mach-snapdragon/Kconfig new file +6 -0
@@ -0,0 +1,6 @@ +if ARCH_SNAPDRAGON + +config SYS_SOC + default "snapdragon" + +endif
arch/arm/mach-snapdragon/Makefile new file +9 -0
@@ -0,0 +1,9 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += clock-apq8016.o +obj-y += sysmap-apq8016.o +obj-y += reset.o
arch/arm/mach-snapdragon/clock-apq8016.c new file +262 -0
262 lines not on this page · raw message
arch/arm/mach-snapdragon/include/mach/gpio.h new file +9 -0
@@ -0,0 +1,9 @@ +/* +* Empty gpio.h +* +* This file must stay as arch/arm/include/asm/gpio.h requires it. +* +* (C) Copyright 2015 Mateusz Kulikowski <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/
arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h new file +14 -0
@@ -0,0 +1,14 @@ +/* +* Qualcomm APQ8916 sysmap +* +* (C) Copyright 2015 Mateusz Kulikowski <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ +#ifndef _MACH_SYSMAP_APQ8016_H +#define _MACH_SYSMAP_APQ8016_H + +#define GICD_BASE 0x0b000000 +#define GICC_BASE 0x0a20c000 + +#endif
arch/arm/mach-snapdragon/reset.c new file +40 -0
@@ -0,0 +1,40 @@ +/* +* Qualcomm APQ8016 reset controller driver +* +* (C) Copyright 2015 Mateusz Kulikowski <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <reset.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR ; + +static int msm_reset_request (struct udevice *dev,enum reset_t type) +{ +phys_addr_t addr =dev_get_addr (dev); +if (!addr) +return -EINVAL ; +writel (0 , addr); +return -EINPROGRESS ; +} + +static struct reset_ops msm_reset_ops = { + .request = msm_reset_request, +}; + +static const struct udevice_id msm_reset_ids[] = { + { .compatible ="qcom,pshold" }, + { } +}; + +U_BOOT_DRIVER (msm_reset) = { + .name ="msm_reset" , + .id =UCLASS_RESET , + .of_match = msm_reset_ids, + .ops = &msm_reset_ops, +};
arch/arm/mach-snapdragon/sysmap-apq8016.c new file +30 -0
@@ -0,0 +1,30 @@ +/* +* Qualcomm APQ8016 memory map +* +* (C) Copyright 2016 Mateusz Kulikowski <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <asm/armv8/mmu.h> + +static struct mm_region apq8016_mem_map[] = { + { + .base =0x0UL ,/* Peripheral block */ + .size =0x8000000UL , + .attrs =PTE_BLOCK_MEMTYPE (MT_DEVICE_NGNRNE ) | +PTE_BLOCK_NON_SHARE | +PTE_BLOCK_PXN |PTE_BLOCK_UXN + }, { + .base =0x80000000UL ,/* DDR */ + .size =0x80000000UL , + .attrs =PTE_BLOCK_MEMTYPE (MT_NORMAL ) | +PTE_BLOCK_INNER_SHARE + }, { +/* List terminator */ +0 , + } +}; + +struct mm_region *mem_map = apq8016_mem_map;
Signature · 1 line
2.5.0
PATCH v4 19/21 arm: Add support for Qualcomm Snapdragon family
Quoted 8 lines · Mateusz Kulikowski
First supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code:
- Reset controller (PSHOLD)
- Clock controller (very simple clock configuration for MMC and UART)Signed-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 20/21 board: Add Qualcomm Dragonboard 410C support
In reply to Mateusz KulikowskiThis commit add support for 96Boards Dragonboard410C. It is board based on APQ8016 Qualcomm SoC, complying with 96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.
---
Changes in v4:
- Move CONFIG_OF_LIBFDT to defconfig and cleaned it up with savedefconfig
Changes in v3:
- readme: Added info on how to enter fastboot mode and that dtbTool is also part of skales. Added more explanation on image generation.
- head: Add comment why it's needed, drop MZ EFI signature that makes no sense on this particular SoC, fix confusing entry point name (+update .lds file)
Changes in v2:
- Renamed CONFIG_DM_SPMI -> CONFIG_SPMI
- Removed extra enter in dragonboard file
- Added ULPI* to defconfig
- Added MAINTAINERS to board
- Cleaned up config file - use distro defaults/environment:
- Dropped multiple CONFIG_CMD* and other CONFIG_*
- Added distro env/config
- Dropped old boot commands
- Split dts - pm8916_gpio entries are taken directly from Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi; They will be removed once gpio drivers are converted to pinctrl.
- Renamed some pmic nodes, fixed dragonboard.c to find them properly.
- Added header and converted comments to c98-style in head.S
- Print error if pmic gpio node is not found.
Changes in v1:
- Add better help for dragonboard
- Move static structures to board_prepare_usb
- Add DM_SPMI to defconfig
arch/arm/dts/Makefile | 2 + arch/arm/dts/dragonboard410c-uboot.dtsi | 28 +++++ arch/arm/dts/dragonboard410c.dts | 148 ++++++++++++++++++++++ arch/arm/mach-snapdragon/Kconfig | 20 +++ board/qualcomm/dragonboard410c/Kconfig | 15 +++ board/qualcomm/dragonboard410c/MAINTAINERS | 6 + board/qualcomm/dragonboard410c/Makefile | 8 ++ board/qualcomm/dragonboard410c/dragonboard410c.c | 131 ++++++++++++++++++++ board/qualcomm/dragonboard410c/head.S | 34 +++++ board/qualcomm/dragonboard410c/readme.txt | 71 +++++++++++ board/qualcomm/dragonboard410c/u-boot.lds | 90 ++++++++++++++ configs/dragonboard410c_defconfig | 26 ++++ include/configs/dragonboard410c.h | 150 +++++++++++++++++++++++ 13 files changed, 729 insertions(+) create mode 100644 arch/arm/dts/dragonboard410c-uboot.dtsi create mode 100644 arch/arm/dts/dragonboard410c.dts create mode 100644 board/qualcomm/dragonboard410c/Kconfig create mode 100644 board/qualcomm/dragonboard410c/MAINTAINERS create mode 100644 board/qualcomm/dragonboard410c/Makefile create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.c create mode 100644 board/qualcomm/dragonboard410c/head.S create mode 100644 board/qualcomm/dragonboard410c/readme.txt create mode 100644 board/qualcomm/dragonboard410c/u-boot.lds create mode 100644 configs/dragonboard410c_defconfig create mode 100644 include/configs/dragonboard410c.h
arch/arm/dts/Makefile +2 -0
@@ -107,6 +107,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtb +dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb + dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-a1000.dtb \ sun4i-a10-ba10-tvbox.dtb \
arch/arm/dts/dragonboard410c-uboot.dtsi new file +28 -0
@@ -0,0 +1,28 @@ +/* + * U-Boot addition to handle Dragonboard 410c pins + * + * (C) Copyright 2015 Mateusz Kulikowski <[email protected]> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&pm8916_gpios { + usb_hub_reset_pm { + gpios = <&pm8916_gpios 2 0>; + }; + + usb_sw_sel_pm { + gpios = <&pm8916_gpios 3 0>; + }; +}; + + +&pm8916_pon { + key_vol_down { + gpios = <&pm8916_pon 1 0>; + }; + + key_power { + gpios = <&pm8916_pon 0 0>; + }; +};
arch/arm/dts/dragonboard410c.dts new file +148 -0
148 lines not on this page · raw message
arch/arm/mach-snapdragon/Kconfig +20 -0
@@ -3,4 +3,24 @@ if ARCH_SNAPDRAGON config SYS_SOC default "snapdragon" +choice + prompt "Snapdragon board select" + +config TARGET_DRAGONBOARD410C + bool "96Boards Dragonboard 410C" + help + Support for 96Boards Dragonboard 410C. This board complies with + 96Board Open Platform Specifications. Features: + - Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306) + - 1GiB RAM + - 8GiB eMMC, uSD slot + - WiFi, Bluetooth and GPS module + - 2x Host, 1x Device USB port + - HDMI + - 20-pin low speed and 40-pin high speed expanders, 4 LED, 3 buttons + +endchoice + +source "board/qualcomm/dragonboard410c/Kconfig" + endif
board/qualcomm/dragonboard410c/Kconfig new file +15 -0
@@ -0,0 +1,15 @@ +if TARGET_DRAGONBOARD410C + +config SYS_BOARD + default "dragonboard410c" + +config SYS_VENDOR + default "qualcomm" + +config SYS_SOC + default "apq8016" + +config SYS_CONFIG_NAME + default "dragonboard410c" + +endif
board/qualcomm/dragonboard410c/MAINTAINERS new file +6 -0
@@ -0,0 +1,6 @@ +DRAGONBOARD410C BOARD +M: Mateusz Kulikowski <[email protected]> +S: Maintained +F: board/qualcomm/dragonboard410c/ +F: include/configs/dragonboard410c.h +F: configs/dragonboard410c_defconfig
board/qualcomm/dragonboard410c/Makefile new file +8 -0
@@ -0,0 +1,8 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := dragonboard410c.o +extra-y += head.o
board/qualcomm/dragonboard410c/dragonboard410c.c new file +131 -0
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board/qualcomm/dragonboard410c/head.S new file +34 -0
@@ -0,0 +1,34 @@ +/* + * ARM64 header for proper chain-loading with Little Kernel. + * + * Little Kernel shipped with Dragonboard410C boots standard Linux images for + * ARM64. This file adds header that is required to boot U-Boot properly. + * + * For details see: + * https://www.kernel.org/doc/Documentation/arm64/booting.txt + * + * (C) Copyright 2015 Mateusz Kulikowski <[email protected]> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> + +.global _arm64_header +_arm64_header: + b _start + .word 0 + /* Image load offset from start of RAM, little-endian */ + .quad CONFIG_SYS_TEXT_BASE-PHYS_SDRAM_1 + /* Effective size of kernel image, little-endian */ + .quad 0 /* 0x60000 - ignored */ + /* Informative flags, little-endian */ + .quad 0 + .quad 0 /* reserved */ + .quad 0 /* reserved */ + .quad 0 /* reserved */ + .byte 0x41 /* Magic number, "ARM\x64" */ + .byte 0x52 + .byte 0x4d + .byte 0x64 + .word 0 /* reserved */
board/qualcomm/dragonboard410c/readme.txt new file +71 -0
71 lines not on this page · raw message
board/qualcomm/dragonboard410c/u-boot.lds new file +90 -0
90 lines not on this page · raw message
configs/dragonboard410c_defconfig new file +26 -0
@@ -0,0 +1,26 @@ +CONFIG_ARM=y +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" +CONFIG_SYS_PROMPT="dragonboard410c => " +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_USB=y +CONFIG_CLK=y +CONFIG_MSM_GPIO=y +CONFIG_PM8916_GPIO=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_RESET=y +CONFIG_DM_MMC=y +CONFIG_MSM_SDHCI=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_PM8916=y +CONFIG_MSM_SERIAL=y +CONFIG_SPMI_MSM=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y
include/configs/dragonboard410c.h new file +150 -0
150 lines not on this page · raw message
Signature · 1 line
2.5.0
PATCH v4 20/21 board: Add Qualcomm Dragonboard 410C support
Quoted 14 lines · Mateusz Kulikowski
This commit add support for 96Boards Dragonboard410C. It is board based on APQ8016 Qualcomm SoC, complying with 96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
Quoted 5 lines
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.Signed-off-by Mateusz Kulikowski <[email protected]>Tested-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v4 20/21 board: Add Qualcomm Dragonboard 410C support
In reply to Mateusz KulikowskiAm 31.03.2016 um 23:12 schrieb Mateusz Kulikowski:
Quoted 5 lines
include/configs/dragonboard410c.h new file +0
-0
[...]
Quoted 40 lines
include/configs/dragonboard410c.h new file +40
-0+#include <config_distro_defaults.h> + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE + +/* Environment - Boot*/ +#define CONFIG_BOOTARGS "console=ttyMSM0,115200n8" + +#define BOOT_TARGET_DEVICES (func) \ + func(USB, usb, 0) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +/* Does what recovery does */ +#define REFLASH (file, part) \ +"part start mmc 0 "#part" start && "\ +"part size mmc 0 "#part" size && "\ +"tftp $loadaddr "#file" && " \ +"mmc write $loadaddr $start $size && " + + +#define CONFIG_ENV_REFLASH \ +"mmc dev 0 && "\ +"usb start && "\ +"dhcp && "\ +"tftp $loadaddr dragonboard/rescue/gpt_both0.bin && "\ +"mmc write $loadaddr 0 43 && " \ +"mmc rescan && "\ +REFLASH(dragonboard/rescue/NON-HLOS.bin, 1)\ +REFLASH(dragonboard/rescue/sbl1.mbn, 2)\ +REFLASH(dragonboard/rescue/rpm.mbn, 3)\ +REFLASH(dragonboard/rescue/tz.mbn, 4)\ +REFLASH(dragonboard/rescue/hyp.mbn, 5)\ +REFLASH(dragonboard/rescue/sec.dat, 6)\ +REFLASH(dragonboard/rescue/emmc_appsboot.mbn, 7)\ +REFLASH(dragonboard/u-boot.img, 8)\ +"usb stop &&"\
include/configs/dragonboard410c.h line 129
Quoted 10 lines
include/configs/dragonboard410c.h new file +10
-0+"echo Reflash completed" + +/* Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ +"reflash=" CONFIG_ENV_REFLASH "\0" \ +"loadaddr=0x81000000\0" \ +"fdt_high=0xffffffffffffffff\0" \ +"initrd_high=0xffffffffffffffff\0" \ +"linux_image=Image\0" \ +"linux_addr=0x81000000\0" \
kernel_addr_r
include/configs/dragonboard410c.h line 131
Quoted 2 lines
include/configs/dragonboard410c.h new file +2
-0+"fdt_image=apq8016-sbc.dtb\0" \ +"fdt_addr=0x83000000\0" \
fdt_addr_r
include/configs/dragonboard410c.h line 132
Quoted 1 line
include/configs/dragonboard410c.h new file +1
-0+"ramdisk_addr=0x84000000\0" \
ramdisk_addr_r
These variables that the distro boot depends upon are missing/misnamed.
Regards,
Andreas
Quoted 18 lines
include/configs/dragonboard410c.h new file +18
-0+ BOOTENV + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_SYS_NO_FLASH + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M) + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512/* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_MAXARGS 64/* max command args */ + +#endif
Signature · 3 lines
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Graham Norton HRB 21284 (AG N?rnberg)
PATCH v4 20/21 board: Add Qualcomm Dragonboard 410C support
Quoted 17 lines · Andreas F?rber
Am 31.03.2016 um 23:12 schrieb Mateusz Kulikowski:
include/configs/dragonboard410c.h line 129
Quoted 8 lines
include/configs/dragonboard410c.h new file +8
-0+/* Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "reflash="CONFIG_ENV_REFLASH"\0"\ + "loadaddr=0x81000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "linux_image=Image\0" \ + "linux_addr=0x81000000\0"\
kernel_addr_rinclude/configs/dragonboard410c.h line 131
Quoted 2 lines
include/configs/dragonboard410c.h new file +2
-0+"fdt_image=apq8016-sbc.dtb\0" \ +"fdt_addr=0x83000000\0" \
fdt_addr_r
Quoted 5 lines
include/configs/dragonboard410c.h line 132
Quoted 1 line
include/configs/dragonboard410c.h new file +1
-0+"ramdisk_addr=0x84000000\0" \
ramdisk_addr_rThese variables that the distro boot depends upon are missing/misnamed.
This reminds me that I had to add scriptaddr to make it run my boot.scr.
Best regards,
Daniel
Signature · 8 lines
Dipl.-Math. Daniel Gl?ckner, emlix GmbH, http://www.emlix.com Fon +49 551 30664-0, Fax +49 551 30664-11, Bertha-von-Suttner-Stra?e 9, 37085 G?ttingen, Germany Sitz der Gesellschaft: G?ttingen, Amtsgericht G?ttingen HR B 3160 Gesch?ftsf?hrung: Heike Jordan, Dr. Uwe Kracke Ust-IdNr.: DE 205 198 055 emlix - your embedded linux partner
PATCH v4 20/21 board: Add Qualcomm Dragonboard 410C support
Am 05.04.2016 um 01:54 schrieb Daniel Gl?ckner:
Quoted 9 lines · Andreas F?rber
Quoted 8 lines
Am 31.03.2016 um 23:12 schrieb Mateusz Kulikowski:
include/configs/dragonboard410c.h line 128
Quoted 7 lines
include/configs/dragonboard410c.h new file +7
-0+/* Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "reflash="CONFIG_ENV_REFLASH"\0"\ + "loadaddr=0x81000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "linux_image=Image\0" \
Is linux_image used anywhere? dhcp uses boot_script_dhcp.
Quoted 5 lines
Quoted 5 lines
include/configs/dragonboard410c.h line 129
Quoted 1 line
include/configs/dragonboard410c.h new file +1
-0+"linux_addr=0x81000000\0" \
kernel_addr_rinclude/configs/dragonboard410c.h line 130
Quoted 1 line
include/configs/dragonboard410c.h new file +1
-0+"fdt_image=apq8016-sbc.dtb\0" \
fdtfile
Quoted 11 lines
Quoted 9 lines
include/configs/dragonboard410c.h line 131
Quoted 1 line
include/configs/dragonboard410c.h new file +1
-0+"fdt_addr=0x83000000\0" \
fdt_addr_rinclude/configs/dragonboard410c.h line 132
Quoted 1 line
include/configs/dragonboard410c.h new file +1
-0+"ramdisk_addr=0x84000000\0" \
ramdisk_addr_rThese variables that the distro boot depends upon are missing/misnamed.
This reminds me that I had to add scriptaddr to make it run my boot.scr.
I'm testing a local patch but am on travel this week, so maybe Mateusz or someone else is quicker.
Regards,
Andreas
Signature · 3 lines
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Graham Norton HRB 21284 (AG N?rnberg)
PATCH v4 21/21 Add myself as Snapdragon and SPMI maintainer
In reply to Mateusz Kulikowski- Update MAINTAINERS
- Update git-mailrc
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch
Changes in v1: None
MAINTAINERS | 11 +++++++++++ doc/git-mailrc | 3 +++ 2 files changed, 14 insertions(+)
MAINTAINERS +11 -0
@@ -125,6 +125,11 @@ F: arch/arm/mach-s5pc1xx/ F: arch/arm/cpu/armv7/s5p-common/ F: arch/arm/include/asm/arch-s3c24x0/ +ARM SNAPDRAGON +M: Mateusz Kulikowski <[email protected]> +S: Maintained +F: arch/arm/mach-snapdragon/ + ARM STM SPEAR #M: Vipin Kumar <[email protected]> S: Orphaned (Since 2016-02)
@@ -396,6 +401,12 @@ F: drivers/mtd/spi/ F: drivers/spi/ F: include/spi* +SPMI +M: Mateusz Kulikowski <[email protected]> +S: Maintained +F: drivers/spmi/ +F: include/spmi/ + TQ GROUP #M: Martin Krause <[email protected]> S: Orphaned (Since 2016-02)
doc/git-mailrc +3 -0
@@ -33,6 +33,7 @@ alias lukma Lukasz Majewski <[email protected]> alias macpaul Macpaul Lin <[email protected]> alias marex Marek Vasut <[email protected]> alias masahiro Masahiro Yamada <[email protected]> +alias mateusz Mateusz Kulikowski <[email protected]> alias monstr Michal Simek <[email protected]> alias panto Pantelis Antoniou <[email protected]> alias prafulla Prafulla Wadaskar <[email protected]>
@@ -67,6 +68,7 @@ alias rmobile uboot, iwamatsu alias s3c samsung alias s5pc samsung alias samsung uboot, prom +alias snapdragon uboot, mateusz alias socfpga uboot, marex, Dinh Nguyen <[email protected]> alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren <[email protected]>, Stephen Warren <[email protected]>
@@ -127,6 +129,7 @@ alias nand uboot, scottwood alias net uboot, jhersh alias phy uboot, jhersh alias spi uboot, jagan +alias spmi uboot, mateusz alias ubi uboot, hs alias usb uboot, marex alias video uboot, ag
Signature · 1 line
2.5.0
PATCH v4 21/21 Add myself as Snapdragon and SPMI maintainer
Quoted 5 lines · Mateusz Kulikowski
- Update
MAINTAINERS
- Update git-mailrcSigned-off-by Mateusz Kulikowski <[email protected]>Reviewed-by Simon Glass <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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