net: phy: dp83867: Add device tree bindings and documentation

PATCH Superseded Dan Murphy 4 participants 9 messages Apr 5, 2016

Subsystems (3)

Network drivers Device tree bindings Ethernet PHY

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lore

Dan Murphy

author

2016-04-05 15:05 UTC #0 lore raw

PATCH 1/2 net: phy: dp83867: Add device tree bindings and documentation

Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver.

The original document was from:

    [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Separated out bindings to a different patch and added the bindings documentation - https://patchwork.ozlabs.org/patch/604113/

 doc/device-tree-bindings/net/ti,dp83867.txt | 28 +++++++++++++++++++++++
 include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
 2 files changed, 63 insertions(+)
 create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
 create mode 100644 include/dt-bindings/net/ti-dp83867.h

doc/device-tree-bindings/net/ti,dp83867.txt new file +28 -0

new file mode 100644
index 0000000..2516b45
@@ -0,0 +1,28 @@
+* Texas Instruments - dp83867 Giga bit ethernet phy
+
+Required properties:
+	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
+		for applicable values
+	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
+		for applicable values
+	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
+		for applicable values
+
+Default child nodes are standard Ethernet PHY device
+nodes as described in doc/devicetree/bindings/net/ethernet.txt
+
+Example:
+
+&mac {
+	pinctrl-0 = <&davinci_mdio_default>;
+	pinctrl-1 = <&davinci_mdio_sleep>;
+	status = "okay";
+
+	ti,rx_int_delay = <DP83867_RGMIIDCTL_1_50_NS>;
+	ti,tx_int_delay = <DP83867_RGMIIDCTL_2_50_NS>;
+	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+
+};
+
+Datasheet can be found:
+http://www.ti.com/product/DP83867IR/datasheet

include/dt-bindings/net/ti-dp83867.h new file +35 -0

new file mode 100644
index 0000000..5c592fb
@@ -0,0 +1,35 @@
+/*
+ * TI DP83867 PHY drivers
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ *
+ */
+
+#ifndef _DT_BINDINGS_TI_DP83867_H
+#define _DT_BINDINGS_TI_DP83867_H
+
+/* PHY CTRL bits */
+#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
+#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
+#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
+#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
+
+/* RGMIIDCTL internal delay for rx and tx */
+#define	DP83867_RGMIIDCTL_250_PS	0x0
+#define	DP83867_RGMIIDCTL_500_PS	0x1
+#define	DP83867_RGMIIDCTL_750_PS	0x2
+#define	DP83867_RGMIIDCTL_1_NS		0x3
+#define	DP83867_RGMIIDCTL_1_25_NS	0x4
+#define	DP83867_RGMIIDCTL_1_50_NS	0x5
+#define	DP83867_RGMIIDCTL_1_75_NS	0x6
+#define	DP83867_RGMIIDCTL_2_00_NS	0x7
+#define	DP83867_RGMIIDCTL_2_25_NS	0x8
+#define	DP83867_RGMIIDCTL_2_50_NS	0x9
+#define	DP83867_RGMIIDCTL_2_75_NS	0xa
+#define	DP83867_RGMIIDCTL_3_00_NS	0xb
+#define	DP83867_RGMIIDCTL_3_25_NS	0xc
+#define	DP83867_RGMIIDCTL_3_50_NS	0xd
+#define	DP83867_RGMIIDCTL_3_75_NS	0xe
+#define	DP83867_RGMIIDCTL_4_00_NS	0xf
+
+#endif

Signature · 1 line

2.8.0.rc3

Dan Murphy

author

2016-04-05 15:05 UTC #1 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

Not all devices use the same internal delay or fifo depth. Add the ability to set the internal delay for rx or tx and the fifo depth via the devicetree. If the value is not set in the devicetree then set the delay to the default.

If devicetree is not used then use the default defines within the driver.

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

drivers/net/phy/ti.c +73 -8

index c3912d5..e91a6ed 100644
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f

@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus

@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)
+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+
+	dp83867->fifo_depth = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,fifo_depth", DEFAULT_FIFO_DEPTH);
+
+	return 0;
+}
+#else
+static int dp83867_of_init(struct phy_device *phydev)
+{
+	dp83867->rx_id_delay = DEFAULT_RX_ID_DELAY;
+	dp83867->tx_id_delay = DEFAULT_TX_ID_DELAY;
+	dp83867->fifo_depth = DEFAULT_FIFO_DEPTH;
+
+	return 0;
+}
+#endif
 
 static int dp83867_config(struct phy_device *phydev)
 {
+	struct dp83867_private *dp83867;
 	unsigned int val, delay;
 	int ret;
 
+	if (!phydev->priv) {
+		dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL);
+		if (!dp83867)
+			return -ENOMEM;
+
+		phydev->priv = dp83867;
+		ret = dp83867_of_init(phydev);
+		if (ret)
+			goto err_out;
+	} else {
+		dp83867 = (struct dp83867_private *)phydev->priv;
+	}
+
 	/* Restart the PHY.  */
 	val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL);
 	phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL,

@@ -152,9 +213,9 @@ static int dp83867_config(struct phy_device *phydev)
 	if (phy_interface_is_rgmii(phydev)) {
 		ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,
 			(DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) |
-			(FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
+			(dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
 		if (ret)
-			return ret;
+			goto err_out;
 	}
 
 	if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) &&

@@ -175,8 +236,8 @@ static int dp83867_config(struct phy_device *phydev)
 		phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,
 				       DP83867_DEVADDR, phydev->addr, val);
 
-		delay = (RX_ID_DELAY |
-			 (TX_ID_DELAY << DP83867_RGMII_TX_CLK_DELAY_SHIFT));
+		delay = (dp83867->rx_id_delay |
+			 (dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT));
 
 		phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
 				       DP83867_DEVADDR, phydev->addr, delay);

@@ -184,6 +245,10 @@ static int dp83867_config(struct phy_device *phydev)
 
 	genphy_config_aneg(phydev);
 	return 0;
+
+err_out:
+	kfree(dp83867);
+	return ret;
 }
 
 static struct phy_driver DP83867_driver = {

Signature · 1 line

2.8.0.rc3

Tom Rini

2016-04-05 15:36 UTC #2 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

Quoted 9 lines · Dan Murphy

Not all devices use the same internal delay or fifo depth. Add the ability to set the internal delay for rx or tx and the fifo depth via the devicetree. If the value is not set in the devicetree then set the delay to the default.
If devicetree is not used then use the default defines within the driver.
Signed-off-by Dan Murphy <[email protected]>

Reviewed-by Tom Rini <[email protected]>

Signature · 8 lines

Tom
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Michal Simek

2016-04-05 17:01 UTC #3 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

In reply to Dan Murphy

Quoted 68 lines · Dan Murphy

If devicetree is not used then use the default defines within the driver.

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

drivers/net/phy/ti.c +26 -4

index c3912d5..e91a6ed 100644
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f

@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus

@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)

drivers/net/phy/ti.c static inline bool phy_interface_is_rgmii(struct phy_device *phydev) · line 172

Quoted 10 lines

drivers/net/phy/ti.c +10 -0

+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+

this is not aligned with the binding you sent.
ti,rx-internal-delay
and
ti,tx-internal-delay

Thanks,
Michal

Dan Murphy

author

2016-04-05 17:18 UTC #4 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

Michal

Quoted 75 lines · Michal Simek

Quoted 74 lines · Dan Murphy

If devicetree is not used then use the default defines within the driver.

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

drivers/net/phy/ti.c +32 -4

index c3912d5..e91a6ed 100644
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f

@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus

@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)
+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);

Quoted 8 lines

drivers/net/phy/ti.c static inline bool phy_interface_is_rgmii(struct phy_device *phydev) · line 172
Quoted 4 lines
drivers/net/phy/ti.c +4 -0
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+
this is not aligned with the binding you sent.
ti,rx-internal-delay
and
ti,tx-internal-delay

You are right I will fix it and then make the same change in the kernel

Dan

Quoted 4 lines

Thanks,
Michal

Signature · 2 lines

------------------
Dan Murphy

Michal Simek

2016-04-05 17:36 UTC #5 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

Quoted 87 lines · Dan Murphy

Michal

Quoted 75 lines · Michal Simek

Quoted 74 lines · Dan Murphy

If devicetree is not used then use the default defines within the driver.

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

drivers/net/phy/ti.c +32 -4

index c3912d5..e91a6ed 100644
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f

@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus

@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)
+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);

Quoted 8 lines

drivers/net/phy/ti.c static inline bool phy_interface_is_rgmii(struct phy_device *phydev) · line 172
Quoted 4 lines
drivers/net/phy/ti.c +4 -0
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+
this is not aligned with the binding you sent.
ti,rx-internal-delay
and
ti,tx-internal-delay

Quoted 1 line

You are right I will fix it and then make the same change in the kernel

Why not just follow linux binding?
Changing binding in kernel will end up in deprecated binding for nothing.

Thanks,
Michal

Signature · 14 lines

Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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Dan Murphy

author

2016-04-05 18:30 UTC #6 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

Quoted 87 lines · Michal Simek

Quoted 86 lines · Dan Murphy

Michal

Quoted 83 lines · Michal Simek

Quoted 68 lines · Dan Murphy

If devicetree is not used then use the default defines within the driver.

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

drivers/net/phy/ti.c +26 -4

index c3912d5..e91a6ed 100644
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f

@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus

@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)

drivers/net/phy/ti.c static inline bool phy_interface_is_rgmii(struct phy_device *phydev) · line 172

Quoted 10 lines

drivers/net/phy/ti.c +10 -0

+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+

this is not aligned with the binding you sent.
ti,rx-internal-delay
and
ti,tx-internal-delay

Quoted 3 lines

Quoted 1 line
You are right I will fix it and then make the same change in the kernel
Why not just follow linux binding?
Changing binding in kernel will end up in deprecated binding for nothing.

What specific Linux binding are you referring to?

I don't see this binding getting changed as the internal delay and fifo depth are board configurable options and I don't for see the register map changing for this device.

Dan

Quoted 4 lines

Thanks,
Michal

Signature · 2 lines

------------------
Dan Murphy

Dan Murphy

author

2016-04-05 18:45 UTC #7 lore raw

PATCH 2/2 net: phy: ti: Allow the driver to be more configurable

Quoted 88 lines · Dan Murphy

Quoted 87 lines · Michal Simek

Quoted 86 lines · Dan Murphy

Michal

Quoted 83 lines · Michal Simek

Quoted 68 lines · Dan Murphy

If devicetree is not used then use the default defines within the driver.

Signed-off-by Dan Murphy <[email protected]>

---

RFC->v1 - Added devicetree support - https://patchwork.ozlabs.org/patch/604113/

 drivers/net/phy/ti.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 73 insertions(+), 8 deletions(-)

drivers/net/phy/ti.c +26 -4

index c3912d5..e91a6ed 100644
@@ -6,6 +6,14 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/compat.h>
+#include <malloc.h>
+
+#include <fdtdec.h>
+#include <dm.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR		0x1f

@@ -57,6 +65,17 @@
 #define MII_MMD_CTRL_INCR_RDWT	0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT	0xC000 /* post increment on writes only */
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAY	DP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+	int rx_id_delay;
+	int tx_id_delay;
+	int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus

@@ -134,16 +153,58 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY	8
-#define TX_ID_DELAY	0xa
-#define FIFO_DEPTH	1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)

drivers/net/phy/ti.c static inline bool phy_interface_is_rgmii(struct phy_device *phydev) · line 172

Quoted 10 lines

drivers/net/phy/ti.c +10 -0

+{
+	struct dp83867_private *dp83867 = phydev->priv;
+	struct udevice *dev = phydev->dev;
+
+	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,rx_int_delay", DEFAULT_RX_ID_DELAY);
+
+	dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+				 "ti,tx_int_delay", DEFAULT_TX_ID_DELAY);
+

this is not aligned with the binding you sent.
ti,rx-internal-delay
and
ti,tx-internal-delay

Quoted 8 lines

Quoted 3 lines
Quoted 1 line
You are right I will fix it and then make the same change in the kernel
Why not just follow linux binding?
Changing binding in kernel will end up in deprecated binding for nothing.
What specific Linux binding are you referring to?
I don't see this binding getting changed as the internal delay and fifo depth are board configurable options and I don't for see the register map changing for this device.

I see it now. Will submit v3 of the driver but I will wait for additional comments before sending tomorrow.

Dan

Quoted 8 lines

Dan
Quoted 4 lines
Thanks,
Michal

Signature · 2 lines

------------------
Dan Murphy

Tom Rini

2016-04-05 15:36 UTC #8 lore raw

PATCH 1/2 net: phy: dp83867: Add device tree bindings and documentation

In reply to Dan Murphy

Quoted 7 lines · Dan Murphy

Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver.
The original document was from:
    [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
Signed-off-by Dan Murphy <[email protected]>

Reviewed-by Tom Rini <[email protected]>

Signature · 8 lines

Tom
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