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imx6: Implement external watchdog reset

PATCH In review Tim Harvey 4 participants 8 messages Apr 1, 2016 – May 14, 2016

Subsystems (3)
Device tree bindings Arm i.MX and Layerscape Watchdog device drivers
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Tim Harvey

author
#0 lore raw

v5 cover imx6: Implement external watchdog reset

The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz.

This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html

Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>

Tim Harvey (2):
watchdog: imx2_wdt: add external reset support via 'ext-reset-output'
dt prop
ARM: dts: imx: ventana: Add wdt ext-reset support

 .../devicetree/bindings/watchdog/fsl-imx-wdt.txt      |  4 +++-
 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi                 | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi                 | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi                 | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi                 | 17 +++++++++++++++++
 arch/arm/boot/dts/imx6qdl-gw551x.dtsi                 | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw552x.dtsi                 | 12 ++++++++++++
 drivers/watchdog/imx2_wdt.c                           | 19 +++++++++++++++++--
 8 files changed, 97 insertions(+), 3 deletions(-)
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH v5 1/2 watchdog: imx2_wdt: add external reset support via dt prop

The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz.

This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html

Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>
Reviewed-by Lucas Stach <[email protected]>
Acked-by Shawn Guo <[email protected]>

---
v5:
- rename property to 'fsl,ext-reset-output'
v4:
- change Property to Properties in documentation
v3:
- mandate use of 'either' internal or external reset but not both simultaneously
v2:
- rename property to 'ext-reset-output' based on ML feedback
- simplify setting SRS bit if external-reset
- update comments and commit msg

Signed-off-by Tim Harvey <[email protected]>
---
 .../devicetree/bindings/watchdog/fsl-imx-wdt.txt      |  4 +++-
 drivers/watchdog/imx2_wdt.c                           | 19 +++++++++++++++++--
 2 files changed, 20 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt +3 -1
index 8dab6fd..107280e 100644
@@ -5,10 +5,12 @@ Required properties:
 - reg : Should contain WDT registers location and length
 - interrupts : Should contain WDT interrupt
 
-Optional property:
+Optional properties:
 - big-endian: If present the watchdog device's registers are implemented
   in big endian mode, otherwise in native mode(same with CPU), for more
   detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
+- fsl,ext-reset-output: If present the watchdog device is configured to
+  assert its external reset (WDOG_B) instead of issuing a software reset.
 
 Examples:
drivers/watchdog/imx2_wdt.c +17 -2
index e47966a..cb838be 100644
@@ -39,6 +39,8 @@
 
 #define IMX2_WDT_WCR		0x00		/* Control Register */
 #define IMX2_WDT_WCR_WT		(0xFF << 8)	/* -> Watchdog Timeout Field */
+#define IMX2_WDT_WCR_WDA	(1 << 5)	/* -> External Reset WDOG_B */
+#define IMX2_WDT_WCR_SRS	(1 << 4)	/* -> Software Reset Signal */
 #define IMX2_WDT_WCR_WRE	(1 << 3)	/* -> WDOG Reset Enable */
 #define IMX2_WDT_WCR_WDE	(1 << 2)	/* -> Watchdog Enable */
 #define IMX2_WDT_WCR_WDZST	(1 << 0)	/* -> Watchdog timer Suspend */

@@ -62,6 +64,7 @@ struct imx2_wdt_device {
 	struct regmap *regmap;
 	struct timer_list timer;	/* Pings the watchdog when closed */
 	struct watchdog_device wdog;
+	bool ext_reset;
 };
 
 static bool nowayout = WATCHDOG_NOWAYOUT;

@@ -85,6 +88,12 @@ static int imx2_wdt_restart(struct watchdog_device *wdog)
 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 	unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
 
+	/* Use internal reset or external - not both */
+	if (wdev->ext_reset)
+		wcr_enable |= IMX2_WDT_WCR_SRS; /* do not assert int reset */
+	else
+		wcr_enable |= IMX2_WDT_WCR_WDA; /* do not assert ext-reset */
+
 	/* Assert SRS signal */
 	regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
 	/*

@@ -114,8 +123,12 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
 	val |= IMX2_WDT_WCR_WDZST;
 	/* Strip the old watchdog Time-Out value */
 	val &= ~IMX2_WDT_WCR_WT;
-	/* Generate reset if WDOG times out */
-	val &= ~IMX2_WDT_WCR_WRE;
+	/* Generate internal chip-level reset if WDOG times out */
+	if (!wdev->ext_reset)
+		val &= ~IMX2_WDT_WCR_WRE;
+	/* Or if external-reset assert WDOG_B reset only on time-out */
+	else
+		val |= IMX2_WDT_WCR_WRE;
 	/* Keep Watchdog Disabled */
 	val &= ~IMX2_WDT_WCR_WDE;
 	/* Set the watchdog's Time-Out value */

@@ -263,6 +276,8 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
 	regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
 	wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
 
+	wdev->ext_reset = of_property_read_bool(pdev->dev.of_node,
+						"fsl,ext-reset-output");
 	wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
 	if (wdog->timeout != timeout)
 		dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
Signature · 1 line
1.9.1
#2 lore raw

PATCH v5 1/2 watchdog: imx2_wdt: add external reset support via dt prop

Quoted 38 lines · Tim Harvey

The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz.

This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html

Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>
Reviewed-by Lucas Stach <[email protected]>
Acked-by Shawn Guo <[email protected]>

---
v5:
- rename property to 'fsl,ext-reset-output'
v4:
- change Property to Properties in documentation
v3:
- mandate use of 'either' internal or external reset but not both simultaneously
v2:
- rename property to 'ext-reset-output' based on ML feedback
- simplify setting SRS bit if external-reset
- update comments and commit msg

Quoted 2 lines
Signed-off-by Tim Harvey <[email protected]>

---

Tested-by Akshay Bhat <[email protected]>
maintainer
#3 lore raw

PATCH v5 1/2 watchdog: imx2_wdt: add external reset support via dt prop

In reply to Tim Harvey
Quoted 15 lines · Tim Harvey

The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz.

This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html

Quoted 10 lines
Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>
Reviewed-by Lucas Stach <[email protected]>
Acked-by Shawn Guo <[email protected]>
Reviewed-by Guenter Roeck <[email protected]>
Quoted 96 lines

---
v5:
- rename property to 'fsl,ext-reset-output'
v4:
- change Property to Properties in documentation
v3:
- mandate use of 'either' internal or external reset but not both simultaneously
v2:
- rename property to 'ext-reset-output' based on ML feedback
- simplify setting SRS bit if external-reset
- update comments and commit msg

Signed-off-by Tim Harvey <[email protected]>
---
  .../devicetree/bindings/watchdog/fsl-imx-wdt.txt      |  4 +++-
  drivers/watchdog/imx2_wdt.c                           | 19 +++++++++++++++++--
  2 files changed, 20 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt +3 -1
index 8dab6fd..107280e 100644
@@ -5,10 +5,12 @@ Required properties:
  - reg : Should contain WDT registers location and length
  - interrupts : Should contain WDT interrupt
 
-Optional property:
+Optional properties:
  - big-endian: If present the watchdog device's registers are implemented
    in big endian mode, otherwise in native mode(same with CPU), for more
    detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
+- fsl,ext-reset-output: If present the watchdog device is configured to
+  assert its external reset (WDOG_B) instead of issuing a software reset.
 
  Examples:
drivers/watchdog/imx2_wdt.c +17 -2
index e47966a..cb838be 100644
@@ -39,6 +39,8 @@
 
  #define IMX2_WDT_WCR		0x00		/* Control Register */
  #define IMX2_WDT_WCR_WT		(0xFF << 8)	/* -> Watchdog Timeout Field */
+#define IMX2_WDT_WCR_WDA	(1 << 5)	/* -> External Reset WDOG_B */
+#define IMX2_WDT_WCR_SRS	(1 << 4)	/* -> Software Reset Signal */
  #define IMX2_WDT_WCR_WRE	(1 << 3)	/* -> WDOG Reset Enable */
  #define IMX2_WDT_WCR_WDE	(1 << 2)	/* -> Watchdog Enable */
  #define IMX2_WDT_WCR_WDZST	(1 << 0)	/* -> Watchdog timer Suspend */

@@ -62,6 +64,7 @@ struct imx2_wdt_device {
  	struct regmap *regmap;
  	struct timer_list timer;	/* Pings the watchdog when closed */
  	struct watchdog_device wdog;
+	bool ext_reset;
  };
 
  static bool nowayout = WATCHDOG_NOWAYOUT;

@@ -85,6 +88,12 @@ static int imx2_wdt_restart(struct watchdog_device *wdog)
  	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  	unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
 
+	/* Use internal reset or external - not both */
+	if (wdev->ext_reset)
+		wcr_enable |= IMX2_WDT_WCR_SRS; /* do not assert int reset */
+	else
+		wcr_enable |= IMX2_WDT_WCR_WDA; /* do not assert ext-reset */
+
  	/* Assert SRS signal */
  	regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
  	/*

@@ -114,8 +123,12 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
  	val |= IMX2_WDT_WCR_WDZST;
  	/* Strip the old watchdog Time-Out value */
  	val &= ~IMX2_WDT_WCR_WT;
-	/* Generate reset if WDOG times out */
-	val &= ~IMX2_WDT_WCR_WRE;
+	/* Generate internal chip-level reset if WDOG times out */
+	if (!wdev->ext_reset)
+		val &= ~IMX2_WDT_WCR_WRE;
+	/* Or if external-reset assert WDOG_B reset only on time-out */
+	else
+		val |= IMX2_WDT_WCR_WRE;
  	/* Keep Watchdog Disabled */
  	val &= ~IMX2_WDT_WCR_WDE;
  	/* Set the watchdog's Time-Out value */

@@ -263,6 +276,8 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
  	regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
  	wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
 
+	wdev->ext_reset = of_property_read_bool(pdev->dev.of_node,
+						"fsl,ext-reset-output");
  	wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
  	if (wdog->timeout != timeout)
  		dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
#4 lore raw

PATCH v5 1/2 watchdog: imx2_wdt: add external reset support via dt prop

Quoted 35 lines · Guenter Roeck
Quoted 23 lines · Tim Harvey

The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that
have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various
hangs due to the IMX6 not being fully reset [1] as well as the board failing
to reset because its PMIC has not been reset to provide adequate voltage for
the CPU when coming out of reset at 800Mhz.

This uses a new device-tree property 'fsl,ext-reset-output' to indicate the
board has such a reset and to cause the watchdog to be configured to assert
WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart.

[1]
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html

Quoted 10 lines
Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>
Reviewed-by Lucas Stach <[email protected]>
Acked-by Shawn Guo <[email protected]>
Quoted 2 lines
Reviewed-by Guenter Roeck <[email protected]>

Hi Wim,

When will this patch be applied to the watchdog maintainers git tree? I have another board that can use this feature and I am guessing I should wait before for the above patch to be applied before submitting mine.

Thanks,
Akshay

#5 lore raw

Re: [PATCH v5 1/2] watchdog: imx2_wdt: add external reset support via dt prop

In reply to Tim Harvey

Hi Tim,

Quoted 38 lines

The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz.

This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html

Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>
Reviewed-by Lucas Stach <[email protected]>
Acked-by Shawn Guo <[email protected]>

---
v5:
- rename property to 'fsl,ext-reset-output'
v4:
- change Property to Properties in documentation
v3:
- mandate use of 'either' internal or external reset but not both simultaneously
v2:
- rename property to 'ext-reset-output' based on ML feedback
- simplify setting SRS bit if external-reset
- update comments and commit msg

Quoted 6 lines
Signed-off-by Tim Harvey <[email protected]>
---
 .../devicetree/bindings/watchdog/fsl-imx-wdt.txt      |  4 +++-
 drivers/watchdog/imx2_wdt.c                           | 19 +++++++++++++++++--
 2 files changed, 20 insertions(+), 3 deletions(-)

This patch has been added to linux-watchdog-next.

Kind regards,
Wim.

author
#6 lore raw

PATCH v5 2/2 ARM: dts: imx: ventana: Add wdt ext-reset support

In reply to Tim Harvey

The Gateworks Ventana boards have a PMIC that can be used to regulate the CPU voltage rails for DVFS support. In order to ensure this PMIC is properly reset the watchdog needs to be configured to assert its external reset signal.

Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>

----
v5:
- changed property to 'fsl,ext-reset-output'
v4:
- put property in wdoggrp

Signed-off-by Tim Harvey <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 17 +++++++++++++++++
 arch/arm/boot/dts/imx6qdl-gw551x.dtsi | 12 ++++++++++++
 arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 12 ++++++++++++
 6 files changed, 77 insertions(+)
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +12 -0
index 9d7ab6c..1340e27 100644
@@ -228,6 +228,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
 &iomuxc {
 	imx6qdl-gw51xx {
 		pinctrl_enet: enetgrp {

@@ -364,5 +370,11 @@
 				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* OTG_PWR_EN */
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
 	};
 };
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +12 -0
index 8dd74e9..8cccc4a 100644
@@ -353,6 +353,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
 &iomuxc {
 	imx6qdl-gw52xx {
 		pinctrl_audmux: audmuxgrp {

@@ -549,5 +555,11 @@
 				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
 	};
 };
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +12 -0
index ec3fe74..5f700cc 100644
@@ -351,6 +351,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
 &iomuxc {
 	imx6qdl-gw53xx {
 		pinctrl_audmux: audmuxgrp {

@@ -539,5 +545,11 @@
 				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
 	};
 };
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +17 -0
index 367cc49..d19b4cc 100644
@@ -453,6 +453,17 @@
 	status = "okay";
 };
 
+&wdog1 {
+	status = "disabled";
+};
+
+&wdog2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
 &iomuxc {
 	imx6qdl-gw54xx {
 		pinctrl_audmux: audmuxgrp {

@@ -654,5 +665,11 @@
 				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
+			>;
+		};
 	};
 };
arch/arm/boot/dts/imx6qdl-gw551x.dtsi +12 -0
index 118bea5..4b9fef8 100644
@@ -239,6 +239,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
 &iomuxc {
 	imx6qdl-gw51xx {
 		pinctrl_flexcan1: flexcan1grp {

@@ -333,5 +339,11 @@
 				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
 			>;
 		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
 	};
 };
arch/arm/boot/dts/imx6qdl-gw552x.dtsi +12 -0
index f27f184..805e236 100644
@@ -197,6 +197,12 @@
 	status = "okay";
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
 &iomuxc {
 	imx6qdl-gw552x {
 		pinctrl_gpio_leds: gpioledsgrp {

@@ -286,5 +292,11 @@
 				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
 			>;
                 };
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
 	};
 };
Signature · 1 line
1.9.1
maintainer
#7 lore raw

PATCH v5 2/2 ARM: dts: imx: ventana: Add wdt ext-reset support

Quoted 5 lines · Tim Harvey

The Gateworks Ventana boards have a PMIC that can be used to regulate the CPU voltage rails for DVFS support. In order to ensure this PMIC is properly reset the watchdog needs to be configured to assert its external reset signal.

Quoted 8 lines
Cc Fabio Estevam <[email protected]>
Cc Lucas Stach <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Iain Paton <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Akshay Bhat <[email protected]>
Cc Guenter Roeck <[email protected]>
Signed-off-by Tim Harvey <[email protected]>
Acked-by Guenter Roeck <[email protected]>
Quoted 196 lines

----
v5:
- changed property to 'fsl,ext-reset-output'
v4:
- put property in wdoggrp

Signed-off-by Tim Harvey <[email protected]>
---
  arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 12 ++++++++++++
  arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 12 ++++++++++++
  arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 12 ++++++++++++
  arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 17 +++++++++++++++++
  arch/arm/boot/dts/imx6qdl-gw551x.dtsi | 12 ++++++++++++
  arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 12 ++++++++++++
  6 files changed, 77 insertions(+)
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +12 -0
index 9d7ab6c..1340e27 100644
@@ -228,6 +228,12 @@
  	status = "okay";
  };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
  &iomuxc {
  	imx6qdl-gw51xx {
  		pinctrl_enet: enetgrp {

@@ -364,5 +370,11 @@
  				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* OTG_PWR_EN */
  			>;
  		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
  	};
  };
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +12 -0
index 8dd74e9..8cccc4a 100644
@@ -353,6 +353,12 @@
  	status = "okay";
  };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
  &iomuxc {
  	imx6qdl-gw52xx {
  		pinctrl_audmux: audmuxgrp {

@@ -549,5 +555,11 @@
  				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
  			>;
  		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
  	};
  };
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +12 -0
index ec3fe74..5f700cc 100644
@@ -351,6 +351,12 @@
  	status = "okay";
  };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
  &iomuxc {
  	imx6qdl-gw53xx {
  		pinctrl_audmux: audmuxgrp {

@@ -539,5 +545,11 @@
  				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
  			>;
  		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
  	};
  };
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +17 -0
index 367cc49..d19b4cc 100644
@@ -453,6 +453,17 @@
  	status = "okay";
  };
 
+&wdog1 {
+	status = "disabled";
+};
+
+&wdog2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
  &iomuxc {
  	imx6qdl-gw54xx {
  		pinctrl_audmux: audmuxgrp {

@@ -654,5 +665,11 @@
  				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
  			>;
  		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
+			>;
+		};
  	};
  };
arch/arm/boot/dts/imx6qdl-gw551x.dtsi +12 -0
index 118bea5..4b9fef8 100644
@@ -239,6 +239,12 @@
  	status = "okay";
  };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
  &iomuxc {
  	imx6qdl-gw51xx {
  		pinctrl_flexcan1: flexcan1grp {

@@ -333,5 +339,11 @@
  				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
  			>;
  		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
  	};
  };
arch/arm/boot/dts/imx6qdl-gw552x.dtsi +12 -0
index f27f184..805e236 100644
@@ -197,6 +197,12 @@
  	status = "okay";
  };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
  &iomuxc {
  	imx6qdl-gw552x {
  		pinctrl_gpio_leds: gpioledsgrp {

@@ -286,5 +292,11 @@
  				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
  			>;
                  };
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
+			>;
+		};
  	};
  };