Amlogic Meson GXBaby and ODROID-C2 support
v4 cover Amlogic Meson GXBaby and ODROID-C2 support
Hi,
this series adds a very basic support for Amlogic S905 SoC (GXBaby) and for the ODROID-C2 board [1], and is based on u-boot sources available from the board vendor [2]. At the moment the only supported devices are the integrated UART and Ethernet adapter.
Changes since v3:
- designware eth: added check that buffer addresses are in first 4GiB as suggested by Marek (and thus removed the ack tags)
- consolidated pinmux and gpio macros
- used get_unaligned_be64() to avoid alignment faults in dram_init()
- uint32_t -> u32 in serial_meson.c
- implemented reboot and read from e-fuse through secure monitor
Changes since v2:
- squashed all platform patches into a single one
- got rid of additional non-upstream DTS node for ethernet
- improved board README
- added macros for SoC registers fields
Changes since v1:
- updated DTS files from Linux kernel
- added Ethernet support
- first 16MiB of RAM are now marked as unavailable; this seems to be required to successfully boot Linux
- fixed typo in config file
[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01
Beniamino Galvani (3):
net: designware: fix descriptor layout and warnings on 64-bit archs
arm: add initial support for Amlogic Meson and ODROID-C2
arm: meson: implement calls to secure monitor
arch/arm/Kconfig | 5 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-odroidc2.dts | 69 +++++++++++++ arch/arm/dts/meson-gxbb.dtsi | 178 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-meson/gxbb.h | 52 ++++++++++ arch/arm/include/asm/arch-meson/sm.h | 13 +++ arch/arm/mach-meson/Kconfig | 31 ++++++ arch/arm/mach-meson/Makefile | 7 ++ arch/arm/mach-meson/board.c | 67 +++++++++++++ arch/arm/mach-meson/sm.c | 71 +++++++++++++ board/hardkernel/odroid-c2/Kconfig | 12 +++ board/hardkernel/odroid-c2/MAINTAINERS | 6 ++ board/hardkernel/odroid-c2/Makefile | 7 ++ board/hardkernel/odroid-c2/README | 60 +++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 67 +++++++++++++ configs/odroid-c2_defconfig | 23 +++++ drivers/net/designware.c | 59 ++++++----- drivers/net/designware.h | 4 +- drivers/serial/Kconfig | 15 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_meson.c | 162 ++++++++++++++++++++++++++++++ include/configs/odroid-c2.h | 55 ++++++++++ 23 files changed, 938 insertions(+), 29 deletions(-) create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts create mode 100644 arch/arm/dts/meson-gxbb.dtsi create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h create mode 100644 arch/arm/include/asm/arch-meson/sm.h create mode 100644 arch/arm/mach-meson/Kconfig create mode 100644 arch/arm/mach-meson/Makefile create mode 100644 arch/arm/mach-meson/board.c create mode 100644 arch/arm/mach-meson/sm.c create mode 100644 board/hardkernel/odroid-c2/Kconfig create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS create mode 100644 board/hardkernel/odroid-c2/Makefile create mode 100644 board/hardkernel/odroid-c2/README create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c create mode 100644 configs/odroid-c2_defconfig create mode 100644 drivers/serial/serial_meson.c create mode 100644 include/configs/odroid-c2.h
Signature · 1 line
2.7.3
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix other warnings.
--- drivers/net/designware.c | 59 ++++++++++++++++++++++++++---------------------- drivers/net/designware.h | 4 ++-- 2 files changed, 34 insertions(+), 29 deletions(-)
drivers/net/designware.c +32 -27
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)for (idx =0 ; idx <CONFIG_TX_DESCR_NUM ; idx++) { desc_p = &desc_table_p[idx]; - desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];#if defined(CONFIG_DW_ALTDESCRIPTOR ) desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv) }/* Correcting the last pointer of the chain */ - desc_p->dmamac_next = &desc_table_p[0 ]; + desc_p->dmamac_next = (ulong)&desc_table_p[0 ];/* Flush all Tx buffer descriptors at once */ -flush_dcache_range ((unsigned int )priv->tx_mac_descrtable, - (unsigned int )priv->tx_mac_descrtable + +flush_dcache_range ((ulong )priv->tx_mac_descrtable, + (ulong )priv->tx_mac_descrtable +sizeof (priv->tx_mac_descrtable));writel ((ulong)&desc_table_p[0 ], &dma_p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)* Otherwise there's a chance to get some of them flushed in RAM when * GMAC is already pushing data to RAM via DMA. This way incoming from * GMAC data will be corrupted. */ -flush_dcache_range ((unsigned int )rxbuffs, (unsigned int )rxbuffs + -RX_TOTAL_BUFSIZE ); +flush_dcache_range ((ulong )rxbuffs, (ulong )rxbuffs +RX_TOTAL_BUFSIZE );for (idx =0 ; idx <CONFIG_RX_DESCR_NUM ; idx++) { desc_p = &desc_table_p[idx]; - desc_p->dmamac_addr = &rxbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&rxbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ]; desc_p->dmamac_cntl = (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv) }/* Correcting the last pointer of the chain */ - desc_p->dmamac_next = &desc_table_p[0 ]; + desc_p->dmamac_next = (ulong)&desc_table_p[0 ];/* Flush all Rx buffer descriptors at once */ -flush_dcache_range ((unsigned int )priv->rx_mac_descrtable, - (unsigned int )priv->rx_mac_descrtable + +flush_dcache_range ((ulong )priv->rx_mac_descrtable, + (ulong )priv->rx_mac_descrtable +sizeof (priv->rx_mac_descrtable));writel ((ulong)&desc_table_p[0 ], &dma_p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)struct eth_dma_regs *dma_p = priv->dma_regs_p;u32 desc_num = priv->tx_currdescnum;struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num]; -uint32_t desc_start = (uint32_t )desc_p; -uint32_t desc_end = desc_start + +ulong desc_start = (ulong )desc_p; +ulong desc_end = desc_start +roundup (sizeof (*desc_p),ARCH_DMA_MINALIGN ); -uint32_t data_start = (uint32_t )desc_p->dmamac_addr; -uint32_t data_end = data_start + -roundup (length,ARCH_DMA_MINALIGN ); +ulong data_start = desc_p->dmamac_addr; +ulong data_end = data_start +roundup (length,ARCH_DMA_MINALIGN );/* * Strictly we only need to invalidate the "txrx_status" field * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)return -EPERM ; } -memcpy (desc_p->dmamac_addr, packet, length); +memcpy ((void *)data_start, packet, length);/* Flush data to be sent */ flush_dcache_range (data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)u32 status, desc_num = priv->rx_currdescnum;struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];int length = -EAGAIN ; -uint32_t desc_start = (uint32_t )desc_p; -uint32_t desc_end = desc_start + +ulong desc_start = (ulong )desc_p; +ulong desc_end = desc_start +roundup (sizeof (*desc_p),ARCH_DMA_MINALIGN ); -uint32_t data_start = (uint32_t )desc_p->dmamac_addr; -uint32_t data_end; +ulong data_start = desc_p->dmamac_addr; +ulong data_end;/* Invalidate entire buffer descriptor */ invalidate_dcache_range (desc_start, desc_end);
@@ -372,7 +370,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)/* Invalidate received data */ data_end = data_start +roundup (length,ARCH_DMA_MINALIGN );invalidate_dcache_range (data_start, data_end); - *packetp = desc_p->dmamac_addr; + *packetp = (uchar *)(ulong )desc_p->dmamac_addr; }return length;
@@ -382,8 +380,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv) {u32 desc_num = priv->rx_currdescnum;struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num]; -uint32_t desc_start = (uint32_t )desc_p; -uint32_t desc_end = desc_start + +ulong desc_start = (ulong )desc_p; +ulong desc_end = desc_start +roundup (sizeof (*desc_p),ARCH_DMA_MINALIGN );/*
@@ -488,6 +486,11 @@ int designware_initialize(ulong base_addr, u32 interface)return -ENOMEM ; } +if ((unsigned long long )priv +sizeof (*priv) > (1ULL <<32 )) { +printf ("designware: buffers are outside DMA memory\n" ); +return -EINVAL ; + } +memset (dev,0 ,sizeof (struct eth_device ));memset (priv,0 ,sizeof (struct dw_eth_dev ));
@@ -583,6 +586,7 @@ static int designware_eth_probe(struct udevice *dev)struct eth_pdata *pdata =dev_get_platdata (dev);struct dw_eth_dev *priv =dev_get_priv (dev);u32 iobase = pdata->iobase; +ulong ioaddr;int ret;#ifdef CONFIG_DM_PCI
@@ -601,8 +605,9 @@ static int designware_eth_probe(struct udevice *dev)#endif debug ("%s, iobase=%x, priv=%p\n" , __func__, iobase, priv); - priv->mac_regs_p = (struct eth_mac_regs *)iobase; - priv->dma_regs_p = (struct eth_dma_regs *)(iobase +DW_DMA_BASE_OFFSET ); + ioaddr = iobase; + priv->mac_regs_p = (struct eth_mac_regs *)ioaddr; + priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr +DW_DMA_BASE_OFFSET ); priv->interface = pdata->phy_interface; priv->max_speed = pdata->max_speed;
drivers/net/designware.h +2 -2
@@ -110,8 +110,8 @@ struct eth_dma_regs {struct dmamacdescr {u32 txrx_status;u32 dmamac_cntl; -void *dmamac_addr; -struct dmamacdescr *dmamac_next; +u32 dmamac_addr; +u32 dmamac_next; }__aligned(ARCH_DMA_MINALIGN) ;/*
Signature · 1 line
2.7.3
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 15 lines · Beniamino Galvani
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix other warnings.Signed-off-by Beniamino Galvani <[email protected]>--- drivers/net/designware.c | 59 ++++++++++++++++++++++++++---------------------- drivers/net/designware.h | 4 ++-- 2 files changed, 34 insertions(+), 29 deletions(-)drivers/net/designware.c +0
-0
drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102
Quoted 7 lines
drivers/net/designware.c +2
-2@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)for (idx =0 ; idx <CONFIG_TX_DESCR_NUM ; idx++) { desc_p = &desc_table_p[idx]; - desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];
Why don't you use u32 instead of ulong ? The u32 is well defined. DTTO all over the place.
btw just curious, but what will happen if the descriptors get allocated in area above 4GiB ? Will the code silently corrupt memory by discarding the top bits in the descriptor pointer?
[...]
Quoted 16 lines
drivers/net/designware.h +2
-2@@ -110,8 +110,8 @@ struct eth_dma_regs {struct dmamacdescr {u32 txrx_status;u32 dmamac_cntl; -void *dmamac_addr; -struct dmamacdescr *dmamac_next; +u32 dmamac_addr; +u32 dmamac_next; }__aligned(ARCH_DMA_MINALIGN) ;/*
Signature · 2 lines
Best regards, Marek Vasut
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 7 lines · Marek Vasut
drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102
Quoted 4 lines
drivers/net/designware.c +2
-2- desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];Why don't you use u32 instead of ulong ? The u32 is well defined. DTTO all over the place.
&txbuffs[idx * CONFIG_ETH_BUFSIZE] is a pointer (and hence has the size of a ulong) and casting it to u32 would give a warning on 64 bit archs ("cast from pointer to integer of different size").
Quoted 3 lines
btw just curious, but what will happen if the descriptors get allocated in area above 4GiB ? Will the code silently corrupt memory by discarding the top bits in the descriptor pointer?
No, if the driver private structure (which contains buffers and descriptors) is above 4GiB, designware_initialize() will complain and return an error.
Beniamino
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 9 lines · Beniamino Galvani
Quoted 7 lines · Marek Vasut
drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102
Quoted 4 lines
drivers/net/designware.c +2
-2- desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];Why don't you use u32 instead of ulong ? The u32 is well defined. DTTO all over the place.
Quoted 3 lines
&txbuffs[idx *
CONFIG_ETH_BUFSIZE] is a pointer (and hence has the size of a ulong) and casting it to u32 would give a warning on 64 bit archs ("cast from pointer to integer of different size").
Will cast to uintptr_t and then to u32 help ?
It's just a feeling, but casting to ulong just to circumvent compiler warning does not sound right.
Quoted 7 lines
Quoted 3 lines
btw just curious, but what will happen if the descriptors get allocated in area above 4GiB ? Will the code silently corrupt memory by discarding the top bits in the descriptor pointer?
No, if the driver private structure (which contains buffers and descriptors) is above 4GiB,
designware_initialize()will complain and return an error.
Which code checks that ?
Quoted 2 lines
Beniamino
Signature · 2 lines
Best regards, Marek Vasut
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 10 lines · Marek Vasut
Quoted 9 lines · Beniamino Galvani
Quoted 7 lines · Marek Vasut
drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102
Quoted 4 lines
drivers/net/designware.c +2
-2- desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];Why don't you use u32 instead of ulong ? The u32 is well defined. DTTO all over the place.
Quoted 5 lines
Quoted 3 lines
&txbuffs[idx *
CONFIG_ETH_BUFSIZE] is a pointer (and hence has the size of a ulong) and casting it to u32 would give a warning on 64 bit archs ("cast from pointer to integer of different size").Will cast to
uintptr_tand then to u32 help ?
Note that uintptr_t is defined as ulong and the second cast to u32 is not needed because C does not require casts between arithmetic types. So I don't see much difference.
Quoted 2 lines
It's just a feeling, but casting to ulong just to circumvent compiler warning does not sound right.
It seems fine to me, the (ulong) is needed to cast the pointer to an arithmetic type of equivalent size which then can be assigned to an u32 variable.
Quoted 9 lines
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Quoted 3 lines
btw just curious, but what will happen if the descriptors get allocated in area above 4GiB ? Will the code silently corrupt memory by discarding the top bits in the descriptor pointer?
No, if the driver private structure (which contains buffers and descriptors) is above 4GiB,
designware_initialize()will complain and return an error.Which code checks that ?
+ if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
+ printf("designware: buffers are outside DMA memory\n");
+ return -EINVAL;
+ }
+
Beniamino
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 29 lines · Beniamino Galvani
Quoted 8 lines · Marek Vasut
Quoted 7 lines · Beniamino Galvani
Quoted 6 lines · Marek Vasut
drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102
Quoted 4 lines
drivers/net/designware.c +2
-2- desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];Why don't you use u32 instead of ulong ? The u32 is well defined. DTTO all over the place.
Quoted 4 lines
Quoted 3 lines
&txbuffs[idx *
CONFIG_ETH_BUFSIZE] is a pointer (and hence has the size of a ulong) and casting it to u32 would give a warning on 64 bit archs ("cast from pointer to integer of different size").Will cast to
uintptr_tand then to u32 help ?Note that
uintptr_tis defined as ulong and the second cast to u32 is not needed because C does not require casts between arithmetic types. So I don't see much difference.Quoted 2 lines
It's just a feeling, but casting to ulong just to circumvent compiler warning does not sound right.
It seems fine to me, the (ulong) is needed to cast the pointer to an arithmetic type of equivalent size which then can be assigned to an u32 variable.
Quoted 6 lines
Quoted 6 lines
Quoted 3 lines
btw just curious, but what will happen if the descriptors get allocated in area above 4GiB ? Will the code silently corrupt memory by discarding the top bits in the descriptor pointer?
No, if the driver private structure (which contains buffers and descriptors) is above 4GiB,
designware_initialize()will complain and return an error.
Quoted 6 lines
Quoted 1 line
Which code checks that ?
+ if ((unsigned long long)priv +
sizeof(*priv)> (1ULL << 32)) {
+printf("designware: buffers are outside DMA memory\n");
+ return-EINVAL;
+ }
+
Hmm, this is going to get very interesting with efi_loader support. By default we allocate memory at the highest possible free address, so payloads will probably (unless they specify limits) have their buffers above 32bit on this platform. If we now deny any DMA to them, we basically break I/O access.
Could you by any chance just use a bounce buffer?
Alex
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 5 lines · Alexander Graf
Hmm, this is going to get very interesting with
efi_loadersupport. By default we allocate memory at the highest possible free address, so payloads will probably (unless they specify limits) have their buffers above 32bit on this platform. If we now deny any DMA to them, we basically break I/O access.
I'm not familiar with efi_loader, but on this platform the physical RAM is within the 32bit memory range, so I don't think a workaround is needed. And I guess probably it's the same for the other 64bit ARM SoC using this driver.
BTW, I see that another driver (sunxi_mmc) also truncates the upper 32 bits of addresses on 64bit platforms. Maybe this issue should be addresses in a generic way?
Quoted 1 line
Could you by any chance just use a bounce buffer?
Do you have any suggestions on how to do it? Are there any primitives in u-boot to request memory from low addresses?
Beniamino
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 11 lines · Beniamino Galvani
Quoted 5 lines · Alexander Graf
Hmm, this is going to get very interesting with
efi_loadersupport. By default we allocate memory at the highest possible free address, so payloads will probably (unless they specify limits) have their buffers above 32bit on this platform. If we now deny any DMA to them, we basically break I/O access.I'm not familiar with
efi_loader, but on this platform the physical RAM is within the 32bit memory range, so I don't think a workaround is needed. And I guess probably it's the same for the other 64bit ARM SoC using this driver.
So if RAM is always within the lower 32bits, then we don't have a problem.
Quoted 3 lines
BTW, I see that another driver (
sunxi_mmc) also truncates the upper 32 bits of addresses on 64bit platforms. Maybe this issue should be addresses in a generic way?
The only 64bit sunxi platform (A64) also only has 32bit physical RAM addresses.
Quoted 4 lines
Quoted 1 line
Could you by any chance just use a bounce buffer?
Do you have any suggestions on how to do it? Are there any primitives in u-boot to request memory from low addresses?
Thinking about this I don't think we have the memory reservation logistics to maintain a good bounce buffer. You could create a global array in bss that you read to / write from, but I'm not sure it's really worth it.
At the end of the day, if you know that your platform can only ever do 32bit DMA to a physical address range that's only 32bits, it's perfectly ok IMHO.
We only have a problem if you have a platform that has RAM above 4G and can only do DMA to 32bit addresses.
Alex
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
In reply to Beniamino GalvaniQuoted 21 lines · Beniamino Galvani
Quoted 7 lines · Marek Vasut
Quoted 6 lines · Beniamino Galvani
Quoted 5 lines · Marek Vasut
Quoted 4 lines
drivers/net/designware.c +2
-2- desc_p->dmamac_addr = &txbuffs[idx *CONFIG_ETH_BUFSIZE ]; - desc_p->dmamac_next = &desc_table_p[idx +1 ]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx *CONFIG_ETH_BUFSIZE ]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx +1 ];Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
Why don't you use u32 instead of ulong ? The u32 is well defined. DTTO all over the place.
&txbuffs[idx *
CONFIG_ETH_BUFSIZE] is a pointer (and hence has the size of a ulong) and casting it to u32 would give a warning on 64 bit archs ("cast from pointer to integer of different size").Will cast to
uintptr_tand then to u32 help ?Note that
uintptr_tis defined as ulong and the second cast to u32 is not needed because C does not require casts between arithmetic types. So I don't see much difference.
Quoted 6 lines
Quoted 2 lines
It's just a feeling, but casting to ulong just to circumvent compiler warning does not sound right.
It seems fine to me, the (ulong) is needed to cast the pointer to an arithmetic type of equivalent size which then can be assigned to an u32 variable.
Sorry, didn't notice that you already had this conversation in a previous version.
Quoted 21 lines
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btw just curious, but what will happen if the descriptors get allocated in area above 4GiB ? Will the code silently corrupt memory by discarding the top bits in the descriptor pointer?
No, if the driver private structure (which contains buffers and descriptors) is above 4GiB,
designware_initialize()will complain and return an error.Which code checks that ?
+ if ((unsigned long long)priv +
sizeof(*priv)> (1ULL << 32)) {
+printf("designware: buffers are outside DMA memory\n");
+ return-EINVAL;
+ }
+Beniamino
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PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
In reply to Beniamino GalvaniAm 17.04.2016 um 09:48 schrieb Beniamino Galvani:
Quoted 14 lines
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix other warnings.Signed-off-by Beniamino Galvani <[email protected]>--- drivers/net/designware.c | 59 ++++++++++++++++++++++++++---------------------- drivers/net/designware.h | 4 ++-- 2 files changed, 34 insertions(+), 29 deletions(-)drivers/net/designware.c +0
-0
[...]
Quoted 7 lines
drivers/net/designware.c +1
-0@@ -488,6 +486,11 @@ int designware_initialize(ulong base_addr, u32 interface)return -ENOMEM ; } +if ((unsigned long long )priv +sizeof (*priv) > (1ULL <<32 )) {=?
Regards,
Andreas
Quoted 7 lines
drivers/net/designware.c +4
-0+printf ("designware: buffers are outside DMA memory\n" ); +return -EINVAL ; + } +memset (dev,0 ,sizeof (struct eth_device ));memset (priv,0 ,sizeof (struct dw_eth_dev ));
[snip]
Signature · 3 lines
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Graham Norton HRB 21284 (AG N?rnberg)
PATCH v4 1/3 net: designware: fix descriptor layout and warnings on 64-bit archs
Quoted 3 lines · Andreas F?rber
Quoted 3 lines
drivers/net/designware.c +1
-0+if ((unsigned long long )priv +sizeof (*priv) > (1ULL <<32 )) {=?
I think ">" is correct, the (unfortunate) case
priv + size == (1 << 32)
is still acceptable because the last byte used by the structure would be (priv + size - 1).
Beniamino
PATCH v4 2/3 arm: add initial support for Amlogic Meson and ODROID-C2
In reply to Beniamino GalvaniThis adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1].
[1] https://patchwork.ozlabs.org/patch/603583/
--- arch/arm/Kconfig | 5 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-odroidc2.dts | 69 +++++++++++++ arch/arm/dts/meson-gxbb.dtsi | 178 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-meson/gxbb.h | 52 ++++++++++ arch/arm/mach-meson/Kconfig | 31 ++++++ arch/arm/mach-meson/Makefile | 7 ++ arch/arm/mach-meson/board.c | 66 ++++++++++++ board/hardkernel/odroid-c2/Kconfig | 12 +++ board/hardkernel/odroid-c2/MAINTAINERS | 6 ++ board/hardkernel/odroid-c2/Makefile | 7 ++ board/hardkernel/odroid-c2/README | 60 +++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 51 ++++++++++ configs/odroid-c2_defconfig | 23 +++++ drivers/serial/Kconfig | 15 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_meson.c | 162 ++++++++++++++++++++++++++++++ include/configs/odroid-c2.h | 55 ++++++++++ 19 files changed, 803 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts create mode 100644 arch/arm/dts/meson-gxbb.dtsi create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h create mode 100644 arch/arm/mach-meson/Kconfig create mode 100644 arch/arm/mach-meson/Makefile create mode 100644 arch/arm/mach-meson/board.c create mode 100644 board/hardkernel/odroid-c2/Kconfig create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS create mode 100644 board/hardkernel/odroid-c2/Makefile create mode 100644 board/hardkernel/odroid-c2/README create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c create mode 100644 configs/odroid-c2_defconfig create mode 100644 drivers/serial/serial_meson.c create mode 100644 include/configs/odroid-c2.h
arch/arm/Kconfig +5 -0
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE select SUPPORT_SPL select CMD_POWEROFF +config ARCH_MESON + bool "Amlogic Meson" + config ARCH_MX7 bool "Freescale MX7" select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig" source "arch/arm/cpu/armv7/rmobile/Kconfig" +source "arch/arm/mach-meson/Kconfig" + source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig"
arch/arm/Makefile +1 -0
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_KEYSTONE) += keystone # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD machine-$(CONFIG_KIRKWOOD) += kirkwood +machine-$(CONFIG_ARCH_MESON) += meson machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
arch/arm/dts/Makefile +2 -0
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-jerry.dtb \ rk3288-rock2-square.dtb \ rk3036-sdk.dtb +dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxbb-odroidc2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \
arch/arm/dts/meson-gxbb-odroidc2.dts new file +69 -0
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arch/arm/dts/meson-gxbb.dtsi new file +178 -0
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arch/arm/include/asm/arch-meson/gxbb.h new file +52 -0
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arch/arm/mach-meson/Kconfig new file +31 -0
@@ -0,0 +1,31 @@ +if ARCH_MESON + +config MESON_GXBB + bool "Support Meson GXBaby" + select ARM64 + select DM + select DM_SERIAL + help + The Amlogic Meson GXBaby (S905) is an ARM SoC with a + quad-core Cortex-A53 CPU and a Mali-450 GPU. + +if MESON_GXBB + +config TARGET_ODROID_C2 + bool "ODROID-C2" + help + ODROID-C2 is a single board computer based on Meson GXBaby + with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD + slot, eMMC, IR receiver and a 40-pin GPIO header. + +endif + +config SYS_SOC + default "meson" + +config SYS_MALLOC_F_LEN + default 0x1000 + +source "board/hardkernel/odroid-c2/Kconfig" + +endif
arch/arm/mach-meson/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# Copyright (c) 2016 Beniamino Galvani <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += board.o
arch/arm/mach-meson/board.c new file +66 -0
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board/hardkernel/odroid-c2/Kconfig new file +12 -0
@@ -0,0 +1,12 @@ +if TARGET_ODROID_C2 + +config SYS_BOARD + default "odroid-c2" + +config SYS_VENDOR + default "hardkernel" + +config SYS_CONFIG_NAME + default "odroid-c2" + +endif
board/hardkernel/odroid-c2/MAINTAINERS new file +6 -0
@@ -0,0 +1,6 @@ +ODROID-C2 +M: Beniamino Galvani <[email protected]> +S: Maintained +F: board/hardkernel/odroid-c2/ +F: include/configs/odroid-c2.h +F: configs/odroid-c2_defconfig
board/hardkernel/odroid-c2/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Beniamino Galvani <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := odroid-c2.o
board/hardkernel/odroid-c2/README new file +60 -0
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board/hardkernel/odroid-c2/odroid-c2.c new file +51 -0
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configs/odroid-c2_defconfig new file +23 -0
@@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_MESON_GXBB=y +CONFIG_TARGET_ODROID_C2=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y
drivers/serial/Kconfig +15 -0
@@ -112,6 +112,14 @@ config DEBUG_UART_S5P will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. +config DEBUG_UART_MESON + bool "Amlogic Meson" + depends on MESON_SERIAL + help + Select this to enable a debug UART using the serial_meson driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver-model serial is running. + config DEBUG_UART_UARTLITE bool "Xilinx Uartlite" help
@@ -320,6 +328,13 @@ config XILINX_UARTLITE If you have a Xilinx based board and want to use the uartlite serial ports, say Y to this option. If unsure, say N. +config MESON_SERIAL + bool "Support for Amlogic Meson UART" + depends on DM_SERIAL && ARCH_MESON + help + If you have an Amlogic Meson based board and want to use the on-chip + serial ports, say Y to this option. If unsure, say N. + config MSM_SERIAL bool "Qualcomm on-chip UART" depends on DM_SERIAL
drivers/serial/Makefile +1 -0
@@ -26,6 +26,7 @@ obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P) += serial_s5p.o obj-$(CONFIG_MXC_UART) += serial_mxc.o obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o +obj-$(CONFIG_MESON_SERIAL) += serial_meson.o obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
drivers/serial/serial_meson.c new file +162 -0
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include/configs/odroid-c2.h new file +55 -0
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Signature · 1 line
2.7.3
PATCH v4 3/3 arm: meson: implement calls to secure monitor
In reply to Beniamino GalvaniImplement calls to the secure monitor to reset the board and read the MAC address from e-fuse.
--- arch/arm/include/asm/arch-meson/sm.h | 13 +++++++ arch/arm/mach-meson/Makefile | 2 +- arch/arm/mach-meson/board.c | 3 +- arch/arm/mach-meson/sm.c | 71 ++++++++++++++++++++++++++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 16 ++++++++ 5 files changed, 103 insertions(+), 2 deletions(-) create mode 100644 arch/arm/include/asm/arch-meson/sm.h create mode 100644 arch/arm/mach-meson/sm.c
arch/arm/include/asm/arch-meson/sm.h new file +13 -0
@@ -0,0 +1,13 @@ +/* +* (C) Copyright 2016 - Beniamino Galvani <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __MESON_SM_H__ +#define __MESON_SM_H__ + +void meson_sm_reboot (void ); +ssize_t meson_sm_read_efuse (uintptr_t offset,void *buffer,size_t size); + +#endif /* __MESON_SM_H__ */
arch/arm/mach-meson/Makefile +1 -1
@@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += board.o +obj-y += board.o sm.o
arch/arm/mach-meson/board.c +2 -1
@@ -8,6 +8,7 @@#include <libfdt.h> #include <linux/err.h> #include <asm/arch/gxbb.h> +#include <asm/arch/sm.h> #include <asm/armv8/mmu.h> #include <asm/unaligned.h>
@@ -42,7 +43,7 @@ void dram_init_banksize(void)void reset_cpu (ulong addr) { -/* Not implemented yet */ +meson_sm_reboot (); }static struct mm_region gxbb_mem_map[] = {
arch/arm/mach-meson/sm.c new file +71 -0
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board/hardkernel/odroid-c2/odroid-c2.c +16 -0
@@ -7,9 +7,15 @@#include <common.h> #include <asm/io.h> #include <asm/arch/gxbb.h> +#include <asm/arch/sm.h> #include <dm/platdata.h> #include <phy.h> +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 +int board_init (void ) {return 0 ;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {int misc_init_r (void ) { +u8 mac_addr[EFUSE_MAC_SIZE ]; +ssize_t len; +/* Select Ethernet function */ setbits_le32 (GXBB_PINMUX (6 ),0x3fff );
@@ -47,5 +56,12 @@ int misc_init_r(void)mdelay (10 );setbits_le32 (GXBB_GPIO_OUT (3 ),BIT (14 )); +if (!eth_getenv_enetaddr ("ethaddr" , mac_addr)) { + len =meson_sm_read_efuse (EFUSE_MAC_OFFSET , + mac_addr,EFUSE_MAC_SIZE ); +if (len ==EFUSE_MAC_SIZE &&is_valid_ethaddr (mac_addr)) +eth_setenv_enetaddr ("ethaddr" , mac_addr); + } +return 0 ; }
Signature · 1 line
2.7.3
PATCH v4 3/3 arm: meson: implement calls to secure monitor
Quoted 60 lines
Am 17.04.2016 um 09:48 schrieb Beniamino Galvani <[email protected]>:
Implement calls to the secure monitor to reset the board and read the MAC address from e-fuse.
Signed-off-by Beniamino Galvani <[email protected]>---
arch/arm/include/asm/arch-meson/sm.h | 13 +++++++ arch/arm/mach-meson/Makefile | 2 +- arch/arm/mach-meson/board.c | 3 +- arch/arm/mach-meson/sm.c | 71 ++++++++++++++++++++++++++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 16 ++++++++ 5 files changed, 103 insertions(+), 2 deletions(-)create mode 100644
arch/arm/include/asm/arch-meson/sm.hcreate mode 100644arch/arm/mach-meson/sm.carch/arm/include/asm/arch-meson/sm.h new file +13
-0@@ -0,0 +1,13 @@ +/* +* (C) Copyright 2016 - Beniamino Galvani <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __MESON_SM_H__ +#define __MESON_SM_H__ + +void meson_sm_reboot (void ); +ssize_t meson_sm_read_efuse (uintptr_t offset,void *buffer,size_t size); + +#endif /* __MESON_SM_H__ */ arch/arm/mach-meson/Makefile +1
-1@@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += board.o +obj-y += board.o sm.oarch/arm/mach-meson/board.c +1
-0@@ -8,6 +8,7 @@#include <libfdt.h> #include <linux/err.h> #include <asm/arch/gxbb.h> +#include <asm/arch/sm.h> #include <asm/armv8/mmu.h> #include <asm/unaligned.h>
arch/arm/mach-meson/board.c void dram_init_banksize(void) · line 46
Quoted 5 lines
arch/arm/mach-meson/board.c +1
-1@@ -42,7 +43,7 @@ void dram_init_banksize(void)void reset_cpu (ulong addr) { -/* Not implemented yet */ +meson_sm_reboot ();
Shouldn't reboot be available as psci call? We could then have a generic reset function for systems with working psci in atf.
Alex
PATCH v4 3/3 arm: meson: implement calls to secure monitor
Quoted 2 lines · Alexander Graf
Shouldn't reboot be available as psci call? We could then have a generic reset function for systems with working psci in atf.
Yes, the 0x84000009 function ID used to reset the board seems to be actually a PSCI call, so probably a generic function could be implemented and used. I will change this in the next version.
Thanks,
Beniamino
PATCH v4 3/3 arm: meson: implement calls to secure monitor
In reply to Beniamino GalvaniQuoted 4 lines · Beniamino Galvani
Implement calls to the secure monitor to reset the board and read the MAC address from e-fuse.
Signed-off-by Beniamino Galvani <[email protected]>
[...]
Quoted 8 lines
arch/arm/mach-meson/sm.c new file +2
-0@@ -0,0 +1,71 @@ +/* +* (C) Copyright 2016 Beniamino Galvani <[email protected]>
arch/arm/mach-meson/sm.c line 12
Quoted 10 lines
arch/arm/mach-meson/sm.c new file +10
-0+* +* SPDX-License-Identifier: GPL-2.0+ +* +* Secure monitor calls. +*/ + +#include <common.h> +#include <asm/arch/gxbb.h> + +#define MIN (a, b) ((a) < (b) ? (a) : (b))
See include/linux/kernel.h for min macro
Quoted 8 lines
arch/arm/mach-meson/sm.c new file +8
-0+#define FN_GET_SHARE_MEM_INPUT_BASE 0x82000020 +#define FN_GET_SHARE_MEM_OUTPUT_BASE 0x82000021 +#define FN_EFUSE_READ 0x82000030 +#define FN_EFUSE_WRITE 0x82000031 +#define FN_REBOOT 0x84000009 + +static void *shmem_input; +static void *shmem_output;
[...]
Signature · 2 lines
Best regards, Marek Vasut
PATCH v4 3/3 arm: meson: implement calls to secure monitor
Quoted 3 lines · Marek Vasut
Quoted 1 line
+#define
MIN(a, b)((a) < (b) ? (a) : (b))See
include/linux/kernel.hfor min macro
Ah, I missed it, thanks!
Beniamino