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arm: dts: lpc32xx: update ssp / spi nodes

PATCH New slemieux.tyco at gmail.com 3 participants 17 messages Apr 14, 2016 – Apr 21, 2016

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#0 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

From: Sylvain Lemieux <[email protected]>

This patchset change the following:
1) adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

2) disable, by default, the SSP0/SPI1 and SSP1/SPI2 shared pinout; shared pin should be enable in board specific dts, as needed.

3) enable SSP0 used by PHY3250.

Sylvain Lemieux (3):
arm: dts: lpc32xx: add clock properties to spi nodes
arm: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
arm: dts: phy3250: enable ssp0

 arch/arm/boot/dts/lpc32xx.dtsi | 16 ++++++++++++++
 arch/arm/boot/dts/phy3250.dts  |  1 +
 2 files changed, 15 insertions(+)
Signature · 1 line
1.8.3.1
#1 lore raw

PATCH 1/3 arm: dts: lpc32xx: add clock properties to spi nodes

From: Sylvain Lemieux <[email protected]>

The change adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

---
 arch/arm/boot/dts/lpc32xx.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +4 -0
index c58d8da..0b6a643 100644
@@ -173,6 +173,8 @@
 			spi1: spi at 20088000 {
 				compatible = "nxp,lpc3220-spi";
 				reg = <0x20088000 0x1000>;
+				clocks = <&clk LPC32XX_CLK_SPI1>;
+				clock-names = "apb_pclk";
 			};
 
 			ssp1: ssp at 2008c000 {
@@ -186,6 +188,8 @@
 			spi2: spi at 20090000 {
 				compatible = "nxp,lpc3220-spi";
 				reg = <0x20090000 0x1000>;
+				clocks = <&clk LPC32XX_CLK_SPI2>;
+				clock-names = "apb_pclk";
 			};
 
 			i2s0: i2s at 20094000 {
Signature · 1 line
1.8.3.1
#2 lore raw

PATCH 1/3 arm: dts: lpc32xx: add clock properties to spi nodes

Hi Sylvain,

Quoted 15 lines · slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

The change adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

---
 arch/arm/boot/dts/lpc32xx.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +0 -0
index c58d8da..0b6a643 100644

arch/arm/boot/dts/lpc32xx.dtsi line 177

Quoted 5 lines
arch/arm/boot/dts/lpc32xx.dtsi +2 -0
@@ -173,6 +173,8 @@
 			spi1: spi at 20088000 {
 				compatible = "nxp,lpc3220-spi";
 				reg = <0x20088000 0x1000>;
+				clocks = <&clk LPC32XX_CLK_SPI1>;
+				clock-names = "apb_pclk";

I'm not sure that here is a correct clock name, and it looks like it is copied from some PrimeCell device node, may be "arm,pl022" SPI.

Reasons to NOT add clock-names property:
* the name is one in one PrimeCell clock name, which may be confusing,
* there is no "nxp,lpc3220-spi" SPI controller driver in the mainline,
* there is no documented description of controller's properties,
* the controller has only one clock, so I believe "clock-names" is redundant here.

I don't object against adding "clocks" property, but no public driver means no testing, unfortunately.

FWIW there was an attempt to add the driver of pretty bad quality, and it does not define a "clock-names" property [1].

arch/arm/boot/dts/lpc32xx.dtsi line 192

Quoted 9 lines
arch/arm/boot/dts/lpc32xx.dtsi +2 -0
 			};
 
 			ssp1: ssp at 2008c000 {
@@ -186,6 +188,8 @@
 			spi2: spi at 20090000 {
 				compatible = "nxp,lpc3220-spi";
 				reg = <0x20090000 0x1000>;
+				clocks = <&clk LPC32XX_CLK_SPI2>;
+				clock-names = "apb_pclk";

Same as above.

arch/arm/boot/dts/lpc32xx.dtsi line 195

Quoted 4 lines
arch/arm/boot/dts/lpc32xx.dtsi +0 -0
 			};
 
 			i2s0: i2s at 20094000 {

[1] https://lkml.org/lkml/2015/7/12/61

--
With best wishes,
Vladimir

#3 lore raw

PATCH 1/3 arm: dts: lpc32xx: add clock properties to spi nodes

Hi Vladimir,

Quoted 27 lines · Vladimir Zapolskiy

Hi Sylvain,

Quoted 15 lines · slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

The change adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

---
 arch/arm/boot/dts/lpc32xx.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +0 -0
index c58d8da..0b6a643 100644

arch/arm/boot/dts/lpc32xx.dtsi line 177

Quoted 5 lines
arch/arm/boot/dts/lpc32xx.dtsi +2 -0
@@ -173,6 +173,8 @@
 			spi1: spi at 20088000 {
 				compatible = "nxp,lpc3220-spi";
 				reg = <0x20088000 0x1000>;
+				clocks = <&clk LPC32XX_CLK_SPI1>;
+				clock-names = "apb_pclk";

I'm not sure that here is a correct clock name, and it looks like it is copied from some PrimeCell device node, may be "arm,pl022" SPI.

Quoted 7 lines

Reasons to NOT add clock-names property:
* the name is one in one PrimeCell clock name, which may be confusing,
* there is no "nxp,lpc3220-spi" SPI controller driver in the mainline,
* there is no documented description of controller's properties,
* the controller has only one clock, so I believe "clock-names" is redundant here.

I will try without the clock name, and, update the patch accordingly.

Quoted 4 lines

I don't object against adding "clocks" property, but no public driver means no testing, unfortunately.

FWIW there was an attempt to add the driver of pretty bad quality,

We are currently using our own SPI driver with limited functionality; the driver support polling mode only.

We did not submit the driver, because of the limited support.

Quoted 24 lines

and it does not define a "clock-names" property [1].

arch/arm/boot/dts/lpc32xx.dtsi line 192

Quoted 9 lines
arch/arm/boot/dts/lpc32xx.dtsi +2 -0
 			};
 
 			ssp1: ssp at 2008c000 {
@@ -186,6 +188,8 @@
 			spi2: spi at 20090000 {
 				compatible = "nxp,lpc3220-spi";
 				reg = <0x20090000 0x1000>;
+				clocks = <&clk LPC32XX_CLK_SPI2>;
+				clock-names = "apb_pclk";

Same as above.

arch/arm/boot/dts/lpc32xx.dtsi line 195

Quoted 4 lines
arch/arm/boot/dts/lpc32xx.dtsi +0 -0
 			};
 
 			i2s0: i2s at 20094000 {

[1] https://lkml.org/lkml/2015/7/12/61

--
With best wishes,
Vladimir

#4 lore raw

PATCH 2/3 arm: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default

In reply to slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

The SSP0/SPI1 and SSP1/SPI2 shared pinout and should be disable by default.

Board specific dts should enable them, as needed.

---
 arch/arm/boot/dts/lpc32xx.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/lpc32xx.dtsi +12 -0
index 0b6a643..aa5cb43 100644
@@ -162,12 +162,17 @@
 			compatible = "simple-bus";
 			ranges = <0x20000000 0x20000000 0x30000000>;
 
+			/*
+			 * ssp0 and spi1 are shared pins;
+			 * enable one in your board dts, as needed.
+			 */
 			ssp0: ssp at 20084000 {
 				compatible = "arm,pl022", "arm,primecell";
 				reg = <0x20084000 0x1000>;
 				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk LPC32XX_CLK_SSP0>;
 				clock-names = "apb_pclk";
+				status = "disabled";
 			};
 
 			spi1: spi at 20088000 {
@@ -175,14 +180,20 @@
 				reg = <0x20088000 0x1000>;
 				clocks = <&clk LPC32XX_CLK_SPI1>;
 				clock-names = "apb_pclk";
+				status = "disabled";
 			};
 
+			/*
+			 * ssp1 and spi2 are shared pins;
+			 * enable one in your board dts, as needed.
+			 */
 			ssp1: ssp at 2008c000 {
 				compatible = "arm,pl022", "arm,primecell";
 				reg = <0x2008c000 0x1000>;
 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk LPC32XX_CLK_SSP1>;
 				clock-names = "apb_pclk";
+				status = "disabled";
 			};
 
 			spi2: spi at 20090000 {
@@ -190,6 +201,7 @@
 				reg = <0x20090000 0x1000>;
 				clocks = <&clk LPC32XX_CLK_SPI2>;
 				clock-names = "apb_pclk";
+				status = "disabled";
 			};
 
 			i2s0: i2s at 20094000 {
Signature · 1 line
1.8.3.1
#5 lore raw

PATCH 3/3 arm: dts: phy3250: enable ssp0

In reply to slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

---
 arch/arm/boot/dts/phy3250.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/phy3250.dts +1 -0
index a00d7ce..26e070f 100644
@@ -146,6 +146,7 @@
 				#size-cells = <0>;
 				num-cs = <1>;
 				cs-gpios = <&gpio 3 5 0>;
+				status = "okay";
 
 				eeprom: at25 at 0 {
 					pl022,interface = <0>;
Signature · 1 line
1.8.3.1
#6 lore raw

PATCH 3/3 arm: dts: phy3250: enable ssp0

Hi Sylvain,

Quoted 2 lines · slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

even a short commit message is highly appreciated, e.g. "this is a preparatory change prior to disabling SSPx controllers by default in the shared LPC32xx DTSI file".

Quoted 11 lines
---
 arch/arm/boot/dts/phy3250.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/phy3250.dts +0 -0
index a00d7ce..26e070f 100644

arch/arm/boot/dts/phy3250.dts line 152

Quoted 7 lines
arch/arm/boot/dts/phy3250.dts +1 -0
@@ -146,6 +146,7 @@
 				#size-cells = <0>;
 				num-cs = <1>;
 				cs-gpios = <&gpio 3 5 0>;
+				status = "okay";
 
 				eeprom: at25 at 0 {
 					pl022,interface = <0>;

Could you please swap 2/3 and 3/3 ?

This may save some time to git-bisect users, if there are any :)

--
With best wishes,
Vladimir

#7 lore raw

PATCH 3/3 arm: dts: phy3250: enable ssp0

Quoted 25 lines · Vladimir Zapolskiy

Hi Sylvain,

Quoted 2 lines · slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

even a short commit message is highly appreciated, e.g. "this is a preparatory change prior to disabling SSPx controllers by default in the shared LPC32xx DTSI file".

Quoted 15 lines
---
 arch/arm/boot/dts/phy3250.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/phy3250.dts +1 -0
index a00d7ce..26e070f 100644
@@ -146,6 +146,7 @@
 				#size-cells = <0>;
 				num-cs = <1>;
 				cs-gpios = <&gpio 3 5 0>;
+				status = "okay";
 
Quoted 6 lines

arch/arm/boot/dts/phy3250.dts line 152

Quoted 3 lines
arch/arm/boot/dts/phy3250.dts +0 -0
 				eeprom: at25 at 0 {
 					pl022,interface = <0>;

Could you please swap 2/3 and 3/3 ?

OK, will submit v2 tomorrow.

Quoted 5 lines

This may save some time to git-bisect users, if there are any :)

--
With best wishes,
Vladimir

#8 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

In reply to slemieux.tyco at gmail.com
Quoted 11 lines · On Thursday 14 April 2016 08:20:34 slemieux.tyco at gmail.com wrote:

From: Sylvain Lemieux <[email protected]>

This patchset change the following:
1) adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

2) disable, by default, the SSP0/SPI1 and SSP1/SPI2 shared pinout; shared pin should be enable in board specific dts, as needed.

3) enable SSP0 used by PHY3250.

Quoted 10 lines

Sylvain Lemieux (3):
arm: dts: lpc32xx: add clock properties to spi nodes
arm: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
arm: dts: phy3250: enable ssp0

 arch/arm/boot/dts/lpc32xx.dtsi | 16 ++++++++++++++
 arch/arm/boot/dts/phy3250.dts  |  1 +
 2 files changed, 15 insertions(+)

The patches look fine, but it's unclear what you want to happen with them as long as the maintainer situation is not resolved. I've seen patches from Vladimir and you recently, and none from Roland, so I think it would be good if one or both of you could officially step up to be maintainers and collect all patches to forward them to arm at kernel.org for inclusion.

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

For the patch descriptions, please always start the subject with 'ARM', not 'arm' to follow the common convention, and always add a multi-line description even for trivial patches.

Arnd

#9 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

Hi Arnd,

Quoted 23 lines · Arnd Bergmann
Quoted 11 lines · On Thursday 14 April 2016 08:20:34 slemieux.tyco at gmail.com wrote:

From: Sylvain Lemieux <[email protected]>

This patchset change the following:
1) adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

2) disable, by default, the SSP0/SPI1 and SSP1/SPI2 shared pinout; shared pin should be enable in board specific dts, as needed.

3) enable SSP0 used by PHY3250.

Quoted 10 lines

Sylvain Lemieux (3):
arm: dts: lpc32xx: add clock properties to spi nodes
arm: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
arm: dts: phy3250: enable ssp0

 arch/arm/boot/dts/lpc32xx.dtsi | 16 ++++++++++++++
 arch/arm/boot/dts/phy3250.dts  |  1 +
 2 files changed, 15 insertions(+)
Quoted 5 lines

The patches look fine, but it's unclear what you want to happen with them as long as the maintainer situation is not resolved. I've seen patches from Vladimir and you recently, and none from Roland, so I think it would be good if one or both of you could officially step up to be maintainers and collect all patches to forward them to arm at kernel.org for inclusion.

for v4.5 and v4.6 I collected my own patches from LAKML after review, I started to do it for v4.7, but probably a bit later than desired.

Could you please remind me, when do ARM maintainers generally stop applying "for-next" pull requests?

Quoted 2 lines

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

I'll send a change on behalf of myself, at this point I don't think that pure lpc32xx maintenance (deliberately here I exclude development!) task takes more than 20 hours per month, which is affordable for me, Sylvain please express your view.

Quoted 6 lines

For the patch descriptions, please always start the subject with 'ARM', not 'arm' to follow the common convention, and always add a multi-line description even for trivial patches.

Arnd

--
With best wishes,
Vladimir

#10 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

Quoted 32 lines · On Monday 18 April 2016 07:45:00 Vladimir Zapolskiy wrote:

Hi Arnd,

Quoted 23 lines · Arnd Bergmann
Quoted 11 lines · On Thursday 14 April 2016 08:20:34 slemieux.tyco at gmail.com wrote:

From: Sylvain Lemieux <[email protected]>

This patchset change the following:
1) adds clock properties to spi peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

2) disable, by default, the SSP0/SPI1 and SSP1/SPI2 shared pinout; shared pin should be enable in board specific dts, as needed.

3) enable SSP0 used by PHY3250.

Quoted 10 lines

Sylvain Lemieux (3):
arm: dts: lpc32xx: add clock properties to spi nodes
arm: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
arm: dts: phy3250: enable ssp0

 arch/arm/boot/dts/lpc32xx.dtsi | 16 ++++++++++++++
 arch/arm/boot/dts/phy3250.dts  |  1 +
 2 files changed, 15 insertions(+)
Quoted 5 lines

The patches look fine, but it's unclear what you want to happen with them as long as the maintainer situation is not resolved. I've seen patches from Vladimir and you recently, and none from Roland, so I think it would be good if one or both of you could officially step up to be maintainers and collect all patches to forward them to arm at kernel.org for inclusion.

Quoted 5 lines

for v4.5 and v4.6 I collected my own patches from LAKML after review, I started to do it for v4.7, but probably a bit later than desired.

Could you please remind me, when do ARM maintainers generally stop applying "for-next" pull requests?

There is no strict rule. We like to get patches as early as possible though, and if you send a lot of stuff late we may ask for it to be deferred until the following release.

If you have a lot of patches that go in early, it's more likely that later follow-on patches get merged too.

Arnd

#11 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

In reply to Vladimir Zapolskiy

Hi Vladimir and Arnd,

Quoted 6 lines · Vladimir Zapolskiy

Hi Arnd,

Quoted 3 lines · Arnd Bergmann
Quoted 2 lines · On Thursday 14 April 2016 08:20:34 slemieux.tyco at gmail.com wrote:

From: Sylvain Lemieux <[email protected]>

...

Quoted 10 lines
Quoted 6 lines
Quoted 1 line

The patches look fine, but it's unclear what you want to happen with them as long as the maintainer situation is not resolved. I've seen patches from Vladimir and you recently, and none from Roland, so I think it would be good if one or both of you could officially step up to be maintainers and collect all patches to forward them to arm at kernel.org for inclusion.

for v4.5 and v4.6 I collected my own patches from LAKML after review, I started to do it for v4.7, but probably a bit later than desired.

Vladimir, would it be possible for you to add my change, after review is done on LAKML, for the lpc32xx pull request you will do for 4.7?

Quoted 8 lines
Quoted 2 lines

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

I'll send a change on behalf of myself, at this point I don't think that pure lpc32xx maintenance (deliberately here I exclude development!) task takes more than 20 hours per month, which is affordable for me, Sylvain please express your view.

I can provide support for pure lpc32xx maintenance task (I also exclude development); I can free up to 10-15 hours a month for doing testing and patch review.

Is there any documentation available on the process to submit a merge request to the mailing list?

...

Quoted 7 lines
Quoted 3 lines

Arnd

--
With best wishes,
Vladimir

Sylvain

#12 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

Quoted 4 lines · On Monday 18 April 2016 17:22:28 Sylvain Lemieux wrote:
Quoted 3 lines · Vladimir Zapolskiy
Quoted 2 lines

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

Quoted 8 lines
Quoted 5 lines

I'll send a change on behalf of myself, at this point I don't think that pure lpc32xx maintenance (deliberately here I exclude development!) task takes more than 20 hours per month, which is affordable for me, Sylvain please express your view.

I can provide support for pure lpc32xx maintenance task (I also exclude development); I can free up to 10-15 hours a month for doing testing and patch review.

Thanks both of you!

Quoted 2 lines

Is there any documentation available on the process to submit a merge request to the mailing list?

We usually teach people on the fly, but you can watch my ELC presentation from last year at https://www.youtube.com/watch?v=msT1O8P6KXQ

Arnd

#13 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

Hi Vladimir,

Quoted 5 lines · Arnd Bergmann
Quoted 4 lines · On Monday 18 April 2016 17:22:28 Sylvain Lemieux wrote:
Quoted 3 lines · Vladimir Zapolskiy
Quoted 2 lines

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

Will you send a patch to update the MAINTAINERS file or do you want me to send it?

Should we add the lpc32xx dts to the list of supported file?

Quoted 11 lines
Quoted 8 lines
Quoted 5 lines

I'll send a change on behalf of myself, at this point I don't think that pure lpc32xx maintenance (deliberately here I exclude development!) task takes more than 20 hours per month, which is affordable for me, Sylvain please express your view.

I can provide support for pure lpc32xx maintenance task (I also exclude development); I can free up to 10-15 hours a month for doing testing and patch review.

Thanks both of you!

Quoted 7 lines
Quoted 2 lines

Is there any documentation available on the process to submit a merge request to the mailing list?

We usually teach people on the fly, but you can watch my ELC presentation from last year at https://www.youtube.com/watch?v=msT1O8P6KXQ

Arnd

Sylvain

#14 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

Hi Sylvain,

Quoted 10 lines · Sylvain Lemieux

Hi Vladimir,

Quoted 5 lines · Arnd Bergmann
Quoted 4 lines · On Monday 18 April 2016 17:22:28 Sylvain Lemieux wrote:
Quoted 3 lines · Vladimir Zapolskiy
Quoted 2 lines

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

Will you send a patch to update the MAINTAINERS file or do you want me to send it?

I'll send to change, you'll be included as a maintainer, the record also needs some other updates, e.g. it is not about machine support but about SoC support etc.

Arnd, I'm not sure if MAINTAINERS update should go though a pull request (= no explicit SoB from an ARM maintainer) or if you expect to get a patch and apply it yourself, please advise.

Quoted 2 lines

Should we add the lpc32xx dts to the list of supported file?

There is a possibility to add files by regex, which makes sense to do after renaming dts files - this is in my first priority todo list.

Quoted 14 lines
Quoted 14 lines
Quoted 8 lines
Quoted 5 lines

I'll send a change on behalf of myself, at this point I don't think that pure lpc32xx maintenance (deliberately here I exclude development!) task takes more than 20 hours per month, which is affordable for me, Sylvain please express your view.

I can provide support for pure lpc32xx maintenance task (I also exclude development); I can free up to 10-15 hours a month for doing testing and patch review.

Thanks both of you!

Quoted 2 lines

Is there any documentation available on the process to submit a merge request to the mailing list?

Quoted 6 lines
Quoted 4 lines

We usually teach people on the fly, but you can watch my ELC presentation from last year at https://www.youtube.com/watch?v=msT1O8P6KXQ

Arnd

Sylvain

--
With best wishes,
Vladimir

#15 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

Quoted 14 lines · On Thursday 21 April 2016 05:19:49 Vladimir Zapolskiy wrote:

Hi Sylvain,

Quoted 10 lines · Sylvain Lemieux

Hi Vladimir,

Quoted 5 lines · Arnd Bergmann
Quoted 4 lines · On Monday 18 April 2016 17:22:28 Sylvain Lemieux wrote:
Quoted 3 lines · Vladimir Zapolskiy
Quoted 2 lines

Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

Will you send a patch to update the MAINTAINERS file or do you want me to send it?

Quoted 7 lines

I'll send to change, you'll be included as a maintainer, the record also needs some other updates, e.g. it is not about machine support but about SoC support etc.

Arnd, I'm not sure if MAINTAINERS update should go though a pull request (= no explicit SoB from an ARM maintainer) or if you expect to get a patch and apply it yourself, please advise.

Either way works. We tend to group MAINTAINER file updates with bugfixes, so if you have any other fixes for 4.6 or 4.7, just throw it in the same pull request you send us, otherwise send a separate patch.

Quoted 5 lines
Quoted 2 lines

Should we add the lpc32xx dts to the list of supported file?

There is a possibility to add files by regex, which makes sense to do after renaming dts files - this is in my first priority todo list.

The order is not important here, it's fine with me if you want to add a regex for the new name even if the actual renaming is in a different branch.

Arnd

#16 lore raw

cover arm: dts: lpc32xx: update ssp / spi nodes

In reply to Sylvain Lemieux

Hi Sylvain,

Quoted 17 lines · Sylvain Lemieux

Hi Vladimir and Arnd,

Quoted 6 lines · Vladimir Zapolskiy

Hi Arnd,

Quoted 3 lines · Arnd Bergmann
Quoted 2 lines · On Thursday 14 April 2016 08:20:34 slemieux.tyco at gmail.com wrote:

From: Sylvain Lemieux <[email protected]>

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The patches look fine, but it's unclear what you want to happen with them as long as the maintainer situation is not resolved. I've seen patches from Vladimir and you recently, and none from Roland, so I think it would be good if one or both of you could officially step up to be maintainers and collect all patches to forward them to arm at kernel.org for inclusion.

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for v4.5 and v4.6 I collected my own patches from LAKML after review, I started to do it for v4.7, but probably a bit later than desired.

Vladimir, would it be possible for you to add my change, after review is done on LAKML, for the lpc32xx pull request you will do for 4.7?

definitely.

For your information I updated my tree https://github.com/vzapolskiy/linux.git
recently, for DTS changes you may want to rebase the changeset on top of lpc32xx/dt branch.

By the way I plan to rename board DTS files to match lpc32*-*.dts pattern, but I can postpone doing it until your changes are included.

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Once we have an agreement on who does this, please send a patch to update the MAINTAINERS file.

I'll send a change on behalf of myself, at this point I don't think that pure lpc32xx maintenance (deliberately here I exclude development!) task takes more than 20 hours per month, which is affordable for me, Sylvain please express your view.

I can provide support for pure lpc32xx maintenance task (I also exclude development); I can free up to 10-15 hours a month for doing testing and patch review.

Sounds good, thank you. Do you want to take over maintenance on v4.8 cycle?

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Is there any documentation available on the process to submit a merge request to the mailing list?

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As for me I thoroughly observe what other ARM SoC maintainers do, and ask questions if something remains uncertain.

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With best wishes,
Vladimir