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ARM: EXYNOS: set clock parents of registered clocks on power-on

PATCH New Vladimir Zapolskiy 2 participants 2 messages Apr 21, 2016 – Apr 22, 2016

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm Samsung Exynos
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Vladimir Zapolskiy

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PATCH 1/1 ARM: EXYNOS: set clock parents of registered clocks on power-on

If any of the clocks from stored on power down list are not registered by chance, on power-on the for-loop of reassigning the clock parents back from "oscclk" exits and the remaining clocks don't have a chance to restore an original parent clock.

Fixes 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off")
Signed-off-by Vladimir Zapolskiy <[email protected]>

---
Hi Krzysztof,

this is a functional and _untested_ change, but I hope it is okay, please review. Here "if (a) break; if (a) continue;" code is quite confusing.

 arch/arm/mach-exynos/pm_domains.c | 3 ---
 1 file changed, 3 deletions(-)
arch/arm/mach-exynos/pm_domains.c +0 -3
index 7c21760..6a9993e 100644
@@ -90,9 +90,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
 	if (power_on) {
 		for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
 			if (IS_ERR(pd->clk[i]))
-				break;
-
-			if (IS_ERR(pd->clk[i]))
 				continue; /* Skip on first power up */
 			if (clk_set_parent(pd->clk[i], pd->pclk[i]))
 				pr_err("%s: error setting parent to clock%d\n",
Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/1 ARM: EXYNOS: set clock parents of registered clocks on power-on

Quoted 22 lines · Vladimir Zapolskiy

If any of the clocks from stored on power down list are not registered by chance, on power-on the for-loop of reassigning the clock parents back from "oscclk" exits and the remaining clocks don't have a chance to restore an original parent clock.

Fixes 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off")
Signed-off-by Vladimir Zapolskiy <[email protected]>

---
Hi Krzysztof,

this is a functional and _untested_ change, but I hope it is okay, please review. Here "if (a) break; if (a) continue;" code is quite confusing.

 arch/arm/mach-exynos/pm_domains.c | 3 ---
 1 file changed, 3 deletions(-)
arch/arm/mach-exynos/pm_domains.c +0 -0
index 7c21760..6a9993e 100644

arch/arm/mach-exynos/pm_domains.c static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) · line 93

Quoted 7 lines
arch/arm/mach-exynos/pm_domains.c +0 -3
@@ -90,9 +90,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
 	if (power_on) {
 		for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
 			if (IS_ERR(pd->clk[i]))
-				break;
-
-			if (IS_ERR(pd->clk[i]))
 				continue; /* Skip on first power up */

Nice finding! It looks like my mistake during rebasing (automatic conflict resolution). Anyway I am pretty sure that idea was here to continue on pd->pclk (not clk) error.

I will confirm this and send appropriate patch with your reported-by.

Best regards,
Krzysztof