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imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5

PATCH New Eric Nelson 3 participants 3 messages Apr 24, 2016 – May 9, 2016 Arm (32-bit)

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Eric Nelson

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#0 lore raw

PATCH 1/1 imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5

This patch adds the IOMUX setting for using SD1_DAT5 as GPIO5:9.

Signed-off-by Eric Nelson <[email protected]>
---
 arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 1 +
 1 file changed, 1 insertion(+)
arch/arm/include/asm/arch-mx6/mx6sl_pins.h +1 -0
index 6ba1034..919d83d 100644
@@ -22,6 +22,7 @@ enum {
 	MX6_PAD_SD1_DAT3__USDHC1_DAT3				= IOMUX_PAD(0x0548, 0x0240, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT4__USDHC1_DAT4				= IOMUX_PAD(0x054C, 0x0244, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT5__USDHC1_DAT5				= IOMUX_PAD(0x0550, 0x0248, 0, 0x0000, 0, 0),
+	MX6_PAD_SD1_DAT5__GPIO_5_9				= IOMUX_PAD(0x0550, 0x0248, 5, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT6__USDHC1_DAT6				= IOMUX_PAD(0x0554, 0x024C, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT7__USDHC1_DAT7				= IOMUX_PAD(0x0558, 0x0250, 0, 0x0000, 0, 0),
 	MX6_PAD_KEY_ROW7__GPIO_4_7					= IOMUX_PAD(0x04B0, 0x01A8, 5, 0x0000, 0, 0),
Signature · 1 line
2.6.2
#1 lore raw

PATCH 1/1 imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5

Hi Eric,

Quoted 3 lines · Eric Nelson

This patch adds the IOMUX setting for using SD1_DAT5 as GPIO5:9.

Signed-off-by Eric Nelson <[email protected]>
Reviewed-by Peng Fan <[email protected]>

Regards,
Peng.

Quoted 23 lines

---
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 1 +

1 file changed, 1 insertion(+)
arch/arm/include/asm/arch-mx6/mx6sl_pins.h +1 -0
index 6ba1034..919d83d 100644
@@ -22,6 +22,7 @@ enum {
 	MX6_PAD_SD1_DAT3__USDHC1_DAT3				= IOMUX_PAD(0x0548, 0x0240, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT4__USDHC1_DAT4				= IOMUX_PAD(0x054C, 0x0244, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT5__USDHC1_DAT5				= IOMUX_PAD(0x0550, 0x0248, 0, 0x0000, 0, 0),
+	MX6_PAD_SD1_DAT5__GPIO_5_9				= IOMUX_PAD(0x0550, 0x0248, 5, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT6__USDHC1_DAT6				= IOMUX_PAD(0x0554, 0x024C, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT7__USDHC1_DAT7				= IOMUX_PAD(0x0558, 0x0250, 0, 0x0000, 0, 0),
 	MX6_PAD_KEY_ROW7__GPIO_4_7					= IOMUX_PAD(0x04B0, 0x01A8, 5, 0x0000, 0, 0),
Signature · 6 lines
2.6.2

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Applied
#2 lore raw

PATCH 1/1 imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5

In reply to Eric Nelson
Quoted 13 lines · Eric Nelson

This patch adds the IOMUX setting for using SD1_DAT5 as GPIO5:9.

Signed-off-by Eric Nelson <[email protected]>
---
 arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 1 +
 1 file changed, 1 insertion(+)
arch/arm/include/asm/arch-mx6/mx6sl_pins.h +0 -0
index 6ba1034..919d83d 100644

arch/arm/include/asm/arch-mx6/mx6sl_pins.h enum { · line 28

Quoted 7 lines
arch/arm/include/asm/arch-mx6/mx6sl_pins.h +1 -0
@@ -22,6 +22,7 @@ enum {
 	MX6_PAD_SD1_DAT3__USDHC1_DAT3				= IOMUX_PAD(0x0548, 0x0240, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT4__USDHC1_DAT4				= IOMUX_PAD(0x054C, 0x0244, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT5__USDHC1_DAT5				= IOMUX_PAD(0x0550, 0x0248, 0, 0x0000, 0, 0),
+	MX6_PAD_SD1_DAT5__GPIO_5_9				= IOMUX_PAD(0x0550, 0x0248, 5, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT6__USDHC1_DAT6				= IOMUX_PAD(0x0554, 0x024C, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT7__USDHC1_DAT7				= IOMUX_PAD(0x0558, 0x0250, 0, 0x0000, 0, 0),
 	MX6_PAD_KEY_ROW7__GPIO_4_7					= IOMUX_PAD(0x04B0, 0x01A8, 5, 0x0000, 0, 0),

Applied to -next, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
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