imx: imx7d: fix ahb clock mux 1
PATCH 1/1 imx: imx7d: fix ahb clock mux 1
The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual.
While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2).
---
I sent a similar fix to the LKML which has been merged some days ago:
https://lkml.org/lkml/2016/4/28/767
--
Stefan
arch/arm/cpu/armv7/mx7/clock_slice.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/cpu/armv7/mx7/clock_slice.c +1 -1
@@ -55,7 +55,7 @@ static struct clk_root_map root_array[] = { PLL_ENET_MAIN_250M_CLK, PLL_AUDIO_MAIN_CLK} }, {AHB_CLK_ROOT ,CCM_AHB_CHANNEL , - {OSC_24M_CLK, PLL_SYS_PFD2_135M_CLK, PLL_DRAM_MAIN_533M_CLK, + {OSC_24M_CLK, PLL_SYS_PFD2_270M_CLK, PLL_DRAM_MAIN_533M_CLK,PLL_SYS_PFD0_392M_CLK ,PLL_ENET_MAIN_125M_CLK ,PLL_USB_MAIN_480M_CLK , PLL_AUDIO_MAIN_CLK, PLL_VIDEO_MAIN_CLK} },
Signature · 1 line
2.8.2
Stefano Babic
AppliedPATCH 1/1 imx: imx7d: fix ahb clock mux 1
Quoted 10 lines · Stefan Agner
The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual.
While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a
POST_PODFvalue of 1 (=> divider of 2).
Quoted 5 lines
Signed-off-by Stefan Agner <[email protected]>---
I sent a similar fix to the LKML which has been merged some days ago:
https://lkml.org/lkml/2016/4/28/767
Thanks for porting this to U-Boot, too.
Quoted 13 lines
--
Stefanarch/arm/cpu/armv7/mx7/clock_slice.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/cpu/armv7/mx7/clock_slice.c +0
-0
arch/arm/cpu/armv7/mx7/clock_slice.c static struct clk_root_map root_array[] = { · line 61
Quoted 8 lines
arch/arm/cpu/armv7/mx7/clock_slice.c +1
-1@@ -55,7 +55,7 @@ static struct clk_root_map root_array[] = { PLL_ENET_MAIN_250M_CLK, PLL_AUDIO_MAIN_CLK} }, {AHB_CLK_ROOT ,CCM_AHB_CHANNEL , - {OSC_24M_CLK, PLL_SYS_PFD2_135M_CLK, PLL_DRAM_MAIN_533M_CLK, + {OSC_24M_CLK, PLL_SYS_PFD2_270M_CLK, PLL_DRAM_MAIN_533M_CLK,PLL_SYS_PFD0_392M_CLK ,PLL_ENET_MAIN_125M_CLK ,PLL_USB_MAIN_480M_CLK , PLL_AUDIO_MAIN_CLK, PLL_VIDEO_MAIN_CLK} },
Applied to -next, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================