armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

PATCH Superseded Zhiqiang Hou 2 participants 13 messages Apr 27, 2016 – May 24, 2016 Arm (32-bit)

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Zhiqiang Hou

author

2016-04-27 13:39 UTC #0 lore raw

PATCH v3 1/7 armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

From: Hou Zhiqiang <[email protected]>

This function assume that the d-cache and MMU has been enabled earlier, so it just created MMU table in main memory. But the assumption is not always correct, for example, the early setup is done in EL3, while enable_caches() is called when the PE has turned into another EL.

Define the function mmu_setup() for fsl-layerscape to cover the weak one.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- no change

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

arch/arm/cpu/armv8/fsl-layerscape/cpu.c +10 -4

index d939900..672a453 100644
@@ -425,15 +425,21 @@ int arch_cpu_init(void)
 	return 0;
 }
 
+void mmu_setup(void)
+{
+	final_mmu_setup();
+}
+
 /*
- * This function is called from lib/board.c.
- * It recreates MMU table in main memory. MMU and d-cache are enabled earlier.
- * There is no need to disable d-cache for this operation.
+ * This function is called from common/board_r.c.
+ * It recreates MMU table in main memory.
  */
 void enable_caches(void)
 {
-	final_mmu_setup();
+	mmu_setup();
 	__asm_invalidate_tlb_all();
+	icache_enable();
+	dcache_enable();
 }
 #endif

Signature · 1 line

2.1.0.27.g96db324

Zhiqiang Hou

author

2016-04-27 13:39 UTC #1 lore raw

PATCH v3 2/7 ARMv8/layerscape: Add FSL PPA support

From: Hou Zhiqiang <[email protected]>

The FSL Primary Protected Application (PPA) is a software component loaded during boot which runs in TrustZone and remains resident after boot.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- Refactor the code.
- Add secure firmware validation API
- Add secure firmware getting supported PSCI version API
- Add PPA firmware version info output.

 arch/arm/cpu/armv8/fsl-layerscape/Makefile     |   1 +
 arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 242 +++++++++++++++++++++++++
 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S  |  42 +++++
 arch/arm/include/asm/arch-fsl-layerscape/ppa.h |  15 ++
 4 files changed, 300 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h

arch/arm/cpu/armv8/fsl-layerscape/Makefile +1 -0

index 5f86ef9..1535fee 100644
@@ -10,6 +10,7 @@ obj-y += soc.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_SPL) += spl.o
+obj-$(CONFIG_FSL_LS_PPA) += ppa.o ppa_entry.o
 
 ifneq ($(CONFIG_FSL_LSCH3),)
 obj-y += fsl_lsch3_speed.o

arch/arm/cpu/armv8/fsl-layerscape/ppa.c new file +242 -0

242 lines not on this page · raw message

arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S new file +42 -0

42 lines not on this page · raw message

arch/arm/include/asm/arch-fsl-layerscape/ppa.h new file +15 -0

new file mode 100644
index 0000000..f0f0d10
@@ -0,0 +1,15 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FSL_PPA_H_
+#define __FSL_PPA_H_
+
+int ppa_init_pre(u64 *);
+int ppa_init_entry(void *);
+int ppa_init(void *, u32*, u32*);
+unsigned long ppa_get_dram_block_size(void);
+
+#endif

Signature · 1 line

2.1.0.27.g96db324

Zhiqiang Hou

author

2016-04-27 13:39 UTC #2 lore raw

PATCH v3 3/7 ARMv8/ls1043ardb: Integrate FSL PPA

In reply to Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- no change

 board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
 include/configs/ls1043ardb.h            |  9 +++++++++
 2 files changed, 20 insertions(+)

board/freescale/ls1043ardb/ls1043ardb.c +11 -0

index ec5fdbf..5f0a8e7 100644
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
 #include <asm/arch/soc.h>
 #include <fdt_support.h>
 #include <hwconfig.h>

@@ -84,6 +85,9 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+#ifdef CONFIG_FSL_LS_PPA
+	u64 ppa_entry;
+#endif
 
 	/*
 	 * Set CCI-400 control override register to enable barrier

@@ -103,6 +107,13 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init_pre(&ppa_entry);
+
+	if (ppa_entry)
+		ppa_init_entry((void *)ppa_entry);
+#endif
+
 #ifdef CONFIG_U_QE
 	u_qe_init();
 #endif

include/configs/ls1043ardb.h +9 -0

index 6d35be2..4d22b63 100644
@@ -9,6 +9,15 @@
 
 #include "ls1043a_common.h"
 
+#if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE		(1UL * 1024 * 1024)
+
+#define CONFIG_SYS_LS_PPA_FW_IN_NOR
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+#define	CONFIG_SYS_LS_PPA_FW_ADDR	0x60500000
+#endif
+#endif
+
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

Signature · 1 line

2.1.0.27.g96db324

York Sun

2016-05-10 19:48 UTC #3 lore raw

PATCH v3 3/7 ARMv8/ls1043ardb: Integrate FSL PPA

Quoted 34 lines · Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- no change

 board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
 include/configs/ls1043ardb.h            |  9 +++++++++
 2 files changed, 20 insertions(+)

board/freescale/ls1043ardb/ls1043ardb.c +4 -0

index ec5fdbf..5f0a8e7 100644
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
 #include <asm/arch/soc.h>
 #include <fdt_support.h>
 #include <hwconfig.h>

@@ -84,6 +85,9 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+#ifdef CONFIG_FSL_LS_PPA
+	u64 ppa_entry;
+#endif
 
 	/*
 	 * Set CCI-400 control override register to enable barrier

board/freescale/ls1043ardb/ls1043ardb.c int board_init(void) · line 114

Quoted 8 lines

board/freescale/ls1043ardb/ls1043ardb.c +5 -0

@@ -103,6 +107,13 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init_pre(&ppa_entry);
+
+	if (ppa_entry)
+		ppa_init_entry((void *)ppa_entry);

ppa_init_pre() returns the error code. Why don't you use the return value here?

York

Zhiqiang Hou

author

2016-05-18 07:37 UTC #4 lore raw

PATCH v3 3/7 ARMv8/ls1043ardb: Integrate FSL PPA

Hi York,

Thanks for your comments and sorry for my delay response due to PTO.

Quoted 49 lines

-----Original Message-----
From: York Sun [mailto:york.sun at nxp.com]
Sent: 2016?5?11? 3:48
To: Zhiqiang Hou <[email protected]>; u-boot at lists.denx.de; albert.u.boot at aribaud.net; scottwood at freescale.com; Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com; prabhakar at freescale.com; bhupesh.sharma at freescale.com
Cc: Hou Zhiqiang <[email protected]>
Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
Quoted 38 lines · Zhiqiang Hou
From: Hou Zhiqiang <[email protected]>
Signed-off-by Hou Zhiqiang <[email protected]>
---
V3:
- no change
 board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
 include/configs/ls1043ardb.h            |  9 +++++++++
 2 files changed, 20 insertions(+)
board/freescale/ls1043ardb/ls1043ardb.c +5 -0
index ec5fdbf..5f0a8e7 100644
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
 #include <asm/arch/soc.h>
 #include <fdt_support.h>
 #include <hwconfig.h>
@@ -84,6 +85,9 @@ int board_early_init_f(void)  int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400
 *)CONFIG_SYS_CCI400_ADDR;
+#ifdef CONFIG_FSL_LS_PPA
+	u64 ppa_entry;
+#endif
 
 	/*
 	 * Set CCI-400 control override register to enable barrier @@ -103,6
+107,13 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif

Quoted 7 lines

board/freescale/ls1043ardb/ls1043ardb.c int board_init(void) · line 114
Quoted 5 lines
board/freescale/ls1043ardb/ls1043ardb.c +5 -0
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init_pre(&ppa_entry);
+
+	if (ppa_entry)
+		ppa_init_entry((void *)ppa_entry);
ppa_init_pre() returns the error code. Why don't you use the return value here?

The function ppa_init_pre() will set the ppa_entry to 0x0 if any error occurred.

Thanks,
Zhiqiang

York Sun

2016-05-18 15:16 UTC #5 lore raw

PATCH v3 3/7 ARMv8/ls1043ardb: Integrate FSL PPA

Quoted 61 lines · Zhiqiang Hou

Hi York,
Thanks for your comments and sorry for my delay response due to PTO.
Quoted 49 lines
-----Original Message-----
From: York Sun [mailto:york.sun at nxp.com]
Sent: 2016?5?11? 3:48
To: Zhiqiang Hou <[email protected]>; u-boot at lists.denx.de; albert.u.boot at aribaud.net; scottwood at freescale.com; Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com; prabhakar at freescale.com; bhupesh.sharma at freescale.com
Cc: Hou Zhiqiang <[email protected]>
Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
Quoted 38 lines · Zhiqiang Hou
From: Hou Zhiqiang <[email protected]>
Signed-off-by Hou Zhiqiang <[email protected]>
---
V3:
- no change
 board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
 include/configs/ls1043ardb.h            |  9 +++++++++
 2 files changed, 20 insertions(+)
board/freescale/ls1043ardb/ls1043ardb.c +5 -0
index ec5fdbf..5f0a8e7 100644
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
 #include <asm/arch/soc.h>
 #include <fdt_support.h>
 #include <hwconfig.h>
@@ -84,6 +85,9 @@ int board_early_init_f(void)  int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400
 *)CONFIG_SYS_CCI400_ADDR;
+#ifdef CONFIG_FSL_LS_PPA
+	u64 ppa_entry;
+#endif
 
 	/*
 	 * Set CCI-400 control override register to enable barrier @@ -103,6
+107,13 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
Quoted 7 lines
board/freescale/ls1043ardb/ls1043ardb.c int board_init(void) · line 114
Quoted 5 lines
board/freescale/ls1043ardb/ls1043ardb.c +5 -0
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init_pre(&ppa_entry);
+
+	if (ppa_entry)
+		ppa_init_entry((void *)ppa_entry);
ppa_init_pre() returns the error code. Why don't you use the return value here?

Quoted 2 lines

The function ppa_init_pre() will set the ppa_entry to 0x0 if any error occurred.

Understood. My suggestion is to use the return error code if the function has it, unless you have a good reason not to. Please add comment to explain for future maintenance.

York

Zhiqiang Hou

author

2016-05-24 02:22 UTC #6 lore raw

PATCH v3 3/7 ARMv8/ls1043ardb: Integrate FSL PPA

Hi York,

Thanks for your comments!

Quoted 73 lines

-----Original Message-----
From: York Sun [mailto:york.sun at nxp.com]
Sent: 2016?5?18? 23:16
To: Zhiqiang Hou <[email protected]>
Cc: u-boot at lists.denx.de; albert.u.boot at aribaud.net; Scott Wood <[email protected]>; Mingkai.hu at freescale.com; leoli at freescale.com; prabhakar at freescale.com; bhupesh.sharma at freescale.com; Hou Zhiqiang <[email protected]>
Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
Quoted 62 lines · Zhiqiang Hou
Hi York,
Thanks for your comments and sorry for my delay response due to PTO.
Quoted 57 lines
-----Original Message-----
From: York Sun [mailto:york.sun at nxp.com]
Sent: 2016?5?11? 3:48
To: Zhiqiang Hou <[email protected]>; u-boot at lists.denx.de; albert.u.boot at aribaud.net; scottwood at freescale.com; Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com; prabhakar at freescale.com; bhupesh.sharma at freescale.com
Cc: Hou Zhiqiang <[email protected]>
Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
Quoted 34 lines · Zhiqiang Hou
From: Hou Zhiqiang <[email protected]>
Signed-off-by Hou Zhiqiang <[email protected]>
---
V3:
- no change
 board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
 include/configs/ls1043ardb.h            |  9 +++++++++
 2 files changed, 20 insertions(+)
board/freescale/ls1043ardb/ls1043ardb.c +4 -0
index ec5fdbf..5f0a8e7 100644
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
 #include <asm/arch/soc.h>
 #include <fdt_support.h>
 #include <hwconfig.h>
@@ -84,6 +85,9 @@ int board_early_init_f(void)  int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400
 *)CONFIG_SYS_CCI400_ADDR;
+#ifdef CONFIG_FSL_LS_PPA
+	u64 ppa_entry;
+#endif
 
 	/*
 	 * Set CCI-400 control override register to enable barrier @@
board/freescale/ls1043ardb/ls1043ardb.c int board_early_init_f(void) int board_init(void)
Quoted 10 lines
board/freescale/ls1043ardb/ls1043ardb.c +6 -1
-103,6
+107,13 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init_pre(&ppa_entry);
+
+	if (ppa_entry)
+		ppa_init_entry((void *)ppa_entry);
ppa_init_pre() returns the error code. Why don't you use the return value here?

Quoted 6 lines

Quoted 2 lines
The function ppa_init_pre() will set the ppa_entry to 0x0 if any error occurred.
Understood. My suggestion is to use the return error code if the function has it, unless you have a good reason not to. Please add comment to explain for future maintenance.

Added the operation to check the return value. I have refactored the patchset and reordered the sequence of the patches in version 4.

Thanks,
Zhiqiang

Zhiqiang Hou

author

2016-04-27 13:39 UTC #7 lore raw

PATCH v3 4/7 ARMv8: add the sec_firmware header file

In reply to Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

The sec_firmware.h is a common header file for secure monitor firmware under ARMv8. The common API can be added to this file, and added APIs for secure firmware validation and getting supported PSCI version.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- new patch

 arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 27 +++++++++++++++++++++++++-
 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S  | 11 +++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/ppa.h |  1 +
 arch/arm/include/asm/armv8/sec_firmware.h      | 19 ++++++++++++++++++
 4 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/armv8/sec_firmware.h

arch/arm/cpu/armv8/fsl-layerscape/ppa.c +26 -1

index aa71212..3cd4d00 100644
@@ -17,7 +17,7 @@
 #elif defined(CONFIG_FSL_LSCH2)
 #include <asm/arch/immap_lsch2.h>
 #endif
-#include <asm/arch/ppa.h>
+#include <asm/armv8/sec_firmware.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -161,6 +161,31 @@ static int ppa_copy_image(const char *title,
 	return 0;
 }
 
+int sec_firmware_validate(void)
+{
+	void *ppa_addr;
+
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+	ppa_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
+#else
+#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
+#endif
+
+	return ppa_firmware_validate(ppa_addr);
+}
+
+#ifdef CONFIG_ARMV8_PSCI
+unsigned int sec_firmware_support_psci_version(void)
+{
+	unsigned int psci_ver = 0;
+
+	if (!sec_firmware_validate())
+		psci_ver = ppa_support_psci_version();
+
+	return psci_ver;
+}
+#endif
+
 int ppa_init_pre(u64 *entry)
 {
 	u64 ppa_ram_addr;

arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S +11 -0

index 3a3bb64..1f5577b 100644
@@ -40,3 +40,14 @@ ENTRY(ppa_init)
         mov	x0, #0
         ret
 ENDPROC(ppa_init)
+
+#ifdef CONFIG_ARMV8_PSCI
+ENTRY(ppa_support_psci_version)
+	mov	x0, 0x84000000
+	mov	x1, 0x0
+	mov	x2, 0x0
+	mov	x3, 0x0
+	smc	#0
+	ret
+ENDPROC(ppa_support_psci_version)
+#endif

arch/arm/include/asm/arch-fsl-layerscape/ppa.h +1 -0

index f0f0d10..7b13d56 100644
@@ -11,5 +11,6 @@ int ppa_init_pre(u64 *);
 int ppa_init_entry(void *);
 int ppa_init(void *, u32*, u32*);
 unsigned long ppa_get_dram_block_size(void);
+unsigned int ppa_support_psci_version(void);
 
 #endif

arch/arm/include/asm/armv8/sec_firmware.h new file +19 -0

new file mode 100644
index 0000000..a54a599
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __SEC_FIRMWARE_H_
+#define __SEC_FIRMWARE_H_
+
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/arch/ppa.h>
+#endif
+
+#ifdef CONFIG_ARMV8_PSCI
+unsigned int sec_firmware_support_psci_version(void);
+#endif
+int sec_firmware_validate(void);
+
+#endif /* __SEC_FIRMWARE_H_ */

Signature · 1 line

2.1.0.27.g96db324

Zhiqiang Hou

author

2016-04-27 13:39 UTC #8 lore raw

PATCH v3 5/7 ARMv8/PSCI: Fixup the device tree for PSCI

In reply to Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

Set the enable-method in the cpu node to PSCI, and reate device node for PSCI.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- new patch

 arch/arm/cpu/armv8/Makefile |   1 +
 arch/arm/cpu/armv8/cpu-dt.c | 126 ++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/lib/bootm-fdt.c    |   2 +-
 3 files changed, 128 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv8/cpu-dt.c

arch/arm/cpu/armv8/Makefile +1 -0

index 1c85aa9..a295e37 100644
@@ -15,6 +15,7 @@ obj-y	+= cache.o
 obj-y	+= tlb.o
 obj-y	+= transition.o
 obj-y	+= fwcall.o
+obj-y	+= cpu-dt.o
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
 obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/

arch/arm/cpu/armv8/cpu-dt.c new file +126 -0

126 lines not on this page · raw message

arch/arm/lib/bootm-fdt.c +1 -1

index 7677358..c642ff8 100644
@@ -42,7 +42,7 @@ int arch_fixup_fdt(void *blob)
 	}
 
 	ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-#ifdef CONFIG_ARMV7_NONSEC
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI)
 	if (ret)
 		return ret;

Signature · 1 line

2.1.0.27.g96db324

Zhiqiang Hou

author

2016-04-27 13:39 UTC #9 lore raw

PATCH v3 6/7 ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

In reply to Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

If the PSCI and PPA is ready, skip the fixup for spin-table and waking secondary cores. If not, change SMP method to spin-table, and the device node of PSCI will be removed.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- new patch

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31 +++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 3 deletions(-)

arch/arm/cpu/armv8/fsl-layerscape/cpu.c +11 -3

index 672a453..937f7ec 100644
@@ -23,6 +23,9 @@
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -625,9 +628,14 @@ int arch_early_init_r(void)
 #endif
 
 #ifdef CONFIG_MP
-	rv = fsl_layerscape_wake_seconday_cores();
-	if (rv)
-		printf("Did not wake secondary cores\n");
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate())
+#endif
+	{
+		rv = fsl_layerscape_wake_seconday_cores();
+		if (rv)
+			printf("Did not wake secondary cores\n");
+	}
 #endif
 
 #ifdef CONFIG_SYS_HAS_SERDES

arch/arm/cpu/armv8/fsl-layerscape/fdt.c +31 -0

index 1e875c4..333b973 100644
@@ -20,6 +20,9 @@
 #ifdef CONFIG_MP
 #include <asm/arch/mp.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {

@@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)
 	int addr_cells;
 	u64 val, core_id;
 	size_t *boot_code_size = &(__secondary_boot_code_size);
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	int node;
+#endif
+
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate()) {
+		/* remove psci DT node */
+		node = fdt_path_offset(blob, "/psci");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
+		if (node >= 0)
+			goto remove_psci_node;
 
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
+		if (node >= 0)
+			goto remove_psci_node;
+
+remove_psci_node:
+		if (node >= 0)
+			fdt_del_node(blob, node);
+	} else
+		return;
+#endif
 	off = fdt_path_offset(blob, "/cpus");
 	if (off < 0) {
 		puts("couldn't find /cpus node\n");

Signature · 1 line

2.1.0.27.g96db324

York Sun

2016-05-10 19:58 UTC #10 lore raw

PATCH v3 6/7 ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

Quoted 88 lines · Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

If the PSCI and PPA is ready, skip the fixup for spin-table and waking secondary cores. If not, change SMP method to spin-table, and the device node of PSCI will be removed.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- new patch

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31 +++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 3 deletions(-)

arch/arm/cpu/armv8/fsl-layerscape/cpu.c +11 -3

index 672a453..937f7ec 100644
@@ -23,6 +23,9 @@
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -625,9 +628,14 @@ int arch_early_init_r(void)
 #endif
 
 #ifdef CONFIG_MP
-	rv = fsl_layerscape_wake_seconday_cores();
-	if (rv)
-		printf("Did not wake secondary cores\n");
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate())
+#endif
+	{
+		rv = fsl_layerscape_wake_seconday_cores();
+		if (rv)
+			printf("Did not wake secondary cores\n");
+	}
 #endif
 
 #ifdef CONFIG_SYS_HAS_SERDES

arch/arm/cpu/armv8/fsl-layerscape/fdt.c +24 -0

index 1e875c4..333b973 100644
@@ -20,6 +20,9 @@
 #ifdef CONFIG_MP
 #include <asm/arch/mp.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {

@@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)
 	int addr_cells;
 	u64 val, core_id;
 	size_t *boot_code_size = &(__secondary_boot_code_size);
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	int node;
+#endif
+
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate()) {
+		/* remove psci DT node */
+		node = fdt_path_offset(blob, "/psci");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
+		if (node >= 0)
+			goto remove_psci_node;
 
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
+		if (node >= 0)
+			goto remove_psci_node;

arch/arm/cpu/armv8/fsl-layerscape/fdt.c void ft_fixup_cpu(void *blob) · line 73

Quoted 10 lines

arch/arm/cpu/armv8/fsl-layerscape/fdt.c +7 -0

+
+remove_psci_node:
+		if (node >= 0)
+			fdt_del_node(blob, node);
+	} else
+		return;
+#endif
 	off = fdt_path_offset(blob, "/cpus");
 	if (off < 0) {
 		puts("couldn't find /cpus node\n");

Zhiqiang,

I think your patch sequence and logic is backward. To make the transition smoothly, we need to make sure U-Boot always works. You can introduce PPA with PSCI support. After each patch applied, U-Boot should still work. I suggest you to check if PPA/PSCI is available before fixing up device tree. You can also switch to PSCI to boot secondary cores by then.

York

Zhiqiang Hou

author

2016-05-19 02:35 UTC #11 lore raw

PATCH v3 6/7 ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

Hi York,

Thanks a lot for your comments!

Quoted 114 lines

-----Original Message-----
From: York Sun [mailto:york.sun at nxp.com]
Sent: 2016?5?11? 3:58
To: Zhiqiang Hou <[email protected]>; u-boot at lists.denx.de; albert.u.boot at aribaud.net; scottwood at freescale.com; Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com; prabhakar at freescale.com; bhupesh.sharma at freescale.com
Subject: Re: [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

Quoted 89 lines · Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

If the PSCI and PPA is ready, skip the fixup for spin-table and waking secondary cores. If not, change SMP method to spin-table, and the device node of PSCI will be removed.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- new patch

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31
+++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 3 deletions(-)

arch/arm/cpu/armv8/fsl-layerscape/cpu.c +11 -3

index 672a453..937f7ec 100644
@@ -23,6 +23,9 @@
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -625,9 +628,14 @@ int arch_early_init_r(void)  #endif
 
 #ifdef CONFIG_MP
-	rv = fsl_layerscape_wake_seconday_cores();
-	if (rv)
-		printf("Did not wake secondary cores\n");
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate())
+#endif
+	{
+		rv = fsl_layerscape_wake_seconday_cores();
+		if (rv)
+			printf("Did not wake secondary cores\n");
+	}
 #endif
 
 #ifdef CONFIG_SYS_HAS_SERDES

arch/arm/cpu/armv8/fsl-layerscape/fdt.c +3 -0

index 1e875c4..333b973 100644
@@ -20,6 +20,9 @@
 #ifdef CONFIG_MP
 #include <asm/arch/mp.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t
 phyc)  { @@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)

arch/arm/cpu/armv8/fsl-layerscape/fdt.c +21 -0

 	int addr_cells;
 	u64 val, core_id;
 	size_t *boot_code_size = &(__secondary_boot_code_size);
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	int node;
+#endif
+
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate()) {
+		/* remove psci DT node */
+		node = fdt_path_offset(blob, "/psci");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
+		if (node >= 0)
+			goto remove_psci_node;
 
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
+		if (node >= 0)
+			goto remove_psci_node;

arch/arm/cpu/armv8/fsl-layerscape/fdt.c void ft_fixup_cpu(void *blob) · line 73

Quoted 10 lines

arch/arm/cpu/armv8/fsl-layerscape/fdt.c +7 -0

+
+remove_psci_node:
+		if (node >= 0)
+			fdt_del_node(blob, node);
+	} else
+		return;
+#endif
 	off = fdt_path_offset(blob, "/cpus");
 	if (off < 0) {
 		puts("couldn't find /cpus node\n");

Zhiqiang,

Quoted 5 lines

I think your patch sequence and logic is backward. To make the transition smoothly, we need to make sure U-Boot always works. You can introduce PPA with PSCI support. After each patch applied, U-Boot should still work. I suggest you to check if PPA/PSCI is available before fixing up device tree. You can also switch to PSCI to boot secondary cores by then.

Yes, will refactor the patchset according to your suggestion.

Thanks,
Zhiqiang

Zhiqiang Hou

author

2016-04-27 13:39 UTC #12 lore raw

PATCH v3 7/7 ARMv8/ls1043ardb: add the CONFIG_ARMV8_PSCI when PPA is enabled

In reply to Zhiqiang Hou

From: Hou Zhiqiang <[email protected]>

So far, the PPA use PSCI to make secondary cores bootup. Add this macro to identify the SMP boot-method between PSCI and spin-table.

Signed-off-by Hou Zhiqiang <[email protected]>

---
V3:
- no change

 include/configs/ls1043ardb.h | 1 +
 1 file changed, 1 insertion(+)

include/configs/ls1043ardb.h +1 -0

index 4d22b63..c7869a5 100644
@@ -10,6 +10,7 @@
 #include "ls1043a_common.h"
 
 #if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_ARMV8_PSCI
 #define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE		(1UL * 1024 * 1024)
 
 #define CONFIG_SYS_LS_PPA_FW_IN_NOR

Signature · 1 line

2.1.0.27.g96db324