usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

If xhci.h is included without include/usb.h, the compiler complains like follows:
warning: 'struct devrequest' declared inside parameter list

Teach the compiler that devrequest is a structure. I found no reason include include/usb.h from xhci.h.

Signed-off-by Masahiro Yamada <[email protected]>

---

 drivers/usb/host/xhci.h | 2 ++
 1 file changed, 2 insertions(+)

drivers/usb/host/xhci.h +2 -0

index 2afa386..16dd61a 100644
@@ -1252,6 +1252,8 @@ void xhci_acknowledge_event(struct xhci_ctrl *ctrl);
 union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected);
 int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,
 		 int length, void *buffer);
+
+struct devrequest;
 int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,
 		 struct devrequest *req, int length, void *buffer);
 int xhci_check_maxpacket(struct usb_device *udev);

Synopsys DWC3 IP generally works with an SoC-specific glue layer. DT binding for that is like this:

  usb3_glue {
          compatible = "foo,dwc3";
          ...

          usb3: usb3 {
                  compatible = "snps,dwc3";
                  ...
          };

};

The glue layer initializes some SoC-specific parts, then populates the child DWC3 core. To see how it works, refer to

drivers/usb/dwc3/dwc3-exynos.c
drivers/usb/dwc3/dwc3-keystone.c
drivers/usb/dwc3/dwc3-omap.c
drivers/usb/dwc3/dwc3-st.c

of Linux Kernel.

This commit implements a driver for "snps,dwc3", which allows to use the same binding in U-Boot. The glue layer can be simply implemented based on Simple Bus Uclass.

Signed-off-by Masahiro Yamada <[email protected]>

---

 drivers/usb/host/xhci-dwc3.c | 71 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 70 insertions(+), 1 deletion(-)

drivers/usb/host/xhci-dwc3.c +70 -1

index 33961cd..c7c8324 100644
@@ -9,8 +9,13 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <dm/device.h>
+#include <mapmem.h>
+#include <linux/io.h>
 #include <linux/usb/dwc3.h>
+#include <linux/sizes.h>
+
+#include "xhci.h"
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
 {

@@ -97,3 +102,67 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 	setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
 			GFLADJ_30MHZ(val));
 }
+
+struct dwc3_priv {
+	struct xhci_ctrl ctrl;	/* should be the first member */
+	void __iomem *regs;
+};
+
+static int dwc3_probe(struct udevice *dev)
+{
+	struct dwc3_priv *priv = dev_get_priv(dev);
+	struct xhci_hccr *hccr;
+	struct xhci_hcor *hcor;
+	fdt_addr_t base;
+	int ret;
+
+	base = dev_get_addr(dev);
+	if (base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = map_sysmem(base, SZ_32K);
+	if (!priv->regs)
+		return -ENOMEM;
+
+	hccr = priv->regs;
+
+	hcor = priv->regs + HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+
+	ret = dwc3_core_init(priv->regs + DWC3_REG_OFFSET);
+	if (ret) {
+		puts("XHCI: failed to initialize controller\n");
+		return ret;
+	}
+
+	/* We are hard-coding DWC3 core to Host Mode */
+	dwc3_set_mode(priv->regs + DWC3_REG_OFFSET, DWC3_GCTL_PRTCAP_HOST);
+
+	return xhci_register(dev, hccr, hcor);
+}
+
+static int dwc3_remove(struct udevice *dev)
+{
+	struct dwc3_priv *priv = dev_get_priv(dev);
+
+	xhci_deregister(dev);
+	unmap_sysmem(priv->regs);
+
+	return 0;
+}
+
+static const struct udevice_id of_dwc3_match[] = {
+	{ .compatible = "snps,dwc3" },
+	{ .compatible = "synopsys,dwc3" },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(dwc3) = {
+	.name = "dwc3",
+	.id = UCLASS_USB,
+	.of_match = of_dwc3_match,
+	.probe = dwc3_probe,
+	.remove = dwc3_remove,
+	.ops = &xhci_usb_ops,
+	.priv_auto_alloc_size = sizeof(struct dwc3_priv),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

Signed-off-by Masahiro Yamada <[email protected]>

---

 drivers/usb/host/Kconfig         |   7 +++
 drivers/usb/host/Makefile        |   1 +
 drivers/usb/host/dwc3-uniphier.c | 110 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 118 insertions(+)
 create mode 100644 drivers/usb/host/dwc3-uniphier.c

drivers/usb/host/Kconfig +7 -0

index d2363c8..b9eb5ed 100644
@@ -24,6 +24,13 @@ config USB_XHCI_UNIPHIER
 	---help---
 	  Enables support for the on-chip xHCI controller on UniPhier SoCs.
 
+config USB_DWC3_UNIPHIER
+	bool "DesignWare USB3 Host Support on UniPhier Platforms"
+	depends on ARCH_UNIPHIER
+	help
+	  Support of USB2/3 functionality in Socionext UniPhier platforms.
+	  Say 'Y' here if you have one such device.
+
 endif
 
 config USB_OHCI_GENERIC

drivers/usb/host/Makefile +1 -0

index 507519e..cc8b584 100644
@@ -56,6 +56,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 # xhci
 obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o

drivers/usb/host/dwc3-uniphier.c new file +35 -0

new file mode 100644
index 0000000..0571c6e
@@ -0,0 +1,110 @@
+/*
+ * UniPhier Specific Glue Layer for DWC3
+ *
+ * Copyright (C) 2016 Socionext Inc.
+ *   Author: Masahiro Yamada <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <mapmem.h>
+#include <dm/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/sizes.h>
+
+#define UNIPHIER_PRO4_DWC3_RESET	0x40
+#define   UNIPHIER_PRO4_DWC3_RESET_XIOMMU	BIT(5)
+#define   UNIPHIER_PRO4_DWC3_RESET_XLINK	BIT(4)
+
+#define UNIPHIER_PRO5_DWC3_RESET	0x00
+#define   UNIPHIER_PRO5_DWC3_RESET_XLINK	BIT(15)
+#define   UNIPHIER_PRO5_DWC3_RESET_XIOMMU	BIT(14)
+
+#define UNIPHIER_PXS2_DWC3_RESET	0x00
+#define   UNIPHIER_PXS2_DWC3_RESET_XLINK	BIT(15)
+
+static int uniphier_pro4_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
+	tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
+	writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);
+

drivers/usb/host/dwc3-uniphier.c new file +64 -0

+	return 0;
+}
+
+
+static int uniphier_pxs2_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET);
+	tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK | UNIPHIER_PXS2_DWC3_RESET_XIOMMU;
+	writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET);
+
+	return 0;
+}
+
+static int uniphier_dwc3_probe(struct udevice *dev)
+{
+	fdt_addr_t base;
+	void __iomem *regs;
+	int (*init)(void __iomem *regs);
+	int ret;
+
+	base = dev_get_addr(dev);
+	if (base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	regs = map_sysmem(base, SZ_32K);
+	if (!regs)
+		return -ENOMEM;
+
+	init = (int (*)(void __iomem *regs))dev_get_driver_data(dev);
+	ret = init(regs);
+
+	unmap_sysmem(regs);
+
+	return 0;
+}
+
+static const struct udevice_id uniphier_dwc3_match[] = {
+	{
+		.compatible = "socionext,uniphier-pro4-dwc3",
+		.data = (ulong)uniphier_pro4_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pro5-dwc3",
+		.data = (ulong)uniphier_pro5_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pxs2-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-ld20-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+	.name	= "uniphier-dwc3",
+	.id	= UCLASS_SIMPLE_BUS,
+	.of_match = uniphier_dwc3_match,
+	.probe = uniphier_dwc3_probe,
+};

Signed-off-by Masahiro Yamada <[email protected]>

---

 arch/arm/Kconfig           | 1 +
 include/configs/uniphier.h | 4 ++++
 2 files changed, 5 insertions(+)

arch/arm/Kconfig +1 -0

index 6b65d8e..59410cb 100644
@@ -723,6 +723,7 @@ config ARCH_UNIPHIER
 	select DM_SERIAL
 	select DM_I2C
 	select DM_MMC
+	select DM_USB
 	help
 	  Support for UniPhier SoC family developed by Socionext Inc.
 	  (formerly, System LSI Business Division of Panasonic Corporation)

include/configs/uniphier.h +0 -0

index 18cb963..868f001 100644

include/configs/uniphier.h +2 -0

+#endif
+
 /* SD/MMC */
 #define CONFIG_SUPPORT_EMMC_BOOT
 #define CONFIG_GENERIC_MMC

Please, do write commit messages.

Quoted 27 lines

Signed-off-by Masahiro Yamada <[email protected]>

---

 arch/arm/Kconfig           | 1 +
 include/configs/uniphier.h | 4 ++++
 2 files changed, 5 insertions(+)

arch/arm/Kconfig +1 -0

index 6b65d8e..59410cb 100644
@@ -723,6 +723,7 @@ config ARCH_UNIPHIER
      select DM_SERIAL
      select DM_I2C
      select DM_MMC
+     select DM_USB
      help
        Support for UniPhier SoC family developed by Socionext Inc.
        (formerly, System LSI Business Division of Panasonic Corporation)

include/configs/uniphier.h +0 -0

index 18cb963..868f001 100644
@@ -136,6 +136,10 @@
 #define CONFIG_FAT_WRITE
 #define CONFIG_DOS_PARTITION
 

include/configs/uniphier.h line 140

Quoted 2 lines

include/configs/uniphier.h +2 -0

+#ifdef CONFIG_USB_DWC3_UNIPHIER
+#define CONFIG_USB_XHCI_DWC3

Could this be converted to Kconfig ?

Hi Marek,

2016-05-11 20:26 GMT+09:00 Marek Vasut <[email protected]>:

Quoted 31 lines · Masahiro Yamada

Please, do write commit messages.

Quoted 27 lines

Signed-off-by Masahiro Yamada <[email protected]>

---

 arch/arm/Kconfig           | 1 +
 include/configs/uniphier.h | 4 ++++
 2 files changed, 5 insertions(+)

arch/arm/Kconfig +1 -0

index 6b65d8e..59410cb 100644
@@ -723,6 +723,7 @@ config ARCH_UNIPHIER
      select DM_SERIAL
      select DM_I2C
      select DM_MMC
+     select DM_USB
      help
        Support for UniPhier SoC family developed by Socionext Inc.
        (formerly, System LSI Business Division of Panasonic Corporation)

include/configs/uniphier.h +0 -0

index 18cb963..868f001 100644
@@ -136,6 +136,10 @@
 #define CONFIG_FAT_WRITE
 #define CONFIG_DOS_PARTITION
 

Quoted 5 lines

include/configs/uniphier.h line 140

Quoted 2 lines

include/configs/uniphier.h +2 -0

+#ifdef CONFIG_USB_DWC3_UNIPHIER
+#define CONFIG_USB_XHCI_DWC3

Could this be converted to Kconfig ?

I noticed this task was not so easy as I had imagined first.

Before moving CONFIB_USB_XHCI_DWC3,
I need to move CONFIG_USB_XHCI(_HCD) because USB_XHCI_DWC3 depends on USB_XHCI_HCD.

Before moving CONFIB_USB_XHCI(_HCD), I need to move CONFIG_USB
because USB_XHCI(_HCD) depends on USB.

A problem here is that many boards define CONFIG_USB_XHCI without CONFIG_USB.

In spite of that fact, finally I managed to convert them and pass buildman test. So, v2 is out now.

UniPhier platform switched to DWC3 core with UniPhier specific glue layer to support USB3. This pre-DM driver is no longer needed.

Signed-off-by Masahiro Yamada <[email protected]>

Masahiro Yamada (10):
usb: xhci: add struct devrequest declaration to xhci.h
usb: dwc3: make DWC3 core support code into a driver
usb: dwc3: add UniPhier specific glue layer
ARM: uniphier: switch over to USB DM
ARM: uniphier: enable DWC3 xHCI driver
usb: uniphier: remove UniPhier xHCI driver
ARM: uniphier: delete unnecessary xHCI pin-mux settings
ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG
ARM: dts: uniphier: add/update xHCI nodes
ARM: uniphier: enable Generic EHCI for PH1-Pro4