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ZynqMP: Align gic ranges for 64k in device tree

PATCH New Alexander Graf 2 participants 2 messages May 12, 2016 – May 16, 2016

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Device tree bindings Arm/Zynq architecture
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Alexander Graf

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PATCH 1/1 ZynqMP: Align gic ranges for 64k in device tree

The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems.

This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions.

Signed-off-by Alexander Graf <[email protected]>
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +2 -2
index e595f22..38c4310 100644
@@ -81,9 +81,9 @@
 			compatible = "arm,gic-400", "arm,cortex-a15-gic";
 			#interrupt-cells = <3>;
 			reg = <0x0 0xf9010000 0x10000>,
-			      <0x0 0xf902f000 0x2000>,
+			      <0x0 0xf9020000 0x20000>,
 			      <0x0 0xf9040000 0x20000>,
-			      <0x0 0xf906f000 0x2000>;
+			      <0x0 0xf9060000 0x20000>;
 			interrupt-controller;
 			interrupt-parent = <&gic>;
 			interrupts = <1 9 0xf04>;
Signature · 1 line
1.8.5.6
Applied
#1 lore raw

PATCH 1/1 ZynqMP: Align gic ranges for 64k in device tree

Quoted 20 lines · Alexander Graf

The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems.

This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions.

Signed-off-by Alexander Graf <[email protected]>
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +0 -0
index e595f22..38c4310 100644
@@ -81,9 +81,9 @@
 			compatible = "arm,gic-400", "arm,cortex-a15-gic";

arch/arm64/boot/dts/xilinx/zynqmp.dtsi line 89

Quoted 10 lines
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +2 -2
 			#interrupt-cells = <3>;
 			reg = <0x0 0xf9010000 0x10000>,
-			      <0x0 0xf902f000 0x2000>,
+			      <0x0 0xf9020000 0x20000>,
 			      <0x0 0xf9040000 0x20000>,
-			      <0x0 0xf906f000 0x2000>;
+			      <0x0 0xf9060000 0x20000>;
 			interrupt-controller;
 			interrupt-parent = <&gic>;
 			interrupts = <1 9 0xf04>;

Applied to zynqmp/dt with changed subject prefix ARM64: zynqmp:

Thanks,
Michal