usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

PATCH Superseded Masahiro Yamada 3 participants 27 messages May 16, 2016 – May 19, 2016

Subsystems (8)

Arm (32-bit) USB Arm sub-architectures Library code +4 more subsystems

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Masahiro Yamada

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2016-05-16 12:51 UTC #0 lore raw

v2 cover usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

Masahiro Yamada (13):
configs: blackfin: move CONFIG_USB to defconfig
usb: move CONFIG_USB_XHCI to Kconfig with renaming
usb: move CONFIG_USB_XHCI_DWC3 to Kconfig
usb: xhci: add struct devrequest declaration to xhci.h
usb: dwc3: change DWC3 core support code into a driver
usb: dwc3: add UniPhier specific glue layer
ARM: uniphier: switch over to USB DM
ARM: uniphier: enable DWC3 xHCI driver
usb: uniphier: remove UniPhier xHCI driver
ARM: uniphier: delete unnecessary xHCI pin-mux settings
ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG
ARM: dts: uniphier: add/update xHCI nodes
ARM: uniphier: enable Generic EHCI for PH1-Pro4

 arch/arm/Kconfig                                 |   1 +
 arch/arm/dts/uniphier-ph1-ld20.dtsi              |  17 ++++
 arch/arm/dts/uniphier-ph1-pro4-ref.dts           |   4 +
 arch/arm/dts/uniphier-ph1-pro4.dtsi              |  32 ++++--
 arch/arm/dts/uniphier-ph1-pro5.dtsi              |  32 ++++--
 arch/arm/dts/uniphier-proxstream2.dtsi           |  32 ++++--
 arch/arm/mach-uniphier/clk/clk-pro4.c            |   6 +-
 arch/arm/mach-uniphier/clk/clk-pro5.c            |   6 +-
 arch/arm/mach-uniphier/clk/clk-pxs2.c            |   6 +-
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c    |  12 ---
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c    |  11 ---
 arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c    |   7 --
 arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c    |   7 --
 arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c    |  11 ---
 common/usb.c                                     |   2 +-
 configs/am437x_gp_evm_defconfig                  |   2 +
 configs/am437x_sk_evm_defconfig                  |   2 +
 configs/am43xx_evm_defconfig                     |   2 +
 configs/am43xx_evm_ethboot_defconfig             |   2 +
 configs/am43xx_evm_qspiboot_defconfig            |   2 +
 configs/am43xx_evm_usbhost_boot_defconfig        |   2 +
 configs/am57xx_evm_defconfig                     |   3 +
 configs/am57xx_evm_nodt_defconfig                |   3 +
 configs/bf526-ezbrd_defconfig                    |   1 +
 configs/bf527-ezkit-v2_defconfig                 |   1 +
 configs/bf527-ezkit_defconfig                    |   1 +
 configs/bf548-ezkit_defconfig                    |   1 +
 configs/cm_t43_defconfig                         |   3 +
 configs/dra72_evm_defconfig                      |   2 +
 configs/dra74_evm_defconfig                      |   2 +
 configs/dra7xx_evm_defconfig                     |   2 +
 configs/dra7xx_evm_qspiboot_defconfig            |   2 +
 configs/dra7xx_evm_uart3_defconfig               |   2 +
 configs/k2e_evm_defconfig                        |   3 +
 configs/k2g_evm_defconfig                        |   3 +
 configs/k2hk_evm_defconfig                       |   3 +
 configs/k2l_evm_defconfig                        |   3 +
 configs/ls1021aqds_ddr4_nor_defconfig            |   3 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig     |   3 +
 configs/ls1021aqds_nand_defconfig                |   3 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig     |   3 +
 configs/ls1021aqds_nor_defconfig                 |   3 +
 configs/ls1021aqds_nor_lpuart_defconfig          |   3 +
 configs/ls1021aqds_qspi_defconfig                |   3 +
 configs/ls1021aqds_sdcard_ifc_defconfig          |   3 +
 configs/ls1021aqds_sdcard_qspi_defconfig         |   3 +
 configs/ls1021atwr_nor_SECURE_BOOT_defconfig     |   3 +
 configs/ls1021atwr_nor_defconfig                 |   3 +
 configs/ls1021atwr_nor_lpuart_defconfig          |   3 +
 configs/ls1021atwr_qspi_defconfig                |   3 +
 configs/ls1021atwr_sdcard_ifc_defconfig          |   3 +
 configs/ls1021atwr_sdcard_qspi_defconfig         |   3 +
 configs/ls1043aqds_defconfig                     |   3 +
 configs/ls1043aqds_lpuart_defconfig              |   3 +
 configs/ls1043aqds_nand_defconfig                |   3 +
 configs/ls1043aqds_nor_ddr3_defconfig            |   3 +
 configs/ls1043aqds_qspi_defconfig                |   3 +
 configs/ls1043aqds_sdcard_ifc_defconfig          |   3 +
 configs/ls1043aqds_sdcard_qspi_defconfig         |   3 +
 configs/ls1043ardb_SECURE_BOOT_defconfig         |   3 +
 configs/ls1043ardb_defconfig                     |   3 +
 configs/ls1043ardb_nand_defconfig                |   3 +
 configs/ls1043ardb_sdcard_defconfig              |   3 +
 configs/ls2080aqds_SECURE_BOOT_defconfig         |   3 +
 configs/ls2080aqds_defconfig                     |   3 +
 configs/ls2080aqds_nand_defconfig                |   3 +
 configs/ls2080ardb_SECURE_BOOT_defconfig         |   3 +
 configs/ls2080ardb_defconfig                     |   3 +
 configs/ls2080ardb_nand_defconfig                |   3 +
 configs/odroid-xu3_defconfig                     |   2 +
 configs/peach-pi_defconfig                       |   2 +
 configs/peach-pit_defconfig                      |   2 +
 configs/smdk5420_defconfig                       |   2 +
 configs/uniphier_ld20_defconfig                  |   2 +
 configs/uniphier_ld4_sld8_defconfig              |   1 -
 configs/uniphier_pro4_defconfig                  |   4 +
 configs/uniphier_pxs2_ld6b_defconfig             |   2 +
 configs/uniphier_sld3_defconfig                  |   1 -
 configs/xilinx_zynqmp_ep_defconfig               |   2 +
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |   2 +
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig |   2 +
 configs/xilinx_zynqmp_zcu102_defconfig           |   2 +
 configs/xilinx_zynqmp_zcu102_revB_defconfig      |   2 +
 drivers/usb/host/Kconfig                         |  24 ++---
 drivers/usb/host/Makefile                        |   4 +-
 drivers/usb/host/dwc3-uniphier.c                 | 119 +++++++++++++++++++++++
 drivers/usb/host/xhci-dwc3.c                     |  71 +++++++++++++-
 drivers/usb/host/xhci-uniphier.c                 |  85 ----------------
 drivers/usb/host/xhci.h                          |   2 +
 include/configs/am43xx_evm.h                     |   2 -
 include/configs/am57xx_evm.h                     |   2 -
 include/configs/bf526-ezbrd.h                    |   1 -
 include/configs/bf527-ezkit.h                    |   1 -
 include/configs/bf548-ezkit.h                    |   1 -
 include/configs/cm_t43.h                         |   2 -
 include/configs/dra7xx_evm.h                     |   2 -
 include/configs/ds414.h                          |   3 +-
 include/configs/exynos5-common.h                 |   1 -
 include/configs/exynos5420-common.h              |   1 -
 include/configs/ls1021aqds.h                     |   2 -
 include/configs/ls1021atwr.h                     |   2 -
 include/configs/ls1043aqds.h                     |   2 -
 include/configs/ls1043ardb.h                     |   2 -
 include/configs/ls2080aqds.h                     |   2 -
 include/configs/ls2080ardb.h                     |   2 -
 include/configs/smdk5420.h                       |   1 -
 include/configs/ti_armv7_keystone2.h             |   2 -
 include/configs/xilinx_zynqmp.h                  |   2 -
 include/fdtdec.h                                 |   1 -
 lib/fdtdec.c                                     |   1 -
 110 files changed, 479 insertions(+), 218 deletions(-)
 create mode 100644 drivers/usb/host/dwc3-uniphier.c
 delete mode 100644 drivers/usb/host/xhci-uniphier.c

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #1 lore raw

PATCH v2 1/13 configs: blackfin: move CONFIG_USB to defconfig

These Blackfin boards are the last ones that define CONFIG_USB in their headers.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2:
- Newly added

 configs/bf526-ezbrd_defconfig    | 1 +
 configs/bf527-ezkit-v2_defconfig | 1 +
 configs/bf527-ezkit_defconfig    | 1 +
 configs/bf548-ezkit_defconfig    | 1 +
 include/configs/bf526-ezbrd.h    | 1 -
 include/configs/bf527-ezkit.h    | 1 -
 include/configs/bf548-ezkit.h    | 1 -
 7 files changed, 4 insertions(+), 3 deletions(-)

configs/bf526-ezbrd_defconfig +1 -0

index 85c2a6b..ea4f8e4 100644
@@ -17,3 +17,4 @@ CONFIG_CMD_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_USB=y

configs/bf527-ezkit-v2_defconfig +1 -0

index ff797f8..faac28d 100644
@@ -17,4 +17,5 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_USB=y
 CONFIG_LIB_RAND=y

configs/bf527-ezkit_defconfig +1 -0

index eff2a12..d69b146 100644
@@ -17,3 +17,4 @@ CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_NET_TFTP_VARS is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_USB=y

configs/bf548-ezkit_defconfig +1 -0

index 6d398ac..e4fa136 100644
@@ -16,5 +16,6 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_USB=y
 CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
 CONFIG_LIB_RAND=y

include/configs/bf526-ezbrd.h +0 -1

index 74c3464..cf8ef8a 100644
@@ -125,7 +125,6 @@
  * USB Settings
  */
 #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
-#define CONFIG_USB
 #define CONFIG_USB_MUSB_HCD
 #define CONFIG_USB_BLACKFIN
 #define CONFIG_USB_STORAGE

include/configs/bf527-ezkit.h +0 -1

index e268473..c958a94 100644
@@ -128,7 +128,6 @@
  * USB Settings
  */
 #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
-#define CONFIG_USB
 #define CONFIG_USB_MUSB_HCD
 #define CONFIG_USB_BLACKFIN
 #define CONFIG_USB_STORAGE

include/configs/bf548-ezkit.h +0 -1

index 6830e4d..be28ea3 100644
@@ -151,7 +151,6 @@
  * USB Settings
  */
 #if !defined(__ADSPBF544__)
-#define CONFIG_USB
 #define CONFIG_USB_MUSB_HCD
 #define CONFIG_USB_BLACKFIN
 #define CONFIG_USB_STORAGE

Signature · 1 line

1.9.1

Marek Vasut

Applied

2016-05-16 17:41 UTC #2 lore raw

PATCH v2 1/13 configs: blackfin: move CONFIG_USB to defconfig

Quoted 4 lines · Masahiro Yamada

These Blackfin boards are the last ones that define CONFIG_USB in their headers.
Signed-off-by Masahiro Yamada <[email protected]>

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Masahiro Yamada

author

2016-05-16 12:51 UTC #3 lore raw

PATCH v2 2/13 usb: move CONFIG_USB_XHCI to Kconfig with renaming

In reply to Masahiro Yamada

Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD.

As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former.

Note:
Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2:
- Newly added

 common/usb.c                                     | 2 +-
 configs/am437x_gp_evm_defconfig                  | 1 +
 configs/am437x_sk_evm_defconfig                  | 1 +
 configs/am43xx_evm_defconfig                     | 1 +
 configs/am43xx_evm_ethboot_defconfig             | 1 +
 configs/am43xx_evm_qspiboot_defconfig            | 1 +
 configs/am43xx_evm_usbhost_boot_defconfig        | 1 +
 configs/am57xx_evm_defconfig                     | 2 ++
 configs/am57xx_evm_nodt_defconfig                | 2 ++
 configs/cm_t43_defconfig                         | 2 ++
 configs/dra72_evm_defconfig                      | 1 +
 configs/dra74_evm_defconfig                      | 1 +
 configs/dra7xx_evm_defconfig                     | 1 +
 configs/dra7xx_evm_qspiboot_defconfig            | 1 +
 configs/dra7xx_evm_uart3_defconfig               | 1 +
 configs/k2e_evm_defconfig                        | 2 ++
 configs/k2g_evm_defconfig                        | 2 ++
 configs/k2hk_evm_defconfig                       | 2 ++
 configs/k2l_evm_defconfig                        | 2 ++
 configs/ls1021aqds_ddr4_nor_defconfig            | 2 ++
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig     | 2 ++
 configs/ls1021aqds_nand_defconfig                | 2 ++
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig     | 2 ++
 configs/ls1021aqds_nor_defconfig                 | 2 ++
 configs/ls1021aqds_nor_lpuart_defconfig          | 2 ++
 configs/ls1021aqds_qspi_defconfig                | 2 ++
 configs/ls1021aqds_sdcard_ifc_defconfig          | 2 ++
 configs/ls1021aqds_sdcard_qspi_defconfig         | 2 ++
 configs/ls1021atwr_nor_SECURE_BOOT_defconfig     | 2 ++
 configs/ls1021atwr_nor_defconfig                 | 2 ++
 configs/ls1021atwr_nor_lpuart_defconfig          | 2 ++
 configs/ls1021atwr_qspi_defconfig                | 2 ++
 configs/ls1021atwr_sdcard_ifc_defconfig          | 2 ++
 configs/ls1021atwr_sdcard_qspi_defconfig         | 2 ++
 configs/ls1043aqds_defconfig                     | 2 ++
 configs/ls1043aqds_lpuart_defconfig              | 2 ++
 configs/ls1043aqds_nand_defconfig                | 2 ++
 configs/ls1043aqds_nor_ddr3_defconfig            | 2 ++
 configs/ls1043aqds_qspi_defconfig                | 2 ++
 configs/ls1043aqds_sdcard_ifc_defconfig          | 2 ++
 configs/ls1043aqds_sdcard_qspi_defconfig         | 2 ++
 configs/ls1043ardb_SECURE_BOOT_defconfig         | 2 ++
 configs/ls1043ardb_defconfig                     | 2 ++
 configs/ls1043ardb_nand_defconfig                | 2 ++
 configs/ls1043ardb_sdcard_defconfig              | 2 ++
 configs/ls2080aqds_SECURE_BOOT_defconfig         | 2 ++
 configs/ls2080aqds_defconfig                     | 2 ++
 configs/ls2080aqds_nand_defconfig                | 2 ++
 configs/ls2080ardb_SECURE_BOOT_defconfig         | 2 ++
 configs/ls2080ardb_defconfig                     | 2 ++
 configs/ls2080ardb_nand_defconfig                | 2 ++
 configs/odroid-xu3_defconfig                     | 1 +
 configs/peach-pi_defconfig                       | 1 +
 configs/peach-pit_defconfig                      | 1 +
 configs/smdk5420_defconfig                       | 1 +
 configs/xilinx_zynqmp_ep_defconfig               | 1 +
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
 configs/xilinx_zynqmp_zcu102_defconfig           | 1 +
 configs/xilinx_zynqmp_zcu102_revB_defconfig      | 1 +
 drivers/usb/host/Kconfig                         | 6 ------
 drivers/usb/host/Makefile                        | 2 +-
 include/configs/am43xx_evm.h                     | 1 -
 include/configs/am57xx_evm.h                     | 1 -
 include/configs/cm_t43.h                         | 1 -
 include/configs/dra7xx_evm.h                     | 1 -
 include/configs/ds414.h                          | 3 +--
 include/configs/exynos5420-common.h              | 1 -
 include/configs/ls1021aqds.h                     | 1 -
 include/configs/ls1021atwr.h                     | 1 -
 include/configs/ls1043aqds.h                     | 1 -
 include/configs/ls1043ardb.h                     | 1 -
 include/configs/ls2080aqds.h                     | 1 -
 include/configs/ls2080ardb.h                     | 1 -
 include/configs/smdk5420.h                       | 1 -
 include/configs/ti_armv7_keystone2.h             | 1 -
 include/configs/xilinx_zynqmp.h                  | 1 -
 77 files changed, 101 insertions(+), 24 deletions(-)

common/usb.c +1 -1

index 8d9efe5..b3ba487 100644
@@ -1182,7 +1182,7 @@ int usb_new_device(struct usb_device *dev)
 	 * with the device. So a get_descriptor will fail before any
 	 * of that is done for XHCI unlike EHCI.
 	 */
-#ifdef CONFIG_USB_XHCI
+#ifdef CONFIG_USB_XHCI_HCD
 	do_read = false;
 #endif
 	err = usb_setup_device(dev, do_read, dev->parent);

configs/am437x_gp_evm_defconfig +1 -0

index 03b02ac..22620f0 100644
@@ -38,6 +38,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am437x_sk_evm_defconfig +1 -0

index 48ec91f..6c96a17 100644
@@ -42,6 +42,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_defconfig +1 -0

index a6ae011..91c43f7 100644
@@ -29,6 +29,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_ethboot_defconfig +1 -0

index 662556a..3df62d0 100644
@@ -28,6 +28,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_qspiboot_defconfig +1 -0

index 00fa6be..37afd67 100644
@@ -27,6 +27,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_usbhost_boot_defconfig +1 -0

index e3d6b57..294aed9 100644
@@ -28,6 +28,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am57xx_evm_defconfig +2 -0

index 8fc3ebb..947913f 100644
@@ -32,3 +32,5 @@ CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/am57xx_evm_nodt_defconfig +2 -0

index 47d103b..373aa9e 100644
@@ -22,4 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_OF_LIBFDT=y

configs/cm_t43_defconfig +2 -0

index c926a3a..a8ffea7 100644
@@ -37,4 +37,6 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_OF_LIBFDT=y

configs/dra72_evm_defconfig +1 -0

index 00c6ac3..789466e 100644
@@ -42,6 +42,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra74_evm_defconfig +1 -0

index a11dcd5..8f1c3f8 100644
@@ -41,6 +41,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra7xx_evm_defconfig +1 -0

index b6458ae..3d010ba 100644
@@ -31,6 +31,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra7xx_evm_qspiboot_defconfig +1 -0

index 8ebfe49..2c27a81 100644
@@ -31,6 +31,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra7xx_evm_uart3_defconfig +1 -0

index 54c7ba9..cdee5d3 100644
@@ -32,6 +32,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/k2e_evm_defconfig +2 -0

index 044a9bf..b1d4018 100644
@@ -32,3 +32,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/k2g_evm_defconfig +2 -0

index d0b45ce..2c7167e 100644
@@ -32,3 +32,5 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/k2hk_evm_defconfig +2 -0

index 3975e80..410de64 100644
@@ -32,3 +32,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/k2l_evm_defconfig +2 -0

index 844dd57..91d7a04 100644
@@ -32,3 +32,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_ddr4_nor_defconfig +2 -0

index 6feb581..dbb2355 100644
@@ -24,3 +24,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_ddr4_nor_lpuart_defconfig +2 -0

index 563af48..8322188 100644
@@ -24,3 +24,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_nand_defconfig +2 -0

index 0786f20..1c256cc 100644
@@ -21,4 +21,6 @@ CONFIG_CMD_FAT=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_OF_LIBFDT=y

configs/ls1021aqds_nor_SECURE_BOOT_defconfig +2 -0

index 243fcdd..ef9a558 100644
@@ -22,5 +22,7 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT=y

configs/ls1021aqds_nor_defconfig +2 -0

index 3cecdfe..4f3496f 100644
@@ -23,3 +23,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_nor_lpuart_defconfig +2 -0

index 75b763e..f7e32cd 100644
@@ -24,3 +24,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_qspi_defconfig +2 -0

index c47fbce..667711c 100644
@@ -30,3 +30,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_sdcard_ifc_defconfig +2 -0

index 61ab251..4577b29 100644
@@ -22,3 +22,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021aqds_sdcard_qspi_defconfig +2 -0

index bb88743..903a390 100644
@@ -29,3 +29,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021atwr_nor_SECURE_BOOT_defconfig +2 -0

index a5cbb22..ef32055 100644
@@ -22,5 +22,7 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT=y

configs/ls1021atwr_nor_defconfig +2 -0

index 465054f..6badd44 100644
@@ -23,3 +23,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021atwr_nor_lpuart_defconfig +2 -0

index e96e31a..769740e 100644
@@ -24,3 +24,5 @@ CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021atwr_qspi_defconfig +2 -0

index 987638c..375f9a4 100644
@@ -31,3 +31,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1021atwr_sdcard_ifc_defconfig +2 -0

index df4d428..2d6357f 100644
@@ -20,4 +20,6 @@ CONFIG_CMD_FAT=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_OF_LIBFDT=y

configs/ls1021atwr_sdcard_qspi_defconfig +2 -0

index 583325d..69cbb95 100644
@@ -31,3 +31,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_defconfig +2 -0

index 346faf4..fa4270a 100644
@@ -25,3 +25,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_lpuart_defconfig +2 -0

index 2c6ac35..2a845b6 100644
@@ -26,3 +26,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_FSL_LPUART=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_nand_defconfig +2 -0

index cc8d8fa..20dc98b 100644
@@ -26,3 +26,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_nor_ddr3_defconfig +2 -0

index 7d0646c..829ed32 100644
@@ -24,3 +24,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_qspi_defconfig +2 -0

index 8ea1416..b6b98e3 100644
@@ -26,3 +26,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_sdcard_ifc_defconfig +2 -0

index 7e5949d..40ae837 100644
@@ -26,3 +26,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043aqds_sdcard_qspi_defconfig +2 -0

index 609fd63..8228d22 100644
@@ -27,3 +27,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043ardb_SECURE_BOOT_defconfig +2 -0

index cacee2f..9e4ab65 100644
@@ -21,4 +21,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_RSA=y

configs/ls1043ardb_defconfig +2 -0

index 49d0740..37a67b9 100644
@@ -21,3 +21,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043ardb_nand_defconfig +2 -0

index d240cde..e847312 100644
@@ -22,3 +22,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls1043ardb_sdcard_defconfig +2 -0

index f853685..e8a516b 100644
@@ -22,3 +22,5 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls2080aqds_SECURE_BOOT_defconfig +2 -0

index 216559c..dbf7bc1 100644
@@ -29,4 +29,6 @@ CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_RSA=y

configs/ls2080aqds_defconfig +2 -0

index 854630a..e19aacf 100644
@@ -29,3 +29,5 @@ CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls2080aqds_nand_defconfig +2 -0

index 4f385a1..e2d532d 100644
@@ -22,4 +22,6 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_OF_LIBFDT=y

configs/ls2080ardb_SECURE_BOOT_defconfig +2 -0

index 41d30a6..5233379 100644
@@ -29,4 +29,6 @@ CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_RSA=y

configs/ls2080ardb_defconfig +2 -0

index 2b775cd..becbff4 100644
@@ -29,3 +29,5 @@ CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y

configs/ls2080ardb_nand_defconfig +2 -0

index 0f184c0..c90e73b 100644
@@ -22,4 +22,6 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_OF_LIBFDT=y

configs/odroid-xu3_defconfig +1 -0

index 8995cc2..e78f973 100644
@@ -36,6 +36,7 @@ CONFIG_PMIC_S2MPS11=y
 CONFIG_DM_REGULATOR=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_PHY_SAMSUNG=y

configs/peach-pi_defconfig +1 -0

index c8c74c0..9a815d0 100644
@@ -55,6 +55,7 @@ CONFIG_EXYNOS_SPI=y
 CONFIG_TPM_TIS_INFINEON=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_VIDEO_BRIDGE=y
 CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
 CONFIG_TPM=y

configs/peach-pit_defconfig +1 -0

index c5fbf8c..5bea937 100644
@@ -55,6 +55,7 @@ CONFIG_EXYNOS_SPI=y
 CONFIG_TPM_TIS_INFINEON=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_VIDEO_BRIDGE=y
 CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
 CONFIG_TPM=y

configs/smdk5420_defconfig +1 -0

index 40de7c1..ad599fc 100644
@@ -36,4 +36,5 @@ CONFIG_DM_REGULATOR=y
 CONFIG_EXYNOS_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_VIDEO_BRIDGE=y

configs/xilinx_zynqmp_ep_defconfig +1 -0

index b185593..484a0ca 100644
@@ -47,6 +47,7 @@ CONFIG_NAND_ARASAN=y
 CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_GADGET=y

configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +1 -0

index cc08b03..6d5a018 100644
@@ -41,6 +41,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +1 -0

index 14d24a0..f9dc6f4 100644
@@ -38,6 +38,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

configs/xilinx_zynqmp_zcu102_defconfig +1 -0

index 6f1cff8..0057b01 100644
@@ -39,6 +39,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

configs/xilinx_zynqmp_zcu102_revB_defconfig +1 -0

index a8982a0..93f5382 100644
@@ -39,6 +39,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

drivers/usb/host/Kconfig +0 -6

index d2363c8..8a6f732 100644
@@ -9,12 +9,6 @@ config USB_XHCI_HCD
 	  The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
 	  "SuperSpeed" host controller hardware.
 
-config USB_XHCI
-	bool
-	default USB_XHCI_HCD
-	---help---
-	  TODO: rename after most boards switch to Kconfig
-
 if USB_XHCI_HCD
 
 config USB_XHCI_UNIPHIER

drivers/usb/host/Makefile +1 -1

index 507519e..620d114 100644
@@ -54,7 +54,7 @@ obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
 obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 
 # xhci
-obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
+obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o

include/configs/am43xx_evm.h +0 -1

index 5b49988..72ca819 100644
@@ -108,7 +108,6 @@
 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
 #define CONFIG_USB_HOST
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_STORAGE

include/configs/am57xx_evm.h +0 -1

index 32d7d4d..a99b9db 100644
@@ -65,7 +65,6 @@
 /* USB xHCI HOST */
 #define CONFIG_USB_HOST
 #define CONFIG_USB_XHCI_DWC3
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_STORAGE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

include/configs/cm_t43.h +0 -1

index ee818ed..b943e19 100644
@@ -61,7 +61,6 @@
 
 /* USB support */
 #define CONFIG_USB_HOST
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_STORAGE

include/configs/dra7xx_evm.h +0 -1

index 79b6c09..abfb888 100644
@@ -211,7 +211,6 @@
 
 /* USB xHCI HOST */
 #define CONFIG_USB_HOST
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_STORAGE

include/configs/ds414.h +1 -2

index 64c546c..23373cd 100644
@@ -71,12 +71,11 @@
  * - USB init fails, controller does not respond in time */
 #if 0
 #undef CONFIG_DM_USB
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_PCI
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 #endif
 
-#if !defined(CONFIG_USB_XHCI)
+#if !defined(CONFIG_USB_XHCI_HCD)
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MARVELL
 #define CONFIG_EHCI_IS_TDI

include/configs/exynos5420-common.h +0 -1

index cd86e06..16153eb 100644
@@ -48,7 +48,6 @@
  */
 #define CONFIG_CORE_COUNT		0x8
 
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_EXYNOS
 
 #endif	/* __CONFIG_EXYNOS5420_H */

include/configs/ls1021aqds.h +0 -1

index f605ca6..ac32240 100644
@@ -451,7 +451,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif

include/configs/ls1021atwr.h +0 -1

index 32d2acc..c38d680 100644
@@ -58,7 +58,6 @@
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
 #endif

include/configs/ls1043aqds.h +0 -1

index d71a229..e0a6368 100644
@@ -388,7 +388,6 @@ unsigned long get_board_ddr_clk(void);
 /* USB */
 #define CONFIG_HAS_FSL_XHCI_USB
 #ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3

include/configs/ls1043ardb.h +0 -1

index 6d35be2..ebf3507 100644
@@ -277,7 +277,6 @@
 /* USB */
 #define CONFIG_HAS_FSL_XHCI_USB
 #ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3

include/configs/ls2080aqds.h +0 -1

index 2d7567f..f7a9e18 100644
@@ -383,7 +383,6 @@ unsigned long get_board_ddr_clk(void);
  * USB
  */
 #define CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2

include/configs/ls2080ardb.h +0 -1

index 5bec509..d2de051 100644
@@ -316,7 +316,6 @@ unsigned long get_board_sys_clk(void);
  * USB
  */
 #define CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         2

include/configs/smdk5420.h +0 -1

index 9cf886c..c15acec 100644
@@ -31,7 +31,6 @@
 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
 
 /* USB */
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_EXYNOS
 
 /* DRAM Memory Banks */

include/configs/ti_armv7_keystone2.h +0 -1

index 2c9028c..2292eb2 100644
@@ -191,7 +191,6 @@
 					"-(ubifs)"
 
 /* USB Configuration */
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_KEYSTONE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2

include/configs/xilinx_zynqmp.h +0 -1

index 060bca9..4312e84 100644
@@ -102,7 +102,6 @@
 
 #if defined(CONFIG_ZYNQMP_USB)
 #define CONFIG_USB_XHCI_DWC3
-#define CONFIG_USB_XHCI
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #define CONFIG_USB_STORAGE

Signature · 1 line

1.9.1

Marek Vasut

Applied

2016-05-16 17:42 UTC #4 lore raw

PATCH v2 2/13 usb: move CONFIG_USB_XHCI to Kconfig with renaming

Quoted 7 lines · Masahiro Yamada

Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD.
As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former.

Quoted 7 lines

Note:
Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build.
Signed-off-by Masahiro Yamada <[email protected]>

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Masahiro Yamada

author

2016-05-16 12:51 UTC #5 lore raw

PATCH v2 3/13 usb: move CONFIG_USB_XHCI_DWC3 to Kconfig

In reply to Masahiro Yamada

Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2:
- Newly added

 configs/am437x_gp_evm_defconfig                  | 1 +
 configs/am437x_sk_evm_defconfig                  | 1 +
 configs/am43xx_evm_defconfig                     | 1 +
 configs/am43xx_evm_ethboot_defconfig             | 1 +
 configs/am43xx_evm_qspiboot_defconfig            | 1 +
 configs/am43xx_evm_usbhost_boot_defconfig        | 1 +
 configs/am57xx_evm_defconfig                     | 1 +
 configs/am57xx_evm_nodt_defconfig                | 1 +
 configs/cm_t43_defconfig                         | 1 +
 configs/dra72_evm_defconfig                      | 1 +
 configs/dra74_evm_defconfig                      | 1 +
 configs/dra7xx_evm_defconfig                     | 1 +
 configs/dra7xx_evm_qspiboot_defconfig            | 1 +
 configs/dra7xx_evm_uart3_defconfig               | 1 +
 configs/k2e_evm_defconfig                        | 1 +
 configs/k2g_evm_defconfig                        | 1 +
 configs/k2hk_evm_defconfig                       | 1 +
 configs/k2l_evm_defconfig                        | 1 +
 configs/ls1021aqds_ddr4_nor_defconfig            | 1 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig     | 1 +
 configs/ls1021aqds_nand_defconfig                | 1 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig     | 1 +
 configs/ls1021aqds_nor_defconfig                 | 1 +
 configs/ls1021aqds_nor_lpuart_defconfig          | 1 +
 configs/ls1021aqds_qspi_defconfig                | 1 +
 configs/ls1021aqds_sdcard_ifc_defconfig          | 1 +
 configs/ls1021aqds_sdcard_qspi_defconfig         | 1 +
 configs/ls1021atwr_nor_SECURE_BOOT_defconfig     | 1 +
 configs/ls1021atwr_nor_defconfig                 | 1 +
 configs/ls1021atwr_nor_lpuart_defconfig          | 1 +
 configs/ls1021atwr_qspi_defconfig                | 1 +
 configs/ls1021atwr_sdcard_ifc_defconfig          | 1 +
 configs/ls1021atwr_sdcard_qspi_defconfig         | 1 +
 configs/ls1043aqds_defconfig                     | 1 +
 configs/ls1043aqds_lpuart_defconfig              | 1 +
 configs/ls1043aqds_nand_defconfig                | 1 +
 configs/ls1043aqds_nor_ddr3_defconfig            | 1 +
 configs/ls1043aqds_qspi_defconfig                | 1 +
 configs/ls1043aqds_sdcard_ifc_defconfig          | 1 +
 configs/ls1043aqds_sdcard_qspi_defconfig         | 1 +
 configs/ls1043ardb_SECURE_BOOT_defconfig         | 1 +
 configs/ls1043ardb_defconfig                     | 1 +
 configs/ls1043ardb_nand_defconfig                | 1 +
 configs/ls1043ardb_sdcard_defconfig              | 1 +
 configs/ls2080aqds_SECURE_BOOT_defconfig         | 1 +
 configs/ls2080aqds_defconfig                     | 1 +
 configs/ls2080aqds_nand_defconfig                | 1 +
 configs/ls2080ardb_SECURE_BOOT_defconfig         | 1 +
 configs/ls2080ardb_defconfig                     | 1 +
 configs/ls2080ardb_nand_defconfig                | 1 +
 configs/odroid-xu3_defconfig                     | 1 +
 configs/peach-pi_defconfig                       | 1 +
 configs/peach-pit_defconfig                      | 1 +
 configs/smdk5420_defconfig                       | 1 +
 configs/xilinx_zynqmp_ep_defconfig               | 1 +
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
 configs/xilinx_zynqmp_zcu102_defconfig           | 1 +
 configs/xilinx_zynqmp_zcu102_revB_defconfig      | 1 +
 drivers/usb/host/Kconfig                         | 6 ++++++
 include/configs/am43xx_evm.h                     | 1 -
 include/configs/am57xx_evm.h                     | 1 -
 include/configs/cm_t43.h                         | 1 -
 include/configs/dra7xx_evm.h                     | 1 -
 include/configs/exynos5-common.h                 | 1 -
 include/configs/ls1021aqds.h                     | 1 -
 include/configs/ls1021atwr.h                     | 1 -
 include/configs/ls1043aqds.h                     | 1 -
 include/configs/ls1043ardb.h                     | 1 -
 include/configs/ls2080aqds.h                     | 1 -
 include/configs/ls2080ardb.h                     | 1 -
 include/configs/ti_armv7_keystone2.h             | 1 -
 include/configs/xilinx_zynqmp.h                  | 1 -
 73 files changed, 65 insertions(+), 13 deletions(-)

configs/am437x_gp_evm_defconfig +1 -0

index 22620f0..f911281 100644
@@ -39,6 +39,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am437x_sk_evm_defconfig +1 -0

index 6c96a17..b9e0aae 100644
@@ -43,6 +43,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_defconfig +1 -0

index 91c43f7..43ee43f 100644
@@ -30,6 +30,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_ethboot_defconfig +1 -0

index 3df62d0..6b37f59 100644
@@ -29,6 +29,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_qspiboot_defconfig +1 -0

index 37afd67..8e15cf7 100644
@@ -28,6 +28,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am43xx_evm_usbhost_boot_defconfig +1 -0

index 294aed9..a1dd8c9 100644
@@ -29,6 +29,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/am57xx_evm_defconfig +1 -0

index 947913f..123472c 100644
@@ -34,3 +34,4 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/am57xx_evm_nodt_defconfig +1 -0

index 373aa9e..1cf82d2 100644
@@ -24,4 +24,5 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y

configs/cm_t43_defconfig +1 -0

index a8ffea7..b80ca0d 100644
@@ -39,4 +39,5 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y

configs/dra72_evm_defconfig +1 -0

index 789466e..8f9668f 100644
@@ -43,6 +43,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra74_evm_defconfig +1 -0

index 8f1c3f8..918e754 100644
@@ -42,6 +42,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra7xx_evm_defconfig +1 -0

index 3d010ba..9b2dcf9 100644
@@ -32,6 +32,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra7xx_evm_qspiboot_defconfig +1 -0

index 2c27a81..92aa2cf 100644
@@ -32,6 +32,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/dra7xx_evm_uart3_defconfig +1 -0

index cdee5d3..31a6b6f 100644
@@ -33,6 +33,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_OMAP=y

configs/k2e_evm_defconfig +1 -0

index b1d4018..9fcdfe9 100644
@@ -34,3 +34,4 @@ CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/k2g_evm_defconfig +1 -0

index 2c7167e..8efa58c 100644
@@ -34,3 +34,4 @@ CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/k2hk_evm_defconfig +1 -0

index 410de64..278eaf3 100644
@@ -34,3 +34,4 @@ CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/k2l_evm_defconfig +1 -0

index 91d7a04..8417e0a 100644
@@ -34,3 +34,4 @@ CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_ddr4_nor_defconfig +1 -0

index dbb2355..85cadb0 100644
@@ -26,3 +26,4 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_ddr4_nor_lpuart_defconfig +1 -0

index 8322188..e267968 100644
@@ -26,3 +26,4 @@ CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_nand_defconfig +1 -0

index 1c256cc..30168d7 100644
@@ -23,4 +23,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y

configs/ls1021aqds_nor_SECURE_BOOT_defconfig +1 -0

index ef9a558..243604f 100644
@@ -24,5 +24,6 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT=y

configs/ls1021aqds_nor_defconfig +1 -0

index 4f3496f..53ea1c3 100644
@@ -25,3 +25,4 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_nor_lpuart_defconfig +1 -0

index f7e32cd..3429f55 100644
@@ -26,3 +26,4 @@ CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_qspi_defconfig +1 -0

index 667711c..71afa59 100644
@@ -32,3 +32,4 @@ CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_sdcard_ifc_defconfig +1 -0

index 4577b29..1b8cdd1 100644
@@ -24,3 +24,4 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021aqds_sdcard_qspi_defconfig +1 -0

index 903a390..fb692c3 100644
@@ -31,3 +31,4 @@ CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021atwr_nor_SECURE_BOOT_defconfig +1 -0

index ef32055..b34a062 100644
@@ -24,5 +24,6 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT=y

configs/ls1021atwr_nor_defconfig +1 -0

index 6badd44..f34fe90 100644
@@ -25,3 +25,4 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021atwr_nor_lpuart_defconfig +1 -0

index 769740e..3dcddb5 100644
@@ -26,3 +26,4 @@ CONFIG_E1000=y
 CONFIG_FSL_LPUART=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021atwr_qspi_defconfig +1 -0

index 375f9a4..715a492 100644
@@ -33,3 +33,4 @@ CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1021atwr_sdcard_ifc_defconfig +1 -0

index 2d6357f..09fbe39 100644
@@ -22,4 +22,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y

configs/ls1021atwr_sdcard_qspi_defconfig +1 -0

index 69cbb95..c6af3a1 100644
@@ -33,3 +33,4 @@ CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_defconfig +1 -0

index fa4270a..1fbfd38 100644
@@ -27,3 +27,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_lpuart_defconfig +1 -0

index 2a845b6..6b628d3 100644
@@ -28,3 +28,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_FSL_LPUART=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_nand_defconfig +1 -0

index 20dc98b..90f870a 100644
@@ -28,3 +28,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_nor_ddr3_defconfig +1 -0

index 829ed32..813c269 100644
@@ -26,3 +26,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_qspi_defconfig +1 -0

index b6b98e3..e665ba4 100644
@@ -28,3 +28,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_sdcard_ifc_defconfig +1 -0

index 40ae837..03a263a 100644
@@ -28,3 +28,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043aqds_sdcard_qspi_defconfig +1 -0

index 8228d22..0062f5c 100644
@@ -29,3 +29,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043ardb_SECURE_BOOT_defconfig +1 -0

index 9e4ab65..bace827 100644
@@ -23,4 +23,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y

configs/ls1043ardb_defconfig +1 -0

index 37a67b9..48a89ab 100644
@@ -23,3 +23,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043ardb_nand_defconfig +1 -0

index e847312..627a90d 100644
@@ -24,3 +24,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls1043ardb_sdcard_defconfig +1 -0

index e8a516b..c676a91 100644
@@ -24,3 +24,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls2080aqds_SECURE_BOOT_defconfig +1 -0

index dbf7bc1..5fc6e6f 100644
@@ -31,4 +31,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y

configs/ls2080aqds_defconfig +1 -0

index e19aacf..5f440ae 100644
@@ -31,3 +31,4 @@ CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls2080aqds_nand_defconfig +1 -0

index e2d532d..e6841c9 100644
@@ -24,4 +24,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y

configs/ls2080ardb_SECURE_BOOT_defconfig +1 -0

index 5233379..632a639 100644
@@ -31,4 +31,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y

configs/ls2080ardb_defconfig +1 -0

index becbff4..6cc6795 100644
@@ -31,3 +31,4 @@ CONFIG_SYS_NS16550=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y

configs/ls2080ardb_nand_defconfig +1 -0

index c90e73b..46adbfc 100644
@@ -24,4 +24,5 @@ CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y

configs/odroid-xu3_defconfig +1 -0

index e78f973..49cfa8c 100644
@@ -37,6 +37,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_PHY_SAMSUNG=y

configs/peach-pi_defconfig +1 -0

index 9a815d0..3c403ba 100644
@@ -56,6 +56,7 @@ CONFIG_TPM_TIS_INFINEON=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_VIDEO_BRIDGE=y
 CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
 CONFIG_TPM=y

configs/peach-pit_defconfig +1 -0

index 5bea937..bfa3614 100644
@@ -56,6 +56,7 @@ CONFIG_TPM_TIS_INFINEON=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_VIDEO_BRIDGE=y
 CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
 CONFIG_TPM=y

configs/smdk5420_defconfig +1 -0

index ad599fc..3bda611 100644
@@ -37,4 +37,5 @@ CONFIG_EXYNOS_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_VIDEO_BRIDGE=y

configs/xilinx_zynqmp_ep_defconfig +1 -0

index 484a0ca..231ef13 100644
@@ -48,6 +48,7 @@ CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_GADGET=y

configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +1 -0

index 6d5a018..98937f2 100644
@@ -42,6 +42,7 @@ CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +1 -0

index f9dc6f4..bb47632 100644
@@ -39,6 +39,7 @@ CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

configs/xilinx_zynqmp_zcu102_defconfig +1 -0

index 0057b01..edc3264 100644
@@ -40,6 +40,7 @@ CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

configs/xilinx_zynqmp_zcu102_revB_defconfig +1 -0

index 93f5382..9ce414d 100644
@@ -40,6 +40,7 @@ CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y

drivers/usb/host/Kconfig +6 -0

index 8a6f732..89580cc 100644
@@ -18,6 +18,12 @@ config USB_XHCI_UNIPHIER
 	---help---
 	  Enables support for the on-chip xHCI controller on UniPhier SoCs.
 
+config USB_XHCI_DWC3
+	bool "DesignWare USB3 DRD Core Support"
+	help
+	  Say Y or if your system has a Dual Role SuperSpeed
+	  USB controller based on the DesignWare USB3 IP Core.
+
 endif
 
 config USB_OHCI_GENERIC

include/configs/am43xx_evm.h +0 -1

index 72ca819..84aa3bb 100644
@@ -108,7 +108,6 @@
 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
 #define CONFIG_USB_HOST
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_STORAGE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

include/configs/am57xx_evm.h +0 -1

index a99b9db..f25bf0d 100644
@@ -64,7 +64,6 @@
 
 /* USB xHCI HOST */
 #define CONFIG_USB_HOST
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_STORAGE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

include/configs/cm_t43.h +0 -1

index b943e19..f199661 100644
@@ -62,7 +62,6 @@
 /* USB support */
 #define CONFIG_USB_HOST
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_STORAGE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 #define CONFIG_OMAP_USB_PHY

include/configs/dra7xx_evm.h +0 -1

index abfb888..2393efb 100644
@@ -211,7 +211,6 @@
 
 /* USB xHCI HOST */
 #define CONFIG_USB_HOST
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_OMAP
 #define CONFIG_USB_STORAGE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

include/configs/exynos5-common.h +0 -1

index b2ff4dd..e614a7f 100644
@@ -157,7 +157,6 @@
 
 /* USB */
 #define CONFIG_USB_STORAGE
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2

include/configs/ls1021aqds.h +0 -1

index ac32240..1edf798 100644
@@ -450,7 +450,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif

include/configs/ls1021atwr.h +0 -1

index c38d680..30f5655 100644
@@ -57,7 +57,6 @@
 
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
 #endif

include/configs/ls1043aqds.h +0 -1

index e0a6368..4570938 100644
@@ -389,7 +389,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_HAS_FSL_XHCI_USB
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE

include/configs/ls1043ardb.h +0 -1

index ebf3507..5aa8d51 100644
@@ -278,7 +278,6 @@
 #define CONFIG_HAS_FSL_XHCI_USB
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE

include/configs/ls2080aqds.h +0 -1

index f7a9e18..121a9a0 100644
@@ -384,7 +384,6 @@ unsigned long get_board_ddr_clk(void);
  */
 #define CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE

include/configs/ls2080ardb.h +0 -1

index d2de051..f8bb175 100644
@@ -317,7 +317,6 @@ unsigned long get_board_sys_clk(void);
  */
 #define CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         2
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #define CONFIG_USB_STORAGE

include/configs/ti_armv7_keystone2.h +0 -1

index 2292eb2..707106f 100644
@@ -191,7 +191,6 @@
 					"-(ubifs)"
 
 /* USB Configuration */
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_XHCI_KEYSTONE
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE

include/configs/xilinx_zynqmp.h +0 -1

index 4312e84..d0bf025 100644
@@ -101,7 +101,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x8000000
 
 #if defined(CONFIG_ZYNQMP_USB)
-#define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #define CONFIG_USB_STORAGE

Signature · 1 line

1.9.1

Marek Vasut

Applied

2016-05-16 17:42 UTC #6 lore raw

PATCH v2 3/13 usb: move CONFIG_USB_XHCI_DWC3 to Kconfig

Quoted 4 lines · Masahiro Yamada

Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards.
Signed-off-by Masahiro Yamada <[email protected]>

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Masahiro Yamada

author

2016-05-16 12:51 UTC #7 lore raw

PATCH v2 4/13 usb: xhci: add struct devrequest declaration to xhci.h

In reply to Masahiro Yamada

If xhci.h is included without include/usb.h, the compiler complains like follows:
warning: 'struct devrequest' declared inside parameter list

We have two options to teach the compiler that devrequest is a structure:

[1] Declare "struct devrequest;" in xhci.h

[2] Include <include/usb.h> from xhci.h

This commit takes [1] because nothing else in xhci.h depends on include/usb.h. [2] would require the compiler additional header parsing.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2:
- Rephrase git-log

 drivers/usb/host/xhci.h | 2 ++
 1 file changed, 2 insertions(+)

drivers/usb/host/xhci.h +2 -0

index 2afa386..16dd61a 100644
@@ -1252,6 +1252,8 @@ void xhci_acknowledge_event(struct xhci_ctrl *ctrl);
 union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected);
 int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,
 		 int length, void *buffer);
+
+struct devrequest;
 int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,
 		 struct devrequest *req, int length, void *buffer);
 int xhci_check_maxpacket(struct usb_device *udev);

Signature · 1 line

1.9.1

Marek Vasut

Applied

2016-05-16 17:42 UTC #8 lore raw

PATCH v2 4/13 usb: xhci: add struct devrequest declaration to xhci.h

Quoted 9 lines · Masahiro Yamada

If xhci.h is included without include/usb.h, the compiler complains like follows:
warning: 'struct devrequest' declared inside parameter list
We have two options to teach the compiler that devrequest is a structure:
[1] Declare "struct devrequest;" in xhci.h

Quoted 7 lines

[2] Include <include/usb.h> from xhci.h
This commit takes [1] because nothing else in xhci.h depends on include/usb.h. [2] would require the compiler additional header parsing.
Signed-off-by Masahiro Yamada <[email protected]>

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Masahiro Yamada

author

2016-05-16 12:51 UTC #9 lore raw

PATCH v2 5/13 usb: dwc3: change DWC3 core support code into a driver

In reply to Masahiro Yamada

Synopsys DWC3 IP generally works with an SoC-specific glue layer. DT binding for that is like this:

  usb3_glue {
          compatible = "foo,dwc3";
          ...

          usb3 {
                  compatible = "snps,dwc3";
                  ...
          };

};

The glue layer initializes some SoC-specific parts, then populates the child DWC3 core. To see how it works, refer to

drivers/usb/dwc3/dwc3-exynos.c
drivers/usb/dwc3/dwc3-keystone.c
drivers/usb/dwc3/dwc3-omap.c
drivers/usb/dwc3/dwc3-st.c

of Linux Kernel.

This commit implements a driver compatible with "snps,dwc3", allowing to use the same binding in U-Boot. The glue layer can be simply implemented based on Simple Bus Uclass.

Signed-off-by Masahiro Yamada <[email protected]>

Reviewed-by Marek Vasut <[email protected]>

---

Changes in v2: None

 drivers/usb/host/xhci-dwc3.c | 71 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 70 insertions(+), 1 deletion(-)

drivers/usb/host/xhci-dwc3.c +70 -1

index 33961cd..c7c8324 100644
@@ -9,8 +9,13 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <dm/device.h>
+#include <mapmem.h>
+#include <linux/io.h>
 #include <linux/usb/dwc3.h>
+#include <linux/sizes.h>
+
+#include "xhci.h"
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
 {

@@ -97,3 +102,67 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 	setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
 			GFLADJ_30MHZ(val));
 }
+
+struct dwc3_priv {
+	struct xhci_ctrl ctrl;	/* should be the first member */
+	void __iomem *regs;
+};
+
+static int dwc3_probe(struct udevice *dev)
+{
+	struct dwc3_priv *priv = dev_get_priv(dev);
+	struct xhci_hccr *hccr;
+	struct xhci_hcor *hcor;
+	fdt_addr_t base;
+	int ret;
+
+	base = dev_get_addr(dev);
+	if (base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = map_sysmem(base, SZ_32K);
+	if (!priv->regs)
+		return -ENOMEM;
+
+	hccr = priv->regs;
+
+	hcor = priv->regs + HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+
+	ret = dwc3_core_init(priv->regs + DWC3_REG_OFFSET);
+	if (ret) {
+		puts("XHCI: failed to initialize controller\n");
+		return ret;
+	}
+
+	/* We are hard-coding DWC3 core to Host Mode */
+	dwc3_set_mode(priv->regs + DWC3_REG_OFFSET, DWC3_GCTL_PRTCAP_HOST);
+
+	return xhci_register(dev, hccr, hcor);
+}
+
+static int dwc3_remove(struct udevice *dev)
+{
+	struct dwc3_priv *priv = dev_get_priv(dev);
+
+	xhci_deregister(dev);
+	unmap_sysmem(priv->regs);
+
+	return 0;
+}
+
+static const struct udevice_id of_dwc3_match[] = {
+	{ .compatible = "snps,dwc3" },
+	{ .compatible = "synopsys,dwc3" },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(dwc3) = {
+	.name = "dwc3",
+	.id = UCLASS_USB,
+	.of_match = of_dwc3_match,
+	.probe = dwc3_probe,
+	.remove = dwc3_remove,
+	.ops = &xhci_usb_ops,
+	.priv_auto_alloc_size = sizeof(struct dwc3_priv),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};

Signature · 1 line

1.9.1

Marek Vasut

Applied

2016-05-16 17:45 UTC #10 lore raw

PATCH v2 5/13 usb: dwc3: change DWC3 core support code into a driver

Quoted 23 lines · Masahiro Yamada

Synopsys DWC3 IP generally works with an SoC-specific glue layer. DT binding for that is like this:
  usb3_glue {
          compatible = "foo,dwc3";
          ...
          usb3 {
                  compatible = "snps,dwc3";
                  ...
          };
};
The glue layer initializes some SoC-specific parts, then populates the child DWC3 core. To see how it works, refer to
drivers/usb/dwc3/dwc3-exynos.c
drivers/usb/dwc3/dwc3-keystone.c
drivers/usb/dwc3/dwc3-omap.c
drivers/usb/dwc3/dwc3-st.c
of Linux Kernel.

Quoted 7 lines

This commit implements a driver compatible with "snps,dwc3", allowing to use the same binding in U-Boot. The glue layer can be simply implemented based on Simple Bus Uclass.
Signed-off-by Masahiro Yamada <[email protected]>
Reviewed-by Marek Vasut <[email protected]>
---

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Roger Quadros

2016-05-17 08:20 UTC #11 lore raw

PATCH v2 5/13 usb: dwc3: change DWC3 core support code into a driver

In reply to Masahiro Yamada

Hi Masahiro,

Quoted 27 lines · Masahiro Yamada

Synopsys DWC3 IP generally works with an SoC-specific glue layer. DT binding for that is like this:
  usb3_glue {
          compatible = "foo,dwc3";
          ...
          usb3 {
                  compatible = "snps,dwc3";
                  ...
          };
};
The glue layer initializes some SoC-specific parts, then populates the child DWC3 core. To see how it works, refer to
drivers/usb/dwc3/dwc3-exynos.c
drivers/usb/dwc3/dwc3-keystone.c
drivers/usb/dwc3/dwc3-omap.c
drivers/usb/dwc3/dwc3-st.c
of Linux Kernel.
This commit implements a driver compatible with "snps,dwc3", allowing to use the same binding in U-Boot. The glue layer can be simply implemented based on Simple Bus Uclass.

Quoted 7 lines

Signed-off-by Masahiro Yamada <[email protected]>
Reviewed-by Marek Vasut <[email protected]>
---
Changes in v2: None
 drivers/usb/host/xhci-dwc3.c | 71 +++++++++++++++++++++++++++++++++++++++++++-

"snps,dwc3" compatible is for the dual-role controller that implements both device and host controllers. So calling the driver xhci-dwc3.c is a bit misleading.

Quoted 49 lines

 1 file changed, 70 insertions(+), 1 deletion(-)

drivers/usb/host/xhci-dwc3.c +30 -1

index 33961cd..c7c8324 100644
@@ -9,8 +9,13 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <dm/device.h>
+#include <mapmem.h>
+#include <linux/io.h>
 #include <linux/usb/dwc3.h>
+#include <linux/sizes.h>
+
+#include "xhci.h"
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
 {

@@ -97,3 +102,67 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 	setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
 			GFLADJ_30MHZ(val));
 }
+
+struct dwc3_priv {
+	struct xhci_ctrl ctrl;	/* should be the first member */
+	void __iomem *regs;
+};
+
+static int dwc3_probe(struct udevice *dev)
+{
+	struct dwc3_priv *priv = dev_get_priv(dev);
+	struct xhci_hccr *hccr;
+	struct xhci_hcor *hcor;
+	fdt_addr_t base;
+	int ret;
+
+	base = dev_get_addr(dev);
+	if (base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = map_sysmem(base, SZ_32K);
+	if (!priv->regs)
+		return -ENOMEM;
+
+	hccr = priv->regs;
+

drivers/usb/host/xhci-dwc3.c void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) · line 138

Quoted 10 lines

drivers/usb/host/xhci-dwc3.c +10 -0

+	hcor = priv->regs + HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+
+	ret = dwc3_core_init(priv->regs + DWC3_REG_OFFSET);
+	if (ret) {
+		puts("XHCI: failed to initialize controller\n");
+		return ret;
+	}
+
+	/* We are hard-coding DWC3 core to Host Mode */
+	dwc3_set_mode(priv->regs + DWC3_REG_OFFSET, DWC3_GCTL_PRTCAP_HOST);

Why are we hard-coding it to host mode? We need to take into account the dr_mode DT property and the Kconfig options to decide which mode we can operate in.

Quoted 21 lines

drivers/usb/host/xhci-dwc3.c +20 -0

+
+	return xhci_register(dev, hccr, hcor);
+}
+
+static int dwc3_remove(struct udevice *dev)
+{
+	struct dwc3_priv *priv = dev_get_priv(dev);
+
+	xhci_deregister(dev);
+	unmap_sysmem(priv->regs);
+
+	return 0;
+}
+
+static const struct udevice_id of_dwc3_match[] = {
+	{ .compatible = "snps,dwc3" },
+	{ .compatible = "synopsys,dwc3" },
+	{ /* sentinel */ }
+};
+

drivers/usb/host/xhci-dwc3.c void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) · line 168

Quoted 10 lines

drivers/usb/host/xhci-dwc3.c +10 -0

+U_BOOT_DRIVER(dwc3) = {
+	.name = "dwc3",
+	.id = UCLASS_USB,
+	.of_match = of_dwc3_match,
+	.probe = dwc3_probe,
+	.remove = dwc3_remove,
+	.ops = &xhci_usb_ops,
+	.priv_auto_alloc_size = sizeof(struct dwc3_priv),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};

cheers,
-roger

Masahiro Yamada

author

2016-05-17 08:57 UTC #12 lore raw

PATCH v2 5/13 usb: dwc3: change DWC3 core support code into a driver

Hi Roger,

2016-05-17 17:20 GMT+09:00 Roger Quadros <[email protected]>:

Quoted 34 lines

Hi Masahiro,
Quoted 31 lines · Masahiro Yamada
Synopsys DWC3 IP generally works with an SoC-specific glue layer. DT binding for that is like this:
  usb3_glue {
          compatible = "foo,dwc3";
          ...
          usb3 {
                  compatible = "snps,dwc3";
                  ...
          };
};
The glue layer initializes some SoC-specific parts, then populates the child DWC3 core. To see how it works, refer to
drivers/usb/dwc3/dwc3-exynos.c
drivers/usb/dwc3/dwc3-keystone.c
drivers/usb/dwc3/dwc3-omap.c
drivers/usb/dwc3/dwc3-st.c
of Linux Kernel.
This commit implements a driver compatible with "snps,dwc3", allowing to use the same binding in U-Boot. The glue layer can be simply implemented based on Simple Bus Uclass.
Signed-off-by Masahiro Yamada <[email protected]>
Reviewed-by Marek Vasut <[email protected]>
---

Quoted 6 lines

Quoted 3 lines
Changes in v2: None
 drivers/usb/host/xhci-dwc3.c | 71 +++++++++++++++++++++++++++++++++++++++++++-
"snps,dwc3" compatible is for the dual-role controller that implements both device and host controllers.

I know this fact.
The "snps,dwc3" on my SoC only works in host mode, though.

Quoted 1 line

So calling the driver xhci-dwc3.c is a bit misleading.

I think we have separate work for
- drivers/usb/host/xhci-dwc3.c (only for host mode)
- drivers/usb/dwc3/* (currently, for gadget ??)

This is unfortunate, though.

Quoted 53 lines

 1 file changed, 70 insertions(+), 1 deletion(-)

drivers/usb/host/xhci-dwc3.c +34 -1

index 33961cd..c7c8324 100644
@@ -9,8 +9,13 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <dm/device.h>
+#include <mapmem.h>
+#include <linux/io.h>
 #include <linux/usb/dwc3.h>
+#include <linux/sizes.h>
+
+#include "xhci.h"
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
 {

@@ -97,3 +102,67 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
      setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
                      GFLADJ_30MHZ(val));
 }
+
+struct dwc3_priv {
+     struct xhci_ctrl ctrl;  /* should be the first member */
+     void __iomem *regs;
+};
+
+static int dwc3_probe(struct udevice *dev)
+{
+     struct dwc3_priv *priv = dev_get_priv(dev);
+     struct xhci_hccr *hccr;
+     struct xhci_hcor *hcor;
+     fdt_addr_t base;
+     int ret;
+
+     base = dev_get_addr(dev);
+     if (base == FDT_ADDR_T_NONE)
+             return -EINVAL;
+
+     priv->regs = map_sysmem(base, SZ_32K);
+     if (!priv->regs)
+             return -ENOMEM;
+
+     hccr = priv->regs;
+
+     hcor = priv->regs + HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+
+     ret = dwc3_core_init(priv->regs + DWC3_REG_OFFSET);
+     if (ret) {

Quoted 8 lines

drivers/usb/host/xhci-dwc3.c void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) · line 138
Quoted 6 lines
drivers/usb/host/xhci-dwc3.c +6 -0
+             puts("XHCI: failed to initialize controller\n");
+             return ret;
+     }
+
+     /* We are hard-coding DWC3 core to Host Mode */
+     dwc3_set_mode(priv->regs + DWC3_REG_OFFSET, DWC3_GCTL_PRTCAP_HOST);
Why are we hard-coding it to host mode?

Because this file is used for host mode.
It is enabled by CONFIG_USB_XHCI_DWC3, like follows.

obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o

Boards defining CONFIG_USB_XHCI_DWC3 expect
this driver works in the host mode, I guess.

Quoted 3 lines

We need to take into account
the dr_mode DT property and the Kconfig options to decide which mode we can operate in.

I thought drivers/usb/dwc3/* was working only for GADGET, because currently USB_DWC3 depends on (USB && USB_GADGET).

As far as I understand, it will work for host mode with your series applied. Correct?

If so, cool!
I am happy to move to drivers/usb/dwc3/*.

Signature · 2 lines

Best Regards
Masahiro Yamada

Roger Quadros

2016-05-17 10:22 UTC #13 lore raw

PATCH v2 5/13 usb: dwc3: change DWC3 core support code into a driver

Quoted 53 lines · Masahiro Yamada

Hi Roger,
2016-05-17 17:20 GMT+09:00 Roger Quadros <[email protected]>:
Quoted 34 lines
Hi Masahiro,
Quoted 31 lines · Masahiro Yamada
Synopsys DWC3 IP generally works with an SoC-specific glue layer. DT binding for that is like this:
  usb3_glue {
          compatible = "foo,dwc3";
          ...
          usb3 {
                  compatible = "snps,dwc3";
                  ...
          };
};
The glue layer initializes some SoC-specific parts, then populates the child DWC3 core. To see how it works, refer to
drivers/usb/dwc3/dwc3-exynos.c
drivers/usb/dwc3/dwc3-keystone.c
drivers/usb/dwc3/dwc3-omap.c
drivers/usb/dwc3/dwc3-st.c
of Linux Kernel.
This commit implements a driver compatible with "snps,dwc3", allowing to use the same binding in U-Boot. The glue layer can be simply implemented based on Simple Bus Uclass.
Signed-off-by Masahiro Yamada <[email protected]>
Reviewed-by Marek Vasut <[email protected]>
---
Quoted 6 lines
Quoted 3 lines
Changes in v2: None
 drivers/usb/host/xhci-dwc3.c | 71 +++++++++++++++++++++++++++++++++++++++++++-
"snps,dwc3" compatible is for the dual-role controller that implements both device and host controllers.
I know this fact.
The "snps,dwc3" on my SoC only works in host mode, though.
Quoted 1 line
So calling the driver xhci-dwc3.c is a bit misleading.

Quoted 5 lines

I think we have separate work for
- drivers/usb/host/xhci-dwc3.c (only for host mode)
- drivers/usb/dwc3/* (currently, for gadget ??)
This is unfortunate, though.

If we use the same compatible for both host and gadget, how do we specify in the device tree which driver to probe?

Quoted 64 lines

Quoted 55 lines


 1 file changed, 70 insertions(+), 1 deletion(-)

drivers/usb/host/xhci-dwc3.c +34 -1

index 33961cd..c7c8324 100644
@@ -9,8 +9,13 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <dm/device.h>
+#include <mapmem.h>
+#include <linux/io.h>
 #include <linux/usb/dwc3.h>
+#include <linux/sizes.h>
+
+#include "xhci.h"
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
 {

@@ -97,3 +102,67 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
      setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
                      GFLADJ_30MHZ(val));
 }
+
+struct dwc3_priv {
+     struct xhci_ctrl ctrl;  /* should be the first member */
+     void __iomem *regs;
+};
+
+static int dwc3_probe(struct udevice *dev)
+{
+     struct dwc3_priv *priv = dev_get_priv(dev);
+     struct xhci_hccr *hccr;
+     struct xhci_hcor *hcor;
+     fdt_addr_t base;
+     int ret;
+
+     base = dev_get_addr(dev);
+     if (base == FDT_ADDR_T_NONE)
+             return -EINVAL;
+
+     priv->regs = map_sysmem(base, SZ_32K);
+     if (!priv->regs)
+             return -ENOMEM;
+
+     hccr = priv->regs;
+
+     hcor = priv->regs + HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+
+     ret = dwc3_core_init(priv->regs + DWC3_REG_OFFSET);
+     if (ret) {

Quoted 8 lines

drivers/usb/host/xhci-dwc3.c void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) · line 138
Quoted 6 lines
drivers/usb/host/xhci-dwc3.c +6 -0
+             puts("XHCI: failed to initialize controller\n");
+             return ret;
+     }
+
+     /* We are hard-coding DWC3 core to Host Mode */
+     dwc3_set_mode(priv->regs + DWC3_REG_OFFSET, DWC3_GCTL_PRTCAP_HOST);
Why are we hard-coding it to host mode?

Quoted 7 lines

Because this file is used for host mode.
It is enabled by CONFIG_USB_XHCI_DWC3, like follows.
obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
Boards defining CONFIG_USB_XHCI_DWC3 expect
this driver works in the host mode, I guess.

OK as part of code will only be called for host mode.

Quoted 7 lines

Quoted 5 lines
We need to take into account
the dr_mode DT property and the Kconfig options to decide which mode we can operate in.

Quoted 5 lines

I thought drivers/usb/dwc3/* was working only for GADGET, because currently USB_DWC3 depends on (USB && USB_GADGET).
As far as I understand, it will work for host mode with your series applied. Correct?

I'm still unsure as to how all this fits in.

Quoted 4 lines

If so, cool!
I am happy to move to drivers/usb/dwc3/*.

Maybe Marek can share his view.

cheers,
-roger

Masahiro Yamada

author

2016-05-16 12:51 UTC #14 lore raw

PATCH v2 6/13 usb: dwc3: add UniPhier specific glue layer

In reply to Masahiro Yamada

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

Signed-off-by Masahiro Yamada <[email protected]>

Reviewed-by Marek Vasut <[email protected]>

---

Changes in v2:
- Fix build error
- Add missing PHY reset deassert

 drivers/usb/host/Kconfig         |   7 +++
 drivers/usb/host/Makefile        |   1 +
 drivers/usb/host/dwc3-uniphier.c | 119 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 127 insertions(+)
 create mode 100644 drivers/usb/host/dwc3-uniphier.c

drivers/usb/host/Kconfig +7 -0

index 89580cc..a6645dd 100644
@@ -24,6 +24,13 @@ config USB_XHCI_DWC3
 	  Say Y or if your system has a Dual Role SuperSpeed
 	  USB controller based on the DesignWare USB3 IP Core.
 
+config USB_DWC3_UNIPHIER
+	bool "DesignWare USB3 Host Support on UniPhier Platforms"
+	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
+	help
+	  Support of USB2/3 functionality in Socionext UniPhier platforms.
+	  Say 'Y' here if you have one such device.
+
 endif
 
 config USB_OHCI_GENERIC

drivers/usb/host/Makefile +1 -0

index 620d114..8b54fde 100644
@@ -56,6 +56,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 # xhci
 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o

drivers/usb/host/dwc3-uniphier.c new file +119 -0

119 lines not on this page · raw message

Signature · 1 line

1.9.1

Marek Vasut

Applied

2016-05-16 17:45 UTC #15 lore raw

PATCH v2 6/13 usb: dwc3: add UniPhier specific glue layer

Quoted 10 lines · Masahiro Yamada

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.
Signed-off-by Masahiro Yamada <[email protected]>
Reviewed-by Marek Vasut <[email protected]>
---
Changes in v2:
- Fix build error
- Add missing PHY reset deassert

Applied, thanks!

Signature · 2 lines

Best regards,
Marek Vasut

Masahiro Yamada

author

2016-05-16 12:51 UTC #16 lore raw

PATCH v2 7/13 ARM: uniphier: switch over to USB DM

In reply to Masahiro Yamada

Now UniPhier platform can completely switch over to Driver Model USB, which allows ARCH_UNIPHIER select DM_USB. Drop CONFIG_DM_USB=y of two of UniPhier defconfig files.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2: None

 arch/arm/Kconfig                    | 1 +
 configs/uniphier_ld4_sld8_defconfig | 1 -
 configs/uniphier_sld3_defconfig     | 1 -
 3 files changed, 1 insertion(+), 2 deletions(-)

arch/arm/Kconfig +1 -0

index 6b65d8e..59410cb 100644
@@ -723,6 +723,7 @@ config ARCH_UNIPHIER
 	select DM_SERIAL
 	select DM_I2C
 	select DM_MMC
+	select DM_USB
 	help
 	  Support for UniPhier SoC family developed by Socionext Inc.
 	  (formerly, System LSI Business Division of Panasonic Corporation)

configs/uniphier_ld4_sld8_defconfig +0 -1

index 22615a6..d13d112 100644
@@ -31,7 +31,6 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
-CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y

configs/uniphier_sld3_defconfig +0 -1

index 0965019..accbd8a 100644
@@ -28,7 +28,6 @@ CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SPL_NAND_DENALI=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
-CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #17 lore raw

PATCH v2 8/13 ARM: uniphier: enable DWC3 xHCI driver

In reply to Masahiro Yamada

Enable CONFIGs for the DWC3 core and UniPhier specific glue layer.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2: None

 configs/uniphier_ld20_defconfig      | 2 ++
 configs/uniphier_pro4_defconfig      | 2 ++
 configs/uniphier_pxs2_ld6b_defconfig | 2 ++
 3 files changed, 6 insertions(+)

configs/uniphier_ld20_defconfig +2 -0

index cbc65dd..ecf5649 100644
@@ -27,4 +27,6 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3_UNIPHIER=y
 CONFIG_USB_STORAGE=y

configs/uniphier_pro4_defconfig +2 -0

index 18f4caf..c9d104b 100644
@@ -31,4 +31,6 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3_UNIPHIER=y
 CONFIG_USB_STORAGE=y

configs/uniphier_pxs2_ld6b_defconfig +2 -0

index cf6d3e4..8356437 100644
@@ -32,4 +32,6 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3_UNIPHIER=y
 CONFIG_USB_STORAGE=y

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #18 lore raw

PATCH v2 9/13 usb: uniphier: remove UniPhier xHCI driver

In reply to Masahiro Yamada

UniPhier platform switched to DWC3 core with UniPhier specific glue layer to support USB3. This pre-DM driver is no longer needed.

Signed-off-by Masahiro Yamada <[email protected]>

Reviewed-by Marek Vasut <[email protected]>

---

Changes in v2: None

 drivers/usb/host/Kconfig         |  7 ----
 drivers/usb/host/Makefile        |  1 -
 drivers/usb/host/xhci-uniphier.c | 85 ----------------------------------------
 include/fdtdec.h                 |  1 -
 lib/fdtdec.c                     |  1 -
 5 files changed, 95 deletions(-)
 delete mode 100644 drivers/usb/host/xhci-uniphier.c

drivers/usb/host/Kconfig +0 -7

index a6645dd..3710588 100644
@@ -11,13 +11,6 @@ config USB_XHCI_HCD
 
 if USB_XHCI_HCD
 
-config USB_XHCI_UNIPHIER
-	bool "Support for UniPhier on-chip xHCI USB controller"
-	depends on ARCH_UNIPHIER
-	default y
-	---help---
-	  Enables support for the on-chip xHCI controller on UniPhier SoCs.
-
 config USB_XHCI_DWC3
 	bool "DesignWare USB3 DRD Core Support"
 	help

drivers/usb/host/Makefile +0 -1

index 8b54fde..eb85650 100644
@@ -63,7 +63,6 @@ obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
-obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o

drivers/usb/host/xhci-uniphier.c deleted +0 ~~-85~~

85 lines not on this page · raw message

include/fdtdec.h +0 -1

index 37d482a..d1fddaa 100644
@@ -158,7 +158,6 @@ enum fdt_compat_id {
 	COMPAT_AMS_AS3722,		/* AMS AS3722 PMIC */
 	COMPAT_INTEL_ICH_SPI,		/* Intel ICH7/9 SPI controller */
 	COMPAT_INTEL_QRK_MRC,		/* Intel Quark MRC */
-	COMPAT_SOCIONEXT_XHCI,		/* Socionext UniPhier xHCI */
 	COMPAT_INTEL_PCH,		/* Intel PCH */
 	COMPAT_ALTERA_SOCFPGA_DWMAC,	/* SoCFPGA Ethernet controller */
 	COMPAT_ALTERA_SOCFPGA_DWMMC,	/* SoCFPGA DWMMC controller */

lib/fdtdec.c +0 -1

index 70acc29..e316cc8 100644
@@ -63,7 +63,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(AMS_AS3722, "ams,as3722"),
 	COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
 	COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
-	COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
 	COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
 	COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
 	COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #19 lore raw

PATCH v2 10/13 ARM: uniphier: delete unnecessary xHCI pin-mux settings

In reply to Masahiro Yamada

Now UniPhier platform switched over to the DM-based xHCI driver. The pin-muxing for that is automatically cared by the pinctrl driver. These ad-hoc pin-muxing code is no longer needed.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2: None

 arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c | 12 ------------
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c | 11 -----------
 arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c |  7 -------
 arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c |  7 -------
 arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c | 11 -----------
 5 files changed, 48 deletions(-)

arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c +0 ~~-12~~

index 6066b16..0da280f 100644
@@ -31,16 +31,4 @@ void uniphier_ld20_pin_init(void)
 	sg_set_pinsel(17, 0, 8, 4);	/* NFD7    -> NFD7 */
 	sg_set_iectrl_range(3, 17);
 #endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
-	sg_set_pinsel(46, 0, 8, 4);	/* USB0VBUS -> USB0VBUS */
-	sg_set_pinsel(47, 0, 8, 4);	/* USB0OD   -> USB0OD */
-	sg_set_pinsel(48, 0, 8, 4);	/* USB1VBUS -> USB1VBUS */
-	sg_set_pinsel(49, 0, 8, 4);	/* USB1OD   -> USB1OD */
-	sg_set_pinsel(50, 0, 8, 4);	/* USB2VBUS -> USB2VBUS */
-	sg_set_pinsel(51, 0, 8, 4);	/* USB2OD   -> USB2OD */
-	sg_set_pinsel(52, 0, 8, 4);	/* USB3VBUS -> USB3VBUS */
-	sg_set_pinsel(53, 0, 8, 4);	/* USB3OD   -> USB3OD */
-	sg_set_iectrl_range(46, 53);
-#endif
 }

arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c +0 ~~-11~~

index 913722b..f3b7115 100644
@@ -32,15 +32,4 @@ void uniphier_ld6b_pin_init(void)
 	sg_set_pinsel(45, 0, 8, 4);	/* NFD6   -> NFD6 */
 	sg_set_pinsel(46, 0, 8, 4);	/* NFD7   -> NFD7 */
 #endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
-	sg_set_pinsel(56, 0, 8, 4);	/* USB0VBUS -> USB0VBUS */
-	sg_set_pinsel(57, 0, 8, 4);	/* USB0OD   -> USB0OD */
-	sg_set_pinsel(58, 0, 8, 4);	/* USB1VBUS -> USB1VBUS */
-	sg_set_pinsel(59, 0, 8, 4);	/* USB1OD   -> USB1OD */
-	sg_set_pinsel(60, 0, 8, 4);	/* USB2VBUS -> USB2VBUS */
-	sg_set_pinsel(61, 0, 8, 4);	/* USB2OD   -> USB2OD */
-	sg_set_pinsel(62, 0, 8, 4);	/* USB3VBUS -> USB3VBUS */
-	sg_set_pinsel(63, 0, 8, 4);	/* USB3OD   -> USB3OD */
-#endif
 }

arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c +0 -7

index 3796491..871d3ef 100644
@@ -33,12 +33,5 @@ void uniphier_pro4_pin_init(void)
 	/* sg_set_pinsel(132, 1, 4, 8); */	/* TXD2   -> XNFCE1 */
 #endif
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
-	sg_set_pinsel(180, 0, 4, 8);	/* USB0VBUS -> USB0VBUS */
-	sg_set_pinsel(181, 0, 4, 8);	/* USB0OD   -> USB0OD */
-	sg_set_pinsel(182, 0, 4, 8);	/* USB1VBUS -> USB1VBUS */
-	sg_set_pinsel(183, 0, 4, 8);	/* USB1OD   -> USB1OD */
-#endif
-
 	writel(1, SG_LOADPINCTRL);
 }

arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c +0 -7

index 32ba923..58dff18 100644
@@ -33,12 +33,5 @@ void uniphier_pro5_pin_init(void)
 	sg_set_pinsel(35, 0, 4, 8);	/* NFD7   -> NFD7 */
 #endif
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
-	sg_set_pinsel(124, 0, 4, 8);	/* USB0VBUS -> USB0VBUS */
-	sg_set_pinsel(125, 0, 4, 8);	/* USB0OD   -> USB0OD */
-	sg_set_pinsel(126, 0, 4, 8);	/* USB1VBUS -> USB1VBUS */
-	sg_set_pinsel(127, 0, 4, 8);	/* USB1OD   -> USB1OD */
-#endif
-
 	writel(1, SG_LOADPINCTRL);
 }

arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c +0 ~~-11~~

index 2d62ab3..fc59205 100644
@@ -32,15 +32,4 @@ void uniphier_pxs2_pin_init(void)
 	sg_set_pinsel(45, 8, 8, 4);	/* NFD6   -> NFD6 */
 	sg_set_pinsel(46, 8, 8, 4);	/* NFD7   -> NFD7 */
 #endif
-
-#ifdef CONFIG_USB_XHCI_UNIPHIER
-	sg_set_pinsel(56, 8, 8, 4);	/* USB0VBUS -> USB0VBUS */
-	sg_set_pinsel(57, 8, 8, 4);	/* USB0OD   -> USB0OD */
-	sg_set_pinsel(58, 8, 8, 4);	/* USB1VBUS -> USB1VBUS */
-	sg_set_pinsel(59, 8, 8, 4);	/* USB1OD   -> USB1OD */
-	sg_set_pinsel(60, 8, 8, 4);	/* USB2VBUS -> USB2VBUS */
-	sg_set_pinsel(61, 8, 8, 4);	/* USB2OD   -> USB2OD */
-	sg_set_pinsel(62, 8, 8, 4);	/* USB3VBUS -> USB3VBUS */
-	sg_set_pinsel(63, 8, 8, 4);	/* USB3OD   -> USB3OD */
-#endif
 }

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #20 lore raw

PATCH v2 11/13 ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG

In reply to Masahiro Yamada

Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2: None

 arch/arm/mach-uniphier/clk/clk-pro4.c | 6 +++---
 arch/arm/mach-uniphier/clk/clk-pro5.c | 6 +++---
 arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

arch/arm/mach-uniphier/clk/clk-pro4.c +3 -3

index 8746d7d..6a01543 100644
@@ -15,7 +15,7 @@ void uniphier_pro4_clk_init(void)
 
 	/* deassert reset */
 	tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
 		SC_RSTCTRL_NRST_GIO;
 #endif

@@ -31,7 +31,7 @@ void uniphier_pro4_clk_init(void)
 	writel(tmp, SC_RSTCTRL);
 	readl(SC_RSTCTRL); /* dummy read */
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp = readl(SC_RSTCTRL2);
 	tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
 	writel(tmp, SC_RSTCTRL2);

@@ -40,7 +40,7 @@ void uniphier_pro4_clk_init(void)
 
 	/* provide clocks */
 	tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
 		SC_CLKCTRL_CEN_GIO;
 #endif

arch/arm/mach-uniphier/clk/clk-pro5.c +3 -3

index 823bb06..dd86cad 100644
@@ -15,7 +15,7 @@ void uniphier_pro5_clk_init(void)
 
 	/* deassert reset */
 	tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
 #endif
 #ifdef CONFIG_NAND_DENALI

@@ -24,7 +24,7 @@ void uniphier_pro5_clk_init(void)
 	writel(tmp, SC_RSTCTRL);
 	readl(SC_RSTCTRL); /* dummy read */
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp = readl(SC_RSTCTRL2);
 	tmp |= SC_RSTCTRL2_NRST_USB3B1;
 	writel(tmp, SC_RSTCTRL2);

@@ -33,7 +33,7 @@ void uniphier_pro5_clk_init(void)
 
 	/* provide clocks */
 	tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
 		SC_CLKCTRL_CEN_GIO;
 #endif

arch/arm/mach-uniphier/clk/clk-pxs2.c +3 -3

index 76bf856..3b50a20 100644
@@ -15,7 +15,7 @@ void uniphier_pxs2_clk_init(void)
 
 	/* deassert reset */
 	tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
 #endif
 #ifdef CONFIG_UNIPHIER_ETH

@@ -27,7 +27,7 @@ void uniphier_pxs2_clk_init(void)
 	writel(tmp, SC_RSTCTRL);
 	readl(SC_RSTCTRL); /* dummy read */
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp = readl(SC_RSTCTRL2);
 	tmp |= SC_RSTCTRL2_NRST_USB3B1;
 	writel(tmp, SC_RSTCTRL2);

@@ -36,7 +36,7 @@ void uniphier_pxs2_clk_init(void)
 
 	/* provide clocks */
 	tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
 	tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
 		SC_CLKCTRL_CEN_GIO;
 #endif

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #21 lore raw

PATCH v2 12/13 ARM: dts: uniphier: add/update xHCI nodes

In reply to Masahiro Yamada

Adjust xHCI nodes to use the DWC3 core and the SoC-specific glue layer for former SoCs.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2: None

 arch/arm/dts/uniphier-ph1-ld20.dtsi    | 17 +++++++++++++++++
 arch/arm/dts/uniphier-ph1-pro4-ref.dts |  4 ++++
 arch/arm/dts/uniphier-ph1-pro4.dtsi    | 32 ++++++++++++++++++++++++--------
 arch/arm/dts/uniphier-ph1-pro5.dtsi    | 32 ++++++++++++++++++++++++--------
 arch/arm/dts/uniphier-proxstream2.dtsi | 32 ++++++++++++++++++++++++--------
 5 files changed, 93 insertions(+), 24 deletions(-)

arch/arm/dts/uniphier-ph1-ld20.dtsi +17 -0

index f9cc3c4..5e2b595 100644
@@ -256,6 +256,23 @@
 			#interrupt-cells = <3>;
 			interrupts = <1 9 4>;
 		};
+
+		usb: usb at 65b00000 {
+			compatible = "socionext,uniphier-ld20-dwc3";
+			reg = <0x65b00000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>,
+				    <&pinctrl_usb2>, <&pinctrl_usb3>;
+			dwc3 at 65a00000 {
+				compatible = "snps,dwc3";
+				reg = <0x65a00000 0x10000>;
+				interrupts = <0 134 4>;
+				tx-fifo-resize;
+			};
+		};
 	};
 };

arch/arm/dts/uniphier-ph1-pro4-ref.dts +4 -0

index 5be76e2..6cc5d1e 100644
@@ -71,6 +71,10 @@
 	status = "okay";
 };
 
+&usb1 {
+	status = "okay";
+};
+
 &usb2 {
 	status = "okay";
 };

arch/arm/dts/uniphier-ph1-pro4.dtsi +24 -8

index d5767b6..7f42bc2 100644
@@ -400,22 +400,38 @@
 		clocks = <&mio 4>, <&mio 6>;
 	};
 
-	usb0: usb at 65a00000 {
-		compatible = "socionext,uniphier-xhci", "generic-xhci";
+	usb0: usb at 65b00000 {
+		compatible = "socionext,uniphier-pro4-dwc3";
 		status = "disabled";
-		reg = <0x65a00000 0x100>;
-		interrupts = <0 134 4>;
+		reg = <0x65b00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>;
+		dwc3 at 65a00000 {
+			compatible = "snps,dwc3";
+			reg = <0x65a00000 0x10000>;
+			interrupts = <0 134 4>;
+			tx-fifo-resize;
+		};
 	};
 
-	usb1: usb at 65c00000 {
-		compatible = "socionext,uniphier-xhci", "generic-xhci";
+	usb1: usb at 65d00000 {
+		compatible = "socionext,uniphier-pro4-dwc3";
 		status = "disabled";
-		reg = <0x65c00000 0x100>;
-		interrupts = <0 137 4>;
+		reg = <0x65d00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>;
+		dwc3 at 65c00000 {
+			compatible = "snps,dwc3";
+			reg = <0x65c00000 0x10000>;
+			interrupts = <0 137 4>;
+			tx-fifo-resize;
+		};
 	};
 };

arch/arm/dts/uniphier-ph1-pro5.dtsi +24 -8

index bd1b4b1..3036a76 100644
@@ -379,22 +379,38 @@
 		bus-width = <4>;
 	};
 
-	usb0: usb at 65a00000 {
-		compatible = "socionext,uniphier-xhci", "generic-xhci";
+	usb0: usb at 65b00000 {
+		compatible = "socionext,uniphier-pro5-dwc3";
 		status = "disabled";
-		reg = <0x65a00000 0x100>;
-		interrupts = <0 134 4>;
+		reg = <0x65b00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>;
+		dwc3 at 65a00000 {
+			compatible = "snps,dwc3";
+			reg = <0x65a00000 0x10000>;
+			interrupts = <0 134 4>;
+			tx-fifo-resize;
+		};
 	};
 
-	usb1: usb at 65c00000 {
-		compatible = "socionext,uniphier-xhci", "generic-xhci";
+	usb1: usb at 65d00000 {
+		compatible = "socionext,uniphier-pro5-dwc3";
 		status = "disabled";
-		reg = <0x65c00000 0x100>;
-		interrupts = <0 137 4>;
+		reg = <0x65d00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
+		dwc3 at 65c00000 {
+			compatible = "snps,dwc3";
+			reg = <0x65c00000 0x10000>;
+			interrupts = <0 137 4>;
+			tx-fifo-resize;
+		};
 	};
 };

arch/arm/dts/uniphier-proxstream2.dtsi +24 -8

index 12968bd..8cff09c 100644
@@ -383,22 +383,38 @@
 		bus-width = <4>;
 	};
 
-	usb0: usb at 65a00000 {
-		compatible = "socionext,uniphier-xhci", "generic-xhci";
+	usb0: usb at 65b00000 {
+		compatible = "socionext,uniphier-pxs2-dwc3";
 		status = "disabled";
-		reg = <0x65a00000 0x100>;
-		interrupts = <0 134 4>;
+		reg = <0x65b00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
+		dwc3 at 65a00000 {
+			compatible = "snps,dwc3";
+			reg = <0x65a00000 0x10000>;
+			interrupts = <0 134 4>;
+			tx-fifo-resize;
+		};
 	};
 
-	usb1: usb at 65c00000 {
-		compatible = "socionext,uniphier-xhci", "generic-xhci";
+	usb1: usb at 65d00000 {
+		compatible = "socionext,uniphier-pxs2-dwc3";
 		status = "disabled";
-		reg = <0x65c00000 0x100>;
-		interrupts = <0 137 4>;
+		reg = <0x65d00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
+		dwc3 at 65c00000 {
+			compatible = "snps,dwc3";
+			reg = <0x65c00000 0x10000>;
+			interrupts = <0 137 4>;
+			tx-fifo-resize;
+		};
 	};
 };

Signature · 1 line

1.9.1

Masahiro Yamada

author

2016-05-16 12:51 UTC #22 lore raw

PATCH v2 13/13 ARM: uniphier: enable Generic EHCI for PH1-Pro4

In reply to Masahiro Yamada

On Driver Model USB, EHCI and xHCI can be enabled at the same time. PH1-Pro4 SoC has two EHCI cores and two xHCI cores, so enable the Generic EHCI driver.

Signed-off-by Masahiro Yamada <[email protected]>

---

Changes in v2: None

 configs/uniphier_pro4_defconfig | 2 ++
 1 file changed, 2 insertions(+)

configs/uniphier_pro4_defconfig +2 -0

index c9d104b..1e960b0 100644
@@ -33,4 +33,6 @@ CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3_UNIPHIER=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y

Signature · 1 line

1.9.1

Marek Vasut

2016-05-16 14:46 UTC #23 lore raw

v2 cover usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

In reply to Masahiro Yamada

Quoted 120 lines · Masahiro Yamada

 arch/arm/Kconfig                                 |   1 +
 arch/arm/dts/uniphier-ph1-ld20.dtsi              |  17 ++++
 arch/arm/dts/uniphier-ph1-pro4-ref.dts           |   4 +
 arch/arm/dts/uniphier-ph1-pro4.dtsi              |  32 ++++--
 arch/arm/dts/uniphier-ph1-pro5.dtsi              |  32 ++++--
 arch/arm/dts/uniphier-proxstream2.dtsi           |  32 ++++--
 arch/arm/mach-uniphier/clk/clk-pro4.c            |   6 +-
 arch/arm/mach-uniphier/clk/clk-pro5.c            |   6 +-
 arch/arm/mach-uniphier/clk/clk-pxs2.c            |   6 +-
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c    |  12 ---
 arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c    |  11 ---
 arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c    |   7 --
 arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c    |   7 --
 arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c    |  11 ---
 common/usb.c                                     |   2 +-
 configs/am437x_gp_evm_defconfig                  |   2 +
 configs/am437x_sk_evm_defconfig                  |   2 +
 configs/am43xx_evm_defconfig                     |   2 +
 configs/am43xx_evm_ethboot_defconfig             |   2 +
 configs/am43xx_evm_qspiboot_defconfig            |   2 +
 configs/am43xx_evm_usbhost_boot_defconfig        |   2 +
 configs/am57xx_evm_defconfig                     |   3 +
 configs/am57xx_evm_nodt_defconfig                |   3 +
 configs/bf526-ezbrd_defconfig                    |   1 +
 configs/bf527-ezkit-v2_defconfig                 |   1 +
 configs/bf527-ezkit_defconfig                    |   1 +
 configs/bf548-ezkit_defconfig                    |   1 +
 configs/cm_t43_defconfig                         |   3 +
 configs/dra72_evm_defconfig                      |   2 +
 configs/dra74_evm_defconfig                      |   2 +
 configs/dra7xx_evm_defconfig                     |   2 +
 configs/dra7xx_evm_qspiboot_defconfig            |   2 +
 configs/dra7xx_evm_uart3_defconfig               |   2 +
 configs/k2e_evm_defconfig                        |   3 +
 configs/k2g_evm_defconfig                        |   3 +
 configs/k2hk_evm_defconfig                       |   3 +
 configs/k2l_evm_defconfig                        |   3 +
 configs/ls1021aqds_ddr4_nor_defconfig            |   3 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig     |   3 +
 configs/ls1021aqds_nand_defconfig                |   3 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig     |   3 +
 configs/ls1021aqds_nor_defconfig                 |   3 +
 configs/ls1021aqds_nor_lpuart_defconfig          |   3 +
 configs/ls1021aqds_qspi_defconfig                |   3 +
 configs/ls1021aqds_sdcard_ifc_defconfig          |   3 +
 configs/ls1021aqds_sdcard_qspi_defconfig         |   3 +
 configs/ls1021atwr_nor_SECURE_BOOT_defconfig     |   3 +
 configs/ls1021atwr_nor_defconfig                 |   3 +
 configs/ls1021atwr_nor_lpuart_defconfig          |   3 +
 configs/ls1021atwr_qspi_defconfig                |   3 +
 configs/ls1021atwr_sdcard_ifc_defconfig          |   3 +
 configs/ls1021atwr_sdcard_qspi_defconfig         |   3 +
 configs/ls1043aqds_defconfig                     |   3 +
 configs/ls1043aqds_lpuart_defconfig              |   3 +
 configs/ls1043aqds_nand_defconfig                |   3 +
 configs/ls1043aqds_nor_ddr3_defconfig            |   3 +
 configs/ls1043aqds_qspi_defconfig                |   3 +
 configs/ls1043aqds_sdcard_ifc_defconfig          |   3 +
 configs/ls1043aqds_sdcard_qspi_defconfig         |   3 +
 configs/ls1043ardb_SECURE_BOOT_defconfig         |   3 +
 configs/ls1043ardb_defconfig                     |   3 +
 configs/ls1043ardb_nand_defconfig                |   3 +
 configs/ls1043ardb_sdcard_defconfig              |   3 +
 configs/ls2080aqds_SECURE_BOOT_defconfig         |   3 +
 configs/ls2080aqds_defconfig                     |   3 +
 configs/ls2080aqds_nand_defconfig                |   3 +
 configs/ls2080ardb_SECURE_BOOT_defconfig         |   3 +
 configs/ls2080ardb_defconfig                     |   3 +
 configs/ls2080ardb_nand_defconfig                |   3 +
 configs/odroid-xu3_defconfig                     |   2 +
 configs/peach-pi_defconfig                       |   2 +
 configs/peach-pit_defconfig                      |   2 +
 configs/smdk5420_defconfig                       |   2 +
 configs/uniphier_ld20_defconfig                  |   2 +
 configs/uniphier_ld4_sld8_defconfig              |   1 -
 configs/uniphier_pro4_defconfig                  |   4 +
 configs/uniphier_pxs2_ld6b_defconfig             |   2 +
 configs/uniphier_sld3_defconfig                  |   1 -
 configs/xilinx_zynqmp_ep_defconfig               |   2 +
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |   2 +
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig |   2 +
 configs/xilinx_zynqmp_zcu102_defconfig           |   2 +
 configs/xilinx_zynqmp_zcu102_revB_defconfig      |   2 +
 drivers/usb/host/Kconfig                         |  24 ++---
 drivers/usb/host/Makefile                        |   4 +-
 drivers/usb/host/dwc3-uniphier.c                 | 119 +++++++++++++++++++++++
 drivers/usb/host/xhci-dwc3.c                     |  71 +++++++++++++-
 drivers/usb/host/xhci-uniphier.c                 |  85 ----------------
 drivers/usb/host/xhci.h                          |   2 +
 include/configs/am43xx_evm.h                     |   2 -
 include/configs/am57xx_evm.h                     |   2 -
 include/configs/bf526-ezbrd.h                    |   1 -
 include/configs/bf527-ezkit.h                    |   1 -
 include/configs/bf548-ezkit.h                    |   1 -
 include/configs/cm_t43.h                         |   2 -
 include/configs/dra7xx_evm.h                     |   2 -
 include/configs/ds414.h                          |   3 +-
 include/configs/exynos5-common.h                 |   1 -
 include/configs/exynos5420-common.h              |   1 -
 include/configs/ls1021aqds.h                     |   2 -
 include/configs/ls1021atwr.h                     |   2 -
 include/configs/ls1043aqds.h                     |   2 -
 include/configs/ls1043ardb.h                     |   2 -
 include/configs/ls2080aqds.h                     |   2 -
 include/configs/ls2080ardb.h                     |   2 -

Quoted 9 lines

 include/configs/smdk5420.h                       |   1 -
 include/configs/ti_armv7_keystone2.h             |   2 -
 include/configs/xilinx_zynqmp.h                  |   2 -
 include/fdtdec.h                                 |   1 -
 lib/fdtdec.c                                     |   1 -
 110 files changed, 479 insertions(+), 218 deletions(-)
 create mode 100644 drivers/usb/host/dwc3-uniphier.c
 delete mode 100644 drivers/usb/host/xhci-uniphier.c

CCing Roger, so he can check this series. I will review it later today or tomorrow.

Signature · 2 lines

Best regards,
Marek Vasut

Masahiro Yamada

author

2016-05-17 11:01 UTC #24 lore raw

v2 cover usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

Hi Marek,

2016-05-16 23:46 GMT+09:00 Marek Vasut <[email protected]>:

Quoted 5 lines

Quoted 2 lines
 delete mode 100644 drivers/usb/host/xhci-uniphier.c
CCing Roger, so he can check this series. I will review it later today or tomorrow.

01-03 are probably OK, but 04- might have conflicts with Roger's work.

Maybe we should take our time to figure out how we should arrange this.

Signature · 2 lines

Best Regards
Masahiro Yamada

Masahiro Yamada

author

2016-05-19 06:46 UTC #25 lore raw

v2 cover usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

Hi Marek,

2016-05-17 20:01 GMT+09:00 Masahiro Yamada <[email protected]>:

Quoted 7 lines

Hi Marek,
2016-05-16 23:46 GMT+09:00 Marek Vasut <[email protected]>:
Quoted 2 lines
Quoted 2 lines
 delete mode 100644 drivers/usb/host/xhci-uniphier.c

Quoted 8 lines

Quoted 3 lines
CCing Roger, so he can check this series. I will review it later today or tomorrow.
01-03 are probably OK, but 04- might have conflicts with Roger's work.
Maybe we should take our time to figure out how we should arrange this.

Could you drop 04- from your repository, for now?

Perhaps, we should discuss this DWC3 topic more carefully?

Signature · 2 lines

Best Regards
Masahiro Yamada

Marek Vasut

2016-05-19 15:20 UTC #26 lore raw

v2 cover usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM

Quoted 17 lines · Masahiro Yamada

Hi Marek,
2016-05-17 20:01 GMT+09:00 Masahiro Yamada <[email protected]>:
Quoted 14 lines
Hi Marek,
2016-05-16 23:46 GMT+09:00 Marek Vasut <[email protected]>:
Quoted 5 lines
Quoted 2 lines
 delete mode 100644 drivers/usb/host/xhci-uniphier.c
CCing Roger, so he can check this series. I will review it later today or tomorrow.
01-03 are probably OK, but 04- might have conflicts with Roger's work.

Quoted 8 lines

Quoted 1 line
Maybe we should take our time to figure out how we should arrange this.
Could you drop 04- from your repository, for now?
Perhaps, we should discuss this DWC3 topic more carefully?

Dropped

Signature · 2 lines

Best regards,
Marek Vasut