mips: ath79: ar933x: Fix ethernet PHY mismatch

PATCH New Wills Wang 3 participants 19 messages May 22, 2016 – May 30, 2016 1 message not in the archive MIPS

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A message that is not in the archive (sent off-list or not yet received): [email protected]

Wills Wang

author

2016-05-22 03:59 UTC #1 lore raw

PATCH v2 2/7 mips: ath79: ar933x: Fix ethernet PHY mismatch

We need reset the Ethernet Switch analog part before operation, or the build-in Ethernet PHY don't work.

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
 arch/mips/mach-ath79/reset.c                    | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

arch/mips/mach-ath79/include/mach/ar71xx_regs.h +1 -0

index a8e51cb..dabcad0 100644
@@ -660,6 +660,7 @@
 
 #define AR933X_RESET_GE1_MDIO				BIT(23)
 #define AR933X_RESET_GE0_MDIO				BIT(22)
+#define AR933X_RESET_ETH_SWITCH_ANALOG			BIT(14)
 #define AR933X_RESET_GE1_MAC				BIT(13)
 #define AR933X_RESET_WMAC				BIT(11)
 #define AR933X_RESET_GE0_MAC				BIT(9)

arch/mips/mach-ath79/reset.c +2 -1

index 188eccb..a88bcbc 100644
@@ -81,7 +81,8 @@ static int eth_init_ar933x(void)
 					  MAP_NOCACHE);
 	const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO |
 			 AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO |
-			 AR933X_RESET_ETH_SWITCH;
+			 AR933X_RESET_ETH_SWITCH |
+			 AR933X_RESET_ETH_SWITCH_ANALOG;
 
 	/* Clear MDIO slave EN bit. */
 	clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));

Signature · 1 line

1.9.1

Marek Vasut

2016-05-22 11:05 UTC #2 lore raw

PATCH v2 2/7 mips: ath79: ar933x: Fix ethernet PHY mismatch

Quoted 5 lines · Wills Wang

We need reset the Ethernet Switch analog part before operation, or the build-in Ethernet PHY don't work.
Signed-off-by Wills Wang <[email protected]>
---

So what changed in V2 here ?

Quoted 31 lines

 arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
 arch/mips/mach-ath79/reset.c                    | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

arch/mips/mach-ath79/include/mach/ar71xx_regs.h +1 -0

index a8e51cb..dabcad0 100644
@@ -660,6 +660,7 @@
 
 #define AR933X_RESET_GE1_MDIO				BIT(23)
 #define AR933X_RESET_GE0_MDIO				BIT(22)
+#define AR933X_RESET_ETH_SWITCH_ANALOG			BIT(14)
 #define AR933X_RESET_GE1_MAC				BIT(13)
 #define AR933X_RESET_WMAC				BIT(11)
 #define AR933X_RESET_GE0_MAC				BIT(9)

arch/mips/mach-ath79/reset.c +2 -1

index 188eccb..a88bcbc 100644
@@ -81,7 +81,8 @@ static int eth_init_ar933x(void)
 					  MAP_NOCACHE);
 	const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO |
 			 AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO |
-			 AR933X_RESET_ETH_SWITCH;
+			 AR933X_RESET_ETH_SWITCH |
+			 AR933X_RESET_ETH_SWITCH_ANALOG;
 
 	/* Clear MDIO slave EN bit. */
 	clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));

Signature · 2 lines

Best regards,
Marek Vasut

Wills Wang

author

2016-05-22 11:20 UTC #3 lore raw

PATCH v2 2/7 mips: ath79: ar933x: Fix ethernet PHY mismatch

Quoted 7 lines · Marek Vasut

Quoted 5 lines · Wills Wang
We need reset the Ethernet Switch analog part before operation, or the build-in Ethernet PHY don't work.
Signed-off-by Wills Wang <[email protected]>
---
So what changed in V2 here ?

I change commit message according to daniel's email.

Quoted 32 lines

Quoted 31 lines

  arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
  arch/mips/mach-ath79/reset.c                    | 3 ++-
  2 files changed, 3 insertions(+), 1 deletion(-)

arch/mips/mach-ath79/include/mach/ar71xx_regs.h +1 -0

index a8e51cb..dabcad0 100644
@@ -660,6 +660,7 @@
 
  #define AR933X_RESET_GE1_MDIO				BIT(23)
  #define AR933X_RESET_GE0_MDIO				BIT(22)
+#define AR933X_RESET_ETH_SWITCH_ANALOG			BIT(14)
  #define AR933X_RESET_GE1_MAC				BIT(13)
  #define AR933X_RESET_WMAC				BIT(11)
  #define AR933X_RESET_GE0_MAC				BIT(9)

arch/mips/mach-ath79/reset.c +2 -1

index 188eccb..a88bcbc 100644
@@ -81,7 +81,8 @@ static int eth_init_ar933x(void)
  					  MAP_NOCACHE);
  	const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO |
  			 AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO |
-			 AR933X_RESET_ETH_SWITCH;
+			 AR933X_RESET_ETH_SWITCH |
+			 AR933X_RESET_ETH_SWITCH_ANALOG;
 
  	/* Clear MDIO slave EN bit. */
  	clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));

Signature · 2 lines

Best Regards
Wills

Daniel Schwierzeck

2016-05-25 23:29 UTC #4 lore raw

PATCH v2 2/7 mips: ath79: ar933x: Fix ethernet PHY mismatch

In reply to Wills Wang

Am 22.05.2016 um 05:59 schrieb Wills Wang:

Quoted 10 lines

We need reset the Ethernet Switch analog part before operation, or the build-in Ethernet PHY don't work.
Signed-off-by Wills Wang <[email protected]>
---
 arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
 arch/mips/mach-ath79/reset.c                    | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

applied to u-boot-mips, thanks.

Signature · 9 lines

- Daniel

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Wills Wang

author

2016-05-22 03:59 UTC #5 lore raw

PATCH 3/7 mips: ath79: Use uniform header for reset

In reply to a message not in the archive

Collect all reset operation on platform and move them into a uniform header

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
 arch/mips/mach-ath79/include/mach/reset.h | 2 ++
 board/tplink/wdr4300/wdr4300.c            | 1 +
 3 files changed, 3 insertions(+), 3 deletions(-)

arch/mips/mach-ath79/include/mach/ath79.h +0 -3

index 17af082..18d1e26 100644
@@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
 	return soc_is_tp9343() || soc_is_qca9561();
 }
 
-int ath79_eth_reset(void);
-int ath79_usb_reset(void);
-
 void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
 void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);

arch/mips/mach-ath79/include/mach/reset.h +2 -0

index c383bfe..7721e1d 100644
@@ -10,5 +10,7 @@
 #include <linux/types.h>
 
 u32 get_bootstrap(void);
+int ath79_eth_reset(void);
+int ath79_usb_reset(void);
 
 #endif /* __ASM_MACH_RESET_H */

board/tplink/wdr4300/wdr4300.c +1 -0

index 6e070fd..8382ce0 100644
@@ -9,6 +9,7 @@
 #include <asm/addrspace.h>
 #include <asm/types.h>
 #include <mach/ath79.h>
+#include <mach/reset.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ddr.h>
 #include <debug_uart.h>

Signature · 1 line

1.9.1

Marek Vasut

2016-05-22 11:08 UTC #6 lore raw

PATCH 3/7 mips: ath79: Use uniform header for reset

Quoted 29 lines · Wills Wang

Collect all reset operation on platform and move them into a uniform header

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
 arch/mips/mach-ath79/include/mach/reset.h | 2 ++
 board/tplink/wdr4300/wdr4300.c            | 1 +
 3 files changed, 3 insertions(+), 3 deletions(-)

arch/mips/mach-ath79/include/mach/ath79.h +0 -3

index 17af082..18d1e26 100644
@@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
 	return soc_is_tp9343() || soc_is_qca9561();
 }
 
-int ath79_eth_reset(void);
-int ath79_usb_reset(void);
-
 void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
 void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);

arch/mips/mach-ath79/include/mach/reset.h +0 -0

index c383bfe..7721e1d 100644

arch/mips/mach-ath79/include/mach/reset.h line 14

Quoted 5 lines

arch/mips/mach-ath79/include/mach/reset.h +2 -0

@@ -10,5 +10,7 @@
 #include <linux/types.h>
 
 u32 get_bootstrap(void);
+int ath79_eth_reset(void);
+int ath79_usb_reset(void);

By moving the prototype into reset.h :
- New functions are added to a file which can be almost removed
- You need to include two headers now

So drop this patch and instead focus on getting rid of reset.h

Quoted 14 lines

arch/mips/mach-ath79/include/mach/reset.h +0 -0

 #endif /* __ASM_MACH_RESET_H */

board/tplink/wdr4300/wdr4300.c +1 -0

index 6e070fd..8382ce0 100644
@@ -9,6 +9,7 @@
 #include <asm/addrspace.h>
 #include <asm/types.h>
 #include <mach/ath79.h>
+#include <mach/reset.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ddr.h>
 #include <debug_uart.h>

Signature · 2 lines

Best regards,
Marek Vasut

Wills Wang

author

2016-05-22 11:29 UTC #7 lore raw

PATCH 3/7 mips: ath79: Use uniform header for reset

Quoted 32 lines · Marek Vasut

Quoted 31 lines · Wills Wang

Collect all reset operation on platform and move them into a uniform header

Signed-off-by Wills Wang <[email protected]>

---

  arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
  arch/mips/mach-ath79/include/mach/reset.h | 2 ++
  board/tplink/wdr4300/wdr4300.c            | 1 +
  3 files changed, 3 insertions(+), 3 deletions(-)

arch/mips/mach-ath79/include/mach/ath79.h +0 -3

index 17af082..18d1e26 100644
@@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
  	return soc_is_tp9343() || soc_is_qca9561();
  }
 
-int ath79_eth_reset(void);
-int ath79_usb_reset(void);
-
  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
  void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);

arch/mips/mach-ath79/include/mach/reset.h +0 -0

index c383bfe..7721e1d 100644
@@ -10,5 +10,7 @@
  #include <linux/types.h>

Quoted 8 lines

arch/mips/mach-ath79/include/mach/reset.h line 14
Quoted 3 lines
arch/mips/mach-ath79/include/mach/reset.h +2 -0
  u32 get_bootstrap(void);
+int ath79_eth_reset(void);
+int ath79_usb_reset(void);
By moving the prototype into reset.h :
- New functions are added to a file which can be almost removed
- You need to include two headers now
So drop this patch and instead focus on getting rid of reset.h

You mean we should use a header "ath79.h" for all?

Quoted 15 lines

Quoted 14 lines

arch/mips/mach-ath79/include/mach/reset.h +0 -0

  #endif /* __ASM_MACH_RESET_H */

board/tplink/wdr4300/wdr4300.c +1 -0

index 6e070fd..8382ce0 100644
@@ -9,6 +9,7 @@
  #include <asm/addrspace.h>
  #include <asm/types.h>
  #include <mach/ath79.h>
+#include <mach/reset.h>
  #include <mach/ar71xx_regs.h>
  #include <mach/ddr.h>
  #include <debug_uart.h>

Signature · 2 lines

Best Regards
Wills

Marek Vasut

2016-05-22 11:32 UTC #8 lore raw

PATCH 3/7 mips: ath79: Use uniform header for reset

Quoted 44 lines · Wills Wang

Quoted 41 lines · Marek Vasut
Quoted 32 lines · Wills Wang
Collect all reset operation on platform and move them into a uniform header
Signed-off-by Wills Wang <[email protected]>
---
  arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
  arch/mips/mach-ath79/include/mach/reset.h | 2 ++
  board/tplink/wdr4300/wdr4300.c            | 1 +
  3 files changed, 3 insertions(+), 3 deletions(-)
arch/mips/mach-ath79/include/mach/ath79.h +0 -2
index 17af082..18d1e26 100644
@@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
      return soc_is_tp9343() || soc_is_qca9561();
  }
  -int ath79_eth_reset(void);
-int ath79_usb_reset(void);
-
  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const
 u16 ahb_mhz);
  void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const
u16 ahb_mhz);
diff --git a/arch/mips/mach-ath79/include/mach/reset.h
b/arch/mips/mach-ath79/include/mach/reset.h index c383bfe..7721e1d 100644
arch/mips/mach-ath79/include/mach/reset.h line 13
Quoted 4 lines
arch/mips/mach-ath79/include/mach/reset.h +2 -0
@@ -10,5 +10,7 @@
  #include <linux/types.h>
    u32 get_bootstrap(void);
+int ath79_eth_reset(void);
+int ath79_usb_reset(void);
By moving the prototype into reset.h :
- New functions are added to a file which can be almost removed
- You need to include two headers now

Quoted 2 lines

Quoted 1 line
So drop this patch and instead focus on getting rid of reset.h
You mean we should use a header "ath79.h" for all?

Yes, having one header per function makes no sense and ath79.h already has multiple function prototypes in it.

Signature · 2 lines

Best regards,
Marek Vasut

Daniel Schwierzeck

2016-05-30 10:10 UTC #9 lore raw

PATCH 3/7 mips: ath79: Use uniform header for reset

Am 22.05.2016 um 13:32 schrieb Marek Vasut:

Quoted 45 lines · Wills Wang

Quoted 44 lines · Marek Vasut
Quoted 41 lines · Wills Wang
Quoted 32 lines
Collect all reset operation on platform and move them into a uniform header
Signed-off-by Wills Wang <[email protected]>
---
  arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
  arch/mips/mach-ath79/include/mach/reset.h | 2 ++
  board/tplink/wdr4300/wdr4300.c            | 1 +
  3 files changed, 3 insertions(+), 3 deletions(-)
arch/mips/mach-ath79/include/mach/ath79.h +0 -2
index 17af082..18d1e26 100644
@@ -140,9 +140,6 @@ static inline int soc_is_qca956x(void)
      return soc_is_tp9343() || soc_is_qca9561();
  }
  -int ath79_eth_reset(void);
-int ath79_usb_reset(void);
-
  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const
 u16 ahb_mhz);
  void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const
u16 ahb_mhz);
diff --git a/arch/mips/mach-ath79/include/mach/reset.h
b/arch/mips/mach-ath79/include/mach/reset.h index c383bfe..7721e1d 100644
arch/mips/mach-ath79/include/mach/reset.h line 13
Quoted 4 lines
arch/mips/mach-ath79/include/mach/reset.h +2 -0
@@ -10,5 +10,7 @@
  #include <linux/types.h>
    u32 get_bootstrap(void);
+int ath79_eth_reset(void);
+int ath79_usb_reset(void);
By moving the prototype into reset.h :
- New functions are added to a file which can be almost removed
- You need to include two headers now

Quoted 6 lines

Quoted 2 lines
Quoted 1 line
So drop this patch and instead focus on getting rid of reset.h
You mean we should use a header "ath79.h" for all?
Yes, having one header per function makes no sense and ath79.h already has multiple function prototypes in it.

@Wills, could you please send an updated series with patches 3/7 to 7/7 which addresses Marek's comments? The merge window closes on the 4th of June. You can also send patch 7/7 alone to enable ethernet on AP121. Thanks.

Signature · 9 lines

- Daniel

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Wills Wang

author

2016-05-22 03:59 UTC #10 lore raw

PATCH 4/7 mips: ath79: Rename get_bootstrap into ath79_get_bootstrap

In reply to a message not in the archive

Add a platform prefix for function name in order to make more readable

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/ar933x/clk.c         | 2 +-
 arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
 arch/mips/mach-ath79/ar934x/clk.c         | 4 ++--
 arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
 arch/mips/mach-ath79/include/mach/reset.h | 2 +-
 arch/mips/mach-ath79/qca953x/clk.c        | 2 +-
 arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
 arch/mips/mach-ath79/reset.c              | 2 +-
 8 files changed, 9 insertions(+), 9 deletions(-)

arch/mips/mach-ath79/ar933x/clk.c +1 -1

index 9fcd496..2a07f09 100644
@@ -17,7 +17,7 @@ static u32 ar933x_get_xtal(void)
 {
 	u32 val;
 
-	val = get_bootstrap();
+	val = ath79_get_bootstrap();
 	if (val & AR933X_BOOTSTRAP_REF_CLK_40)
 		return 40000000;
 	else

arch/mips/mach-ath79/ar933x/ddr.c +1 -1

index 7f20d34..84e1cfa 100644
@@ -114,7 +114,7 @@ void ddr_init(void)
 	writel(DDR_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG);
 	writel(DDR_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2);
 
-	val = get_bootstrap();
+	val = ath79_get_bootstrap();
 	if (val & AR933X_BOOTSTRAP_DDR2) {
 		/* AHB maximum timeout */
 		writel(0xfffff, regs + AR933X_DDR_REG_TIMEOUT_MAX);

arch/mips/mach-ath79/ar934x/clk.c +2 -2

index 9c65184..fdbbc80 100644
@@ -119,7 +119,7 @@ void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
 	writel(0x03000000, srif_regs + 0x188); /* Undocumented reg :-) */
 
 	/* Test for 40MHz XTAL */
-	reg = get_bootstrap();
+	reg = ath79_get_bootstrap();
 	if (reg & AR934X_BOOTSTRAP_REF_CLK_40) {
 		xtal_40 = 1;
 		cpu_srif = 0x41c00000;

@@ -214,7 +214,7 @@ static u32 ar934x_get_xtal(void)
 {
 	u32 val;
 
-	val = get_bootstrap();
+	val = ath79_get_bootstrap();
 	if (val & AR934X_BOOTSTRAP_REF_CLK_40)
 		return 40000000;
 	else

arch/mips/mach-ath79/ar934x/ddr.c +1 -1

index 4621d58..2ebb89b 100644
@@ -45,7 +45,7 @@ void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
 	ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE,
 			       MAP_NOCACHE);
 
-	reg = get_bootstrap();
+	reg = ath79_get_bootstrap();
 	if (reg & AR934X_BOOTSTRAP_SDRAM_DISABLED) {	/* DDR */
 		if (reg & AR934X_BOOTSTRAP_DDR1) {	/* DDR 1 */
 			memtype = AR934X_DDR1;

arch/mips/mach-ath79/include/mach/reset.h +1 -1

index 7721e1d..693a59d 100644
@@ -9,7 +9,7 @@
 
 #include <linux/types.h>
 
-u32 get_bootstrap(void);
+u32 ath79_get_bootstrap(void);
 int ath79_eth_reset(void);
 int ath79_usb_reset(void);

arch/mips/mach-ath79/qca953x/clk.c +1 -1

index ef0a28e..882f9c8 100644
@@ -17,7 +17,7 @@ static u32 qca953x_get_xtal(void)
 {
 	u32 val;
 
-	val = get_bootstrap();
+	val = ath79_get_bootstrap();
 	if (val & QCA953X_BOOTSTRAP_REF_CLK_40)
 		return 40000000;
 	else

arch/mips/mach-ath79/qca953x/ddr.c +1 -1

index ac0130c..41ad113 100644
@@ -226,7 +226,7 @@ void ddr_init(void)
 
 	regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE,
 			   MAP_NOCACHE);
-	val = get_bootstrap();
+	val = ath79_get_bootstrap();
 	if (val & QCA953X_BOOTSTRAP_DDR1) {
 		writel(DDR_CTL_CONFIG_VAL, regs + QCA953X_DDR_REG_CTL_CONF);
 		udelay(10);

arch/mips/mach-ath79/reset.c +1 -1

index a88bcbc..33bf979 100644
@@ -45,7 +45,7 @@ void _machine_restart(void)
 		/* NOP */;
 }
 
-u32 get_bootstrap(void)
+u32 ath79_get_bootstrap(void)
 {
 	void __iomem *base;
 	u32 reg = 0;

Signature · 1 line

1.9.1

Marek Vasut

2016-05-22 11:09 UTC #11 lore raw

PATCH 4/7 mips: ath79: Rename get_bootstrap into ath79_get_bootstrap

Quoted 5 lines · Wills Wang

Add a platform prefix for function name in order to make more readable
Signed-off-by Wills Wang <[email protected]>
---

Quoted 9 lines

 arch/mips/mach-ath79/ar933x/clk.c         | 2 +-
 arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
 arch/mips/mach-ath79/ar934x/clk.c         | 4 ++--
 arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
 arch/mips/mach-ath79/include/mach/reset.h | 2 +-
 arch/mips/mach-ath79/qca953x/clk.c        | 2 +-
 arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
 arch/mips/mach-ath79/reset.c              | 2 +-
 8 files changed, 9 insertions(+), 9 deletions(-)

Acked-by Marek Vasut <[email protected]>

Signature · 2 lines

Best regards,
Marek Vasut

Wills Wang

author

2016-05-22 03:59 UTC #12 lore raw

PATCH 5/7 mips: ath79: Unify DDR initialization entry for ar934x

In reply to a message not in the archive

Use function "ddr_init" for ath79 platform DDR initialization, and put it into mach/ddr.h

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
 arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
 arch/mips/mach-ath79/include/mach/ath79.h | 1 -
 arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
 arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
 board/qca/ap121/ap121.c                   | 2 +-
 board/qca/ap143/ap143.c                   | 2 +-
 board/tplink/wdr4300/wdr4300.c            | 2 +-
 8 files changed, 7 insertions(+), 8 deletions(-)

arch/mips/mach-ath79/ar933x/ddr.c +1 -1

index 84e1cfa..b5940cb 100644
@@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DDR_TAP_VAL0            0x08
 #define DDR_TAP_VAL1            0x09
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *regs;
 	u32 val;

arch/mips/mach-ath79/ar934x/ddr.c +1 -1

index 2ebb89b..c467fb2 100644
@@ -35,7 +35,7 @@ static const struct ar934x_mem_config ar934x_mem_config[] = {
 	[AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
 };
 
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *ddr_regs;
 	const struct ar934x_mem_config *memcfg;

arch/mips/mach-ath79/include/mach/ath79.h +0 -1

index 18d1e26..fdc1149 100644
@@ -141,6 +141,5 @@ static inline int soc_is_qca956x(void)
 }
 
 void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
 
 #endif /* __ASM_MACH_ATH79_H */

arch/mips/mach-ath79/include/mach/ddr.h +1 -1

index 181179a..b6f46ce 100644
@@ -7,7 +7,7 @@
 #ifndef __ASM_MACH_DDR_H
 #define __ASM_MACH_DDR_H
 
-void ddr_init(void);
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
 void ddr_tap_tuning(void);
 
 #endif /* __ASM_MACH_DDR_H */

arch/mips/mach-ath79/qca953x/ddr.c +1 -1

index 41ad113..180e600 100644
@@ -219,7 +219,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DDR_TAP_MAGIC_VAL       0xaa55aa55
 #define DDR_TAP_MAX_VAL         0x40
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *regs;
 	u32 val;

board/qca/ap121/ap121.c +1 -1

index d6c60fe..b0e1993 100644
@@ -45,6 +45,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
-	ddr_init();
+	ddr_init(400, 400, 200);
 	return 0;
 }

board/qca/ap143/ap143.c +1 -1

index 1572472..406c988 100644
@@ -61,6 +61,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
-	ddr_init();
+	ddr_init(650, 400, 200);
 	return 0;
 }

board/tplink/wdr4300/wdr4300.c +1 -1

index 8382ce0..bff3938 100644
@@ -64,7 +64,7 @@ int board_early_init_f(void)
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 	ar934x_pll_init(560, 480, 240);
-	ar934x_ddr_init(560, 480, 240);
+	ddr_init(560, 480, 240);
 #endif
 
 	wdr4300_usb_start();

Signature · 1 line

1.9.1

Marek Vasut

2016-05-22 11:13 UTC #13 lore raw

PATCH 5/7 mips: ath79: Unify DDR initialization entry for ar934x

Quoted 21 lines · Wills Wang

Use function "ddr_init" for ath79 platform DDR initialization, and put it into mach/ddr.h

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
 arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
 arch/mips/mach-ath79/include/mach/ath79.h | 1 -
 arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
 arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
 board/qca/ap121/ap121.c                   | 2 +-
 board/qca/ap143/ap143.c                   | 2 +-
 board/tplink/wdr4300/wdr4300.c            | 2 +-
 8 files changed, 7 insertions(+), 8 deletions(-)

arch/mips/mach-ath79/ar933x/ddr.c +0 -0

index 84e1cfa..b5940cb 100644

arch/mips/mach-ath79/ar933x/ddr.c DECLARE_GLOBAL_DATA_PTR; · line 106

Quoted 5 lines

arch/mips/mach-ath79/ar933x/ddr.c +1 -1

@@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DDR_TAP_VAL0            0x08
 #define DDR_TAP_VAL1            0x09
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Call it ar933x_ddr_init() here

arch/mips/mach-ath79/ar934x/ddr.c static const struct ar934x_mem_config ar934x_mem_config[] = { · line 38

Quoted 13 lines

arch/mips/mach-ath79/ar933x/ddr.c +0 -0

 {
 	void __iomem *regs;
 	u32 val;

arch/mips/mach-ath79/ar934x/ddr.c +1 -1

index 2ebb89b..c467fb2 100644
@@ -35,7 +35,7 @@ static const struct ar934x_mem_config ar934x_mem_config[] = {
 	[AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
 };
 
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Keep this one. If you want to have ddr_init() as a universal function, that's fine. But consider the situation where you want to have a single u-boot binary for multiple ar9xxx . In that case, you would need all of those different ar9xxx_ddr_init() functions and you'd need some universal function (ath79_ddr_init() ?) which would in turn call the right ar9xxx_ddr_init() .

Quoted 78 lines

arch/mips/mach-ath79/ar934x/ddr.c +0 -0

 {
 	void __iomem *ddr_regs;
 	const struct ar934x_mem_config *memcfg;

arch/mips/mach-ath79/include/mach/ath79.h +0 -1

index 18d1e26..fdc1149 100644
@@ -141,6 +141,5 @@ static inline int soc_is_qca956x(void)
 }
 
 void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
 
 #endif /* __ASM_MACH_ATH79_H */

arch/mips/mach-ath79/include/mach/ddr.h +1 -1

index 181179a..b6f46ce 100644
@@ -7,7 +7,7 @@
 #ifndef __ASM_MACH_DDR_H
 #define __ASM_MACH_DDR_H
 
-void ddr_init(void);
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
 void ddr_tap_tuning(void);
 
 #endif /* __ASM_MACH_DDR_H */

arch/mips/mach-ath79/qca953x/ddr.c +1 -1

index 41ad113..180e600 100644
@@ -219,7 +219,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DDR_TAP_MAGIC_VAL       0xaa55aa55
 #define DDR_TAP_MAX_VAL         0x40
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *regs;
 	u32 val;

board/qca/ap121/ap121.c +1 -1

index d6c60fe..b0e1993 100644
@@ -45,6 +45,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
-	ddr_init();
+	ddr_init(400, 400, 200);
 	return 0;
 }

board/qca/ap143/ap143.c +1 -1

index 1572472..406c988 100644
@@ -61,6 +61,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
-	ddr_init();
+	ddr_init(650, 400, 200);
 	return 0;
 }

board/tplink/wdr4300/wdr4300.c +1 -1

index 8382ce0..bff3938 100644
@@ -64,7 +64,7 @@ int board_early_init_f(void)
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 	ar934x_pll_init(560, 480, 240);
-	ar934x_ddr_init(560, 480, 240);
+	ddr_init(560, 480, 240);
 #endif
 
 	wdr4300_usb_start();

Signature · 2 lines

Best regards,
Marek Vasut

Wills Wang

author

2016-05-22 11:35 UTC #14 lore raw

PATCH 5/7 mips: ath79: Unify DDR initialization entry for ar934x

Quoted 40 lines · Marek Vasut

Quoted 21 lines · Wills Wang

Use function "ddr_init" for ath79 platform DDR initialization, and put it into mach/ddr.h

Signed-off-by Wills Wang <[email protected]>

---

  arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
  arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
  arch/mips/mach-ath79/include/mach/ath79.h | 1 -
  arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
  arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
  board/qca/ap121/ap121.c                   | 2 +-
  board/qca/ap143/ap143.c                   | 2 +-
  board/tplink/wdr4300/wdr4300.c            | 2 +-
  8 files changed, 7 insertions(+), 8 deletions(-)

arch/mips/mach-ath79/ar933x/ddr.c +0 -0

index 84e1cfa..b5940cb 100644

arch/mips/mach-ath79/ar933x/ddr.c DECLARE_GLOBAL_DATA_PTR; · line 106

Quoted 5 lines

arch/mips/mach-ath79/ar933x/ddr.c +1 -1

@@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #define DDR_TAP_VAL0            0x08
  #define DDR_TAP_VAL1            0x09
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)

Call it ar933x_ddr_init() here

Quoted 11 lines

arch/mips/mach-ath79/ar933x/ddr.c +0 -0

  {
  	void __iomem *regs;
  	u32 val;

arch/mips/mach-ath79/ar934x/ddr.c +0 -0

index 2ebb89b..c467fb2 100644
@@ -35,7 +35,7 @@ static const struct ar934x_mem_config ar934x_mem_config[] = {
  	[AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
  };

Quoted 8 lines

arch/mips/mach-ath79/ar934x/ddr.c static const struct ar934x_mem_config ar934x_mem_config[] = { · line 38
Quoted 2 lines
arch/mips/mach-ath79/ar934x/ddr.c +1 -1
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
Keep this one. If you want to have ddr_init() as a universal function, that's fine. But consider the situation where you want to have a single u-boot binary for multiple ar9xxx . In that case, you would need all of those different ar9xxx_ddr_init() functions and you'd need some universal function (ath79_ddr_init() ?) which would in turn call the right ar9xxx_ddr_init() .

You mean like this:

void ath79_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz) {

     if (soc_is_ar933x())
         ar933x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
     else if (soc_is_ar934x())
         ar934x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
     ...

}

Quoted 79 lines

Quoted 78 lines

arch/mips/mach-ath79/ar934x/ddr.c +0 -0

  {
  	void __iomem *ddr_regs;
  	const struct ar934x_mem_config *memcfg;

arch/mips/mach-ath79/include/mach/ath79.h +0 -1

index 18d1e26..fdc1149 100644
@@ -141,6 +141,5 @@ static inline int soc_is_qca956x(void)
  }
 
  void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
 
  #endif /* __ASM_MACH_ATH79_H */

arch/mips/mach-ath79/include/mach/ddr.h +1 -1

index 181179a..b6f46ce 100644
@@ -7,7 +7,7 @@
  #ifndef __ASM_MACH_DDR_H
  #define __ASM_MACH_DDR_H
 
-void ddr_init(void);
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
  void ddr_tap_tuning(void);
 
  #endif /* __ASM_MACH_DDR_H */

arch/mips/mach-ath79/qca953x/ddr.c +1 -1

index 41ad113..180e600 100644
@@ -219,7 +219,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #define DDR_TAP_MAGIC_VAL       0xaa55aa55
  #define DDR_TAP_MAX_VAL         0x40
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
  {
  	void __iomem *regs;
  	u32 val;

board/qca/ap121/ap121.c +1 -1

index d6c60fe..b0e1993 100644
@@ -45,6 +45,6 @@ int board_early_init_f(void)
  #ifdef CONFIG_DEBUG_UART
  	debug_uart_init();
  #endif
-	ddr_init();
+	ddr_init(400, 400, 200);
  	return 0;
  }

board/qca/ap143/ap143.c +1 -1

index 1572472..406c988 100644
@@ -61,6 +61,6 @@ int board_early_init_f(void)
  #ifdef CONFIG_DEBUG_UART
  	debug_uart_init();
  #endif
-	ddr_init();
+	ddr_init(650, 400, 200);
  	return 0;
  }

board/tplink/wdr4300/wdr4300.c +1 -1

index 8382ce0..bff3938 100644
@@ -64,7 +64,7 @@ int board_early_init_f(void)
 
  #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  	ar934x_pll_init(560, 480, 240);
-	ar934x_ddr_init(560, 480, 240);
+	ddr_init(560, 480, 240);
  #endif
 
  	wdr4300_usb_start();

Signature · 2 lines

Best Regards
Wills

Marek Vasut

2016-05-22 12:23 UTC #15 lore raw

PATCH 5/7 mips: ath79: Unify DDR initialization entry for ar934x

Quoted 59 lines · Wills Wang

Quoted 42 lines · Marek Vasut
Quoted 22 lines · Wills Wang
Use function "ddr_init" for ath79 platform DDR initialization, and put it into mach/ddr.h
Signed-off-by Wills Wang <[email protected]>
---
  arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
  arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
  arch/mips/mach-ath79/include/mach/ath79.h | 1 -
  arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
  arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
  board/qca/ap121/ap121.c                   | 2 +-
  board/qca/ap143/ap143.c                   | 2 +-
  board/tplink/wdr4300/wdr4300.c            | 2 +-
  8 files changed, 7 insertions(+), 8 deletions(-)
arch/mips/mach-ath79/ar933x/ddr.c +0 -0
index 84e1cfa..b5940cb 100644
arch/mips/mach-ath79/ar933x/ddr.c DECLARE_GLOBAL_DATA_PTR; · line 106
Quoted 4 lines
arch/mips/mach-ath79/ar933x/ddr.c +1 -0
@@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #define DDR_TAP_VAL0            0x08
  #define DDR_TAP_VAL1            0x09
  -void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
Call it ar933x_ddr_init() here
Quoted 13 lines
arch/mips/mach-ath79/ar933x/ddr.c +0 -0
  {
      void __iomem *regs;
      u32 val;
arch/mips/mach-ath79/ar934x/ddr.c +0 -0
index 2ebb89b..c467fb2 100644
@@ -35,7 +35,7 @@ static const struct ar934x_mem_config
 ar934x_mem_config[] = {
      [AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
  };
  -void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const
Quoted 8 lines
arch/mips/mach-ath79/ar934x/ddr.c static const struct ar934x_mem_config · line 40
Quoted 2 lines
arch/mips/mach-ath79/ar934x/ddr.c +1 -0
 u16 ahb_mhz)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
Keep this one. If you want to have ddr_init() as a universal function, that's fine. But consider the situation where you want to have a single u-boot binary for multiple ar9xxx . In that case, you would need all of those different ar9xxx_ddr_init() functions and you'd need some universal function (ath79_ddr_init() ?) which would in turn call the right ar9xxx_ddr_init() .
You mean like this:
void ath79_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
{

Quoted 5 lines

    if (soc_is_ar933x())
        ar933x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
    else if (soc_is_ar934x())
        ar934x_ddr_init(cpu_mhz, ddr_mhz, bus_mhz);
    ...

Yes, very much like that.

soc_is_foo() might need tweaking so the compiled would be able to optimize out unavailable branches (in case support for that family is not available).

[...]

Signature · 2 lines

Best regards,
Marek Vasut

Wills Wang

author

2016-05-22 03:59 UTC #16 lore raw

PATCH 6/7 mips: ath79: Unify PLL initialization entry

In reply to a message not in the archive

Use function "pll_init" for ath79 platform PLL initialization, and put it into mach/clk.h

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/mach-ath79/ar934x/clk.c         |  2 +-
 arch/mips/mach-ath79/include/mach/ath79.h |  2 --
 arch/mips/mach-ath79/include/mach/clk.h   | 12 ++++++++++++
 board/tplink/wdr4300/wdr4300.c            |  6 +++---
 4 files changed, 16 insertions(+), 6 deletions(-)
 create mode 100644 arch/mips/mach-ath79/include/mach/clk.h

arch/mips/mach-ath79/ar934x/clk.c +1 -1

index fdbbc80..97d0e09 100644
@@ -101,7 +101,7 @@ static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32 srif_val)
 	} while (reg >= 0x40000);
 }
 
-void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
+void pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
 {
 	void __iomem *srif_regs = map_physmem(AR934X_SRIF_BASE,
 					      AR934X_SRIF_SIZE, MAP_NOCACHE);

arch/mips/mach-ath79/include/mach/ath79.h +0 -2

index fdc1149..90d80b8 100644
@@ -140,6 +140,4 @@ static inline int soc_is_qca956x(void)
 	return soc_is_tp9343() || soc_is_qca9561();
 }
 
-void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
-
 #endif /* __ASM_MACH_ATH79_H */

arch/mips/mach-ath79/include/mach/clk.h new file +12 -0

new file mode 100644
index 0000000..58be7ea
@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_MACH_CLK_H
+#define __ASM_MACH_CLK_H
+
+void pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
+
+#endif /* __ASM_MACH_CLK_H */

board/tplink/wdr4300/wdr4300.c +3 -3

index bff3938..b6c2881 100644
@@ -8,10 +8,10 @@
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
-#include <mach/ath79.h>
-#include <mach/reset.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ddr.h>
+#include <mach/clk.h>
+#include <mach/reset.h>
 #include <debug_uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -63,7 +63,7 @@ int board_early_init_f(void)
 #endif
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
-	ar934x_pll_init(560, 480, 240);
+	pll_init(560, 480, 240);
 	ddr_init(560, 480, 240);
 #endif

Signature · 1 line

1.9.1

Marek Vasut

2016-05-22 11:14 UTC #17 lore raw

PATCH 6/7 mips: ath79: Unify PLL initialization entry

Quoted 18 lines · Wills Wang

Use function "pll_init" for ath79 platform PLL initialization, and put it into mach/clk.h
Signed-off-by Wills Wang <[email protected]>
---
 arch/mips/mach-ath79/ar934x/clk.c         |  2 +-
 arch/mips/mach-ath79/include/mach/ath79.h |  2 --
 arch/mips/mach-ath79/include/mach/clk.h   | 12 ++++++++++++
 board/tplink/wdr4300/wdr4300.c            |  6 +++---
 4 files changed, 16 insertions(+), 6 deletions(-)
 create mode 100644 arch/mips/mach-ath79/include/mach/clk.h
arch/mips/mach-ath79/ar934x/clk.c +0 -0
index fdbbc80..97d0e09 100644

arch/mips/mach-ath79/ar934x/clk.c static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32 srif_val) · line 104

Quoted 5 lines

arch/mips/mach-ath79/ar934x/clk.c +1 -1

@@ -101,7 +101,7 @@ static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32 srif_val)
 	} while (reg >= 0x40000);
 }
 
-void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
+void pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)

Same comment I had in 5/7 applies here

Quoted 20 lines

arch/mips/mach-ath79/ar934x/clk.c +0 -0

 {
 	void __iomem *srif_regs = map_physmem(AR934X_SRIF_BASE,
 					      AR934X_SRIF_SIZE, MAP_NOCACHE);

arch/mips/mach-ath79/include/mach/ath79.h +0 -2

index fdc1149..90d80b8 100644
@@ -140,6 +140,4 @@ static inline int soc_is_qca956x(void)
 	return soc_is_tp9343() || soc_is_qca9561();
 }
 
-void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
-
 #endif /* __ASM_MACH_ATH79_H */

arch/mips/mach-ath79/include/mach/clk.h new file +0 -0

new file mode 100644
index 0000000..58be7ea

arch/mips/mach-ath79/include/mach/clk.h line 10

Quoted 10 lines

arch/mips/mach-ath79/include/mach/clk.h new file +10 -0

@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_MACH_CLK_H
+#define __ASM_MACH_CLK_H
+
+void pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);

Same comment I had in 3/7 applies here.

Quoted 29 lines

arch/mips/mach-ath79/include/mach/clk.h new file +2 -0

+
+#endif /* __ASM_MACH_CLK_H */

board/tplink/wdr4300/wdr4300.c +3 -3

index bff3938..b6c2881 100644
@@ -8,10 +8,10 @@
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
-#include <mach/ath79.h>
-#include <mach/reset.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ddr.h>
+#include <mach/clk.h>
+#include <mach/reset.h>
 #include <debug_uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -63,7 +63,7 @@ int board_early_init_f(void)
 #endif
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
-	ar934x_pll_init(560, 480, 240);
+	pll_init(560, 480, 240);
 	ddr_init(560, 480, 240);
 #endif

Signature · 2 lines

Best regards,
Marek Vasut

Wills Wang

author

2016-05-22 03:59 UTC #18 lore raw

PATCH 7/7 mips: ath79: ap121: Enable ethernet

In reply to a message not in the archive

This patch enable network function for ap121 board, it's based on the coming ethernet driver ag7xxx.

Signed-off-by Wills Wang <[email protected]>

---

 arch/mips/dts/ap121.dts   | 5 +++++
 arch/mips/dts/ar933x.dtsi | 4 ++--
 board/qca/ap121/ap121.c   | 2 ++
 configs/ap121_defconfig   | 9 +++++++--
 4 files changed, 16 insertions(+), 4 deletions(-)

arch/mips/dts/ap121.dts +5 -0

index e31f601..a934a58 100644
@@ -41,3 +41,8 @@
 		reg = <0>;
 	};
 };
+
+&gmac0 {
+	phy-mode = "rmii";
+	status = "okay";
+};

arch/mips/dts/ar933x.dtsi +2 -2

index 00896b2..971f13e 100644
@@ -75,7 +75,7 @@
 			};
 
 			gmac0: eth at 0x19000000 {
-				compatible = "qca,ag7240-mac";
+				compatible = "qca,ag933x-mac";
 				reg = <0x19000000 0x200>;
 				phy = <&phy0>;
 				phy-mode = "rmii";

@@ -92,7 +92,7 @@
 			};
 
 			gmac1: eth at 0x1a000000 {
-				compatible = "qca,ag7240-mac";
+				compatible = "qca,ag933x-mac";
 				reg = <0x1a000000 0x200>;
 				phy = <&phy0>;
 				phy-mode = "rgmii";

board/qca/ap121/ap121.c +2 -0

index b0e1993..7b5a4ac 100644
@@ -45,6 +45,8 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
+
 	ddr_init(400, 400, 200);
+	ath79_eth_reset();
 	return 0;
 }

configs/ap121_defconfig +7 -2

index 7604e2e..91fa734 100644
@@ -19,8 +19,13 @@ CONFIG_SYS_PROMPT="ap121 # "
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+CONFIG_CMD_NET=y
+CONFIG_CMD_NFS=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_ETH=y
+CONFIG_AG7XXX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_ATMEL=y

Signature · 1 line

1.9.1

Marek Vasut

2016-05-22 11:14 UTC #19 lore raw

PATCH 7/7 mips: ath79: ap121: Enable ethernet

Quoted 5 lines · Wills Wang

This patch enable network function for ap121 board, it's based on the coming ethernet driver ag7xxx.
Signed-off-by Wills Wang <[email protected]>
---

Acked-by Marek Vasut <[email protected]>

Quoted 75 lines

 arch/mips/dts/ap121.dts   | 5 +++++
 arch/mips/dts/ar933x.dtsi | 4 ++--
 board/qca/ap121/ap121.c   | 2 ++
 configs/ap121_defconfig   | 9 +++++++--
 4 files changed, 16 insertions(+), 4 deletions(-)

arch/mips/dts/ap121.dts +5 -0

index e31f601..a934a58 100644
@@ -41,3 +41,8 @@
 		reg = <0>;
 	};
 };
+
+&gmac0 {
+	phy-mode = "rmii";
+	status = "okay";
+};

arch/mips/dts/ar933x.dtsi +2 -2

index 00896b2..971f13e 100644
@@ -75,7 +75,7 @@
 			};
 
 			gmac0: eth at 0x19000000 {
-				compatible = "qca,ag7240-mac";
+				compatible = "qca,ag933x-mac";
 				reg = <0x19000000 0x200>;
 				phy = <&phy0>;
 				phy-mode = "rmii";

@@ -92,7 +92,7 @@
 			};
 
 			gmac1: eth at 0x1a000000 {
-				compatible = "qca,ag7240-mac";
+				compatible = "qca,ag933x-mac";
 				reg = <0x1a000000 0x200>;
 				phy = <&phy0>;
 				phy-mode = "rgmii";

board/qca/ap121/ap121.c +2 -0

index b0e1993..7b5a4ac 100644
@@ -45,6 +45,8 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
+
 	ddr_init(400, 400, 200);
+	ath79_eth_reset();
 	return 0;
 }

configs/ap121_defconfig +7 -2

index 7604e2e..91fa734 100644
@@ -19,8 +19,13 @@ CONFIG_SYS_PROMPT="ap121 # "
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+CONFIG_CMD_NET=y
+CONFIG_CMD_NFS=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_ETH=y
+CONFIG_AG7XXX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_ATMEL=y

Signature · 2 lines

Best regards,
Marek Vasut