powerpc: Disable flush or invalidate dcache by range for some SoCs
RFC PATCH 1/1 powerpc: Disable flush or invalidate dcache by range for some SoCs
Commit ac337168a unified functions to flush and invalidate dcache by range. These two functions were no-op for SoCs other than 4xx and MPC86xx. Adding these functions seemed to be correct but introduced issues when the dcache is flushed. While the root cause is under investigation, disable these functions for affected SoCs so various drivers can work.
---
arch/powerpc/lib/ppccache.S | 4 ++++ 1 file changed, 4 insertions(+)
arch/powerpc/lib/ppccache.S +4 -0
@@ -65,6 +65,7 @@ ppcSync: * flush_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(flush_dcache_range) +#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx) li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4
@@ -77,6 +78,7 @@ _GLOBAL(flush_dcache_range) addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbst's to get to ram */ +#endif blr /*
@@ -87,6 +89,7 @@ _GLOBAL(flush_dcache_range) * invalidate_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(invalidate_dcache_range) +#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx) li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4
@@ -100,5 +103,6 @@ _GLOBAL(invalidate_dcache_range) addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbi's to get to ram */ +#endif blr
Signature · 1 line
1.7.9.5
RFC PATCH 1/1 powerpc: Disable flush or invalidate dcache by range for some SoCs
Quoted 7 lines · York Sun
Commit
ac337168aunified functions to flush and invalidate dcache by range. These two functions were no-op for SoCs other than 4xx and MPC86xx. Adding these functions seemed to be correct but introduced issues when the dcache is flushed. While the root cause is under investigation, disable these functions for affected SoCs so various drivers can work.
Quoted 6 lines
Signed-off-by York Sun <[email protected]>---
arch/powerpc/lib/ppccache.S | 4 ++++ 1 file changed, 4 insertions(+)
Applied to u-boot-mpc85xx master branch, awaiting upstream.
York